Specify architecture for SPARC gas tests

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Specify architecture for SPARC gas tests

Rainer Orth-2
A couple of SPARC gas tests FAIL on Solaris/SPARC (both
sparc-sun-solaris2.11 and sparcv9-sun-solaris2.11):

FAIL: sparc PAUSE
FAIL: sparc CBCOND
FAIL: sparc CFR
FAIL: sparc CRYPTO
FAIL: sparc HPC+VIS3
FAIL: sparc IMA
FAIL: sparc OSA2015 %mwait asr and MWAIT instruction
FAIL: sparc OSA2015 %mcdper asr
FAIL: sparc SPARC5 and VIS4.0
FAIL: OSA2015 crypto instructions
FAIL: SPARC6
FAIL: FPCMPSHL OSA2017 instructions
FAIL: OSA2017 ONADD/ONSUB/ONMUL/ONDIV instructions.
FAIL: OSA2017 RLE instructions
FAIL: sparc64 rdasr
FAIL: sparc64 rdpr
FAIL: sparc64 rdhpr
FAIL: sparc64 wrasr
FAIL: sparc64 wrpr

It turns out there's a common pattern here: failures happen for all
tests that use SPARC ISA extensions beyond sparcv9, e.g. for the sparc
PAUSE test:

regexp_diff match failure
regexp "^   0:  b7 80 40 02     wr  %g1, %g2, %pause$"
line   "   0:   b7 80 40 02     wr  %g1, %g2, %asr27"
[...]
regexp_diff match failure
regexp "^   8:  b7 80 20 08     pause  8$"
line   "   8:   b7 80 20 08     wr  8, %asr27"
[...]

The fix is easy, actually: just as the tests specify the ISA extension
to use as a gas flag, the same needs to be done for objdump.  For the
test above, which has -Av9v, this means passing -msparc:v9v to objdump.
Doing so makes all but two (unrelated; to be reported separately)
failures go away.

Tested on both sparc-sun-solaris2.11 and sparcv9-sun-solaris2.11.

Ok for master?

        Rainer

--
-----------------------------------------------------------------------------
Rainer Orth, Center for Biotechnology, Bielefeld University


2018-02-09  Rainer Orth  <[hidden email]>

        * testsuite/gas/sparc/cbcond.d: Add -msparc:v9v to objdump options.
        * testsuite/gas/sparc/cfr.d: Likewise.
        * testsuite/gas/sparc/crypto.d: Likewise.
        * testsuite/gas/sparc/hpcvis3.d: Likewise.
        * testsuite/gas/sparc/ima.d: Likewise.
        * testsuite/gas/sparc/pause.d: Likewise.

        * testsuite/gas/sparc/edge.d: Add -msparc:v9d to objdump options.

        * testsuite/gas/sparc/fpcmpshl.d: Add -msparc:v9m8 to objdump options.
        * testsuite/gas/sparc/ldm-stm.d: Likewise.
        * testsuite/gas/sparc/ldmf-stmf.d: Likewise.
        * testsuite/gas/sparc/on.d: Likewise.
        * testsuite/gas/sparc/rdasr.d: Likewise.
        * testsuite/gas/sparc/rle.d: Likewise.

        * testsuite/gas/sparc/ldtxa.d: Add -msparc:v9c to objdump options.

        * testsuite/gas/sparc/mcdper.d: Add -msparc:v9m to objdump options.
        * testsuite/gas/sparc/mwait.d: Likewise.
        * testsuite/gas/sparc/rdhpr.d: Likewise.
        * testsuite/gas/sparc/rdpr.d: Likewise.
        * testsuite/gas/sparc/sparc5vis4.d: Likewise.
        * testsuite/gas/sparc/sparc6.d: Likewise.
        * testsuite/gas/sparc/wrasr.d: Likewise.
        * testsuite/gas/sparc/wrhpr.d: Likewise.
        * testsuite/gas/sparc/wrpr.d: Likewise.
        * testsuite/gas/sparc/xcrypto.d: Likewise.


# HG changeset patch
# Parent  bde067ae3ad90becdca69694e1996283f9b7912a
Specify architecture for SPARC gas tests

diff --git a/gas/testsuite/gas/sparc/cbcond.d b/gas/testsuite/gas/sparc/cbcond.d
--- a/gas/testsuite/gas/sparc/cbcond.d
+++ b/gas/testsuite/gas/sparc/cbcond.d
@@ -1,5 +1,5 @@
 #as: -Av9v
-#objdump: -dr
+#objdump: -msparc:v9v -dr
 #name: sparc CBCOND
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/cfr.d b/gas/testsuite/gas/sparc/cfr.d
--- a/gas/testsuite/gas/sparc/cfr.d
+++ b/gas/testsuite/gas/sparc/cfr.d
@@ -1,5 +1,5 @@
 #as: -Av9v
-#objdump: -dr
+#objdump: -msparc:v9v -dr
 #name: sparc CFR
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/crypto.d b/gas/testsuite/gas/sparc/crypto.d
--- a/gas/testsuite/gas/sparc/crypto.d
+++ b/gas/testsuite/gas/sparc/crypto.d
@@ -1,5 +1,5 @@
 #as: -Av9v
-#objdump: -dr
+#objdump: -msparc:v9v -dr
 #name: sparc CRYPTO
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/edge.d b/gas/testsuite/gas/sparc/edge.d
--- a/gas/testsuite/gas/sparc/edge.d
+++ b/gas/testsuite/gas/sparc/edge.d
@@ -1,5 +1,5 @@
 #as: -Av9d
-#objdump: -dr
+#objdump: -msparc:v9d -dr
 #name: sparc EDGE
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/fpcmpshl.d b/gas/testsuite/gas/sparc/fpcmpshl.d
--- a/gas/testsuite/gas/sparc/fpcmpshl.d
+++ b/gas/testsuite/gas/sparc/fpcmpshl.d
@@ -1,5 +1,5 @@
 #as: -Av9m8
-#objdump: -dr
+#objdump: -msparc:v9m8 -dr
 #name: FPCMPSHL OSA2017 instructions
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/hpcvis3.d b/gas/testsuite/gas/sparc/hpcvis3.d
--- a/gas/testsuite/gas/sparc/hpcvis3.d
+++ b/gas/testsuite/gas/sparc/hpcvis3.d
@@ -1,5 +1,5 @@
 #as: -Av9v
-#objdump: -dr
+#objdump: -msparc:v9v -dr
 #name: sparc HPC+VIS3
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/ima.d b/gas/testsuite/gas/sparc/ima.d
--- a/gas/testsuite/gas/sparc/ima.d
+++ b/gas/testsuite/gas/sparc/ima.d
@@ -1,5 +1,5 @@
 #as: -Av9v
-#objdump: -dr
+#objdump: -msparc:v9v -dr
 #name: sparc IMA
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/ldm-stm.d b/gas/testsuite/gas/sparc/ldm-stm.d
--- a/gas/testsuite/gas/sparc/ldm-stm.d
+++ b/gas/testsuite/gas/sparc/ldm-stm.d
@@ -1,5 +1,5 @@
 #as: -Av9m8
-#objdump: -dr
+#objdump: -msparc:v9m8 -dr
 #name: sparc LDM/STM/LDMA/STMA
 
 .*: +file format .*
diff --git a/gas/testsuite/gas/sparc/ldmf-stmf.d b/gas/testsuite/gas/sparc/ldmf-stmf.d
--- a/gas/testsuite/gas/sparc/ldmf-stmf.d
+++ b/gas/testsuite/gas/sparc/ldmf-stmf.d
@@ -1,5 +1,5 @@
 #as: -Av9m8
-#objdump: -dr
+#objdump: -msparc:v9m8 -dr
 #name: sparc LDMF/STMF/LDMFA/STMFA
 
 .*: +file format .*
diff --git a/gas/testsuite/gas/sparc/ldtxa.d b/gas/testsuite/gas/sparc/ldtxa.d
--- a/gas/testsuite/gas/sparc/ldtxa.d
+++ b/gas/testsuite/gas/sparc/ldtxa.d
@@ -1,5 +1,5 @@
 #as: -Av9c
-#objdump: -dr
+#objdump: -msparc:v9c -dr
 #name: sparc LDTXA
 
 .*: +file format .*sparc.*
@@ -30,4 +30,4 @@ 0+ <.text>:
   50: d4 98 dd 40 ldtxa  \[ %g3 \] #ASI_TWINX_PL, %o2
   54: d4 98 dd 42 ldtxa  \[ %g3 \+ %g2 \] #ASI_TWINX_PL, %o2
   58: d4 98 dd 60 ldtxa  \[ %g3 \] #ASI_TWINX_SL, %o2
-  5c: d4 98 dd 62 ldtxa  \[ %g3 \+ %g2 \] #ASI_TWINX_SL, %o2
\ No newline at end of file
+  5c: d4 98 dd 62 ldtxa  \[ %g3 \+ %g2 \] #ASI_TWINX_SL, %o2
diff --git a/gas/testsuite/gas/sparc/mcdper.d b/gas/testsuite/gas/sparc/mcdper.d
--- a/gas/testsuite/gas/sparc/mcdper.d
+++ b/gas/testsuite/gas/sparc/mcdper.d
@@ -1,5 +1,5 @@
 #as: -Av9m
-#objdump: -dr
+#objdump: -msparc:v9m -dr
 #name: sparc OSA2015 %mcdper asr
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/mwait.d b/gas/testsuite/gas/sparc/mwait.d
--- a/gas/testsuite/gas/sparc/mwait.d
+++ b/gas/testsuite/gas/sparc/mwait.d
@@ -1,5 +1,5 @@
 #as: -Av9m
-#objdump: -dr
+#objdump: -msparc:v9m -dr
 #name: sparc OSA2015 %mwait asr and MWAIT instruction
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/on.d b/gas/testsuite/gas/sparc/on.d
--- a/gas/testsuite/gas/sparc/on.d
+++ b/gas/testsuite/gas/sparc/on.d
@@ -1,5 +1,5 @@
 #as: -Av9m8
-#objdump: -dr
+#objdump: -msparc:v9m8 -dr
 #name: OSA2017 ONADD/ONSUB/ONMUL/ONDIV instructions.
 
 .*: +file format .*
diff --git a/gas/testsuite/gas/sparc/pause.d b/gas/testsuite/gas/sparc/pause.d
--- a/gas/testsuite/gas/sparc/pause.d
+++ b/gas/testsuite/gas/sparc/pause.d
@@ -1,5 +1,5 @@
 #as: -Av9v
-#objdump: -dr
+#objdump: -msparc:v9v -dr
 #name: sparc PAUSE
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/rdasr.d b/gas/testsuite/gas/sparc/rdasr.d
--- a/gas/testsuite/gas/sparc/rdasr.d
+++ b/gas/testsuite/gas/sparc/rdasr.d
@@ -1,5 +1,5 @@
 #as: -64 -Av9m8
-#objdump: -dr
+#objdump: -msparc:v9m8 -dr
 #name: sparc64 rdasr
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/rdhpr.d b/gas/testsuite/gas/sparc/rdhpr.d
--- a/gas/testsuite/gas/sparc/rdhpr.d
+++ b/gas/testsuite/gas/sparc/rdhpr.d
@@ -1,5 +1,5 @@
 #as: -64 -Av9m
-#objdump: -dr
+#objdump: -msparc:v9m -dr
 #name: sparc64 rdhpr
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/rdpr.d b/gas/testsuite/gas/sparc/rdpr.d
--- a/gas/testsuite/gas/sparc/rdpr.d
+++ b/gas/testsuite/gas/sparc/rdpr.d
@@ -1,5 +1,5 @@
 #as: -64 -Av9m
-#objdump: -dr
+#objdump: -msparc:v9m -dr
 #name: sparc64 rdpr
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/rle.d b/gas/testsuite/gas/sparc/rle.d
--- a/gas/testsuite/gas/sparc/rle.d
+++ b/gas/testsuite/gas/sparc/rle.d
@@ -1,5 +1,5 @@
 #as: -Av9m8
-#objdump: -dr
+#objdump: -msparc:v9m8 -dr
 #name: OSA2017 RLE instructions
 
 
diff --git a/gas/testsuite/gas/sparc/sparc5vis4.d b/gas/testsuite/gas/sparc/sparc5vis4.d
--- a/gas/testsuite/gas/sparc/sparc5vis4.d
+++ b/gas/testsuite/gas/sparc/sparc5vis4.d
@@ -1,5 +1,5 @@
 #as: -Av9m
-#objdump: -dr
+#objdump: -msparc:v9m -dr
 #name: sparc SPARC5 and VIS4.0
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/sparc6.d b/gas/testsuite/gas/sparc/sparc6.d
--- a/gas/testsuite/gas/sparc/sparc6.d
+++ b/gas/testsuite/gas/sparc/sparc6.d
@@ -1,5 +1,5 @@
 #as: -Av9m8
-#objdump: -dr
+#objdump: -msparc:v9m8 -dr
 #name: SPARC6
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/wrasr.d b/gas/testsuite/gas/sparc/wrasr.d
--- a/gas/testsuite/gas/sparc/wrasr.d
+++ b/gas/testsuite/gas/sparc/wrasr.d
@@ -1,5 +1,5 @@
 #as: -64 -Av9m
-#objdump: -dr
+#objdump: -msparc:v9m -dr
 #name: sparc64 wrasr
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/wrhpr.d b/gas/testsuite/gas/sparc/wrhpr.d
--- a/gas/testsuite/gas/sparc/wrhpr.d
+++ b/gas/testsuite/gas/sparc/wrhpr.d
@@ -1,5 +1,5 @@
 #as: -64 -Av9m
-#objdump: -dr
+#objdump: -msparc:v9m -dr
 #name: sparc64 wrhpr
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/wrpr.d b/gas/testsuite/gas/sparc/wrpr.d
--- a/gas/testsuite/gas/sparc/wrpr.d
+++ b/gas/testsuite/gas/sparc/wrpr.d
@@ -1,5 +1,5 @@
 #as: -64 -Av9m
-#objdump: -dr
+#objdump: -msparc:v9m -dr
 #name: sparc64 wrpr
 
 .*: +file format .*sparc.*
diff --git a/gas/testsuite/gas/sparc/xcrypto.d b/gas/testsuite/gas/sparc/xcrypto.d
--- a/gas/testsuite/gas/sparc/xcrypto.d
+++ b/gas/testsuite/gas/sparc/xcrypto.d
@@ -1,5 +1,5 @@
 #as: -Av9m
-#objdump: -dr
+#objdump: -msparc:v9m -dr
 #name: OSA2015 crypto instructions
 
 .*: +file format .*sparc.*
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Re: Specify architecture for SPARC gas tests

Jose E. Marchesi-2

Hi Rainer.  Thanks for looking at this.

    A couple of SPARC gas tests FAIL on Solaris/SPARC (both
    sparc-sun-solaris2.11 and sparcv9-sun-solaris2.11):
   
    FAIL: sparc PAUSE
    FAIL: sparc CBCOND
    FAIL: sparc CFR
    FAIL: sparc CRYPTO
    FAIL: sparc HPC+VIS3
    FAIL: sparc IMA
    FAIL: sparc OSA2015 %mwait asr and MWAIT instruction
    FAIL: sparc OSA2015 %mcdper asr
    FAIL: sparc SPARC5 and VIS4.0
    FAIL: OSA2015 crypto instructions
    FAIL: SPARC6
    FAIL: FPCMPSHL OSA2017 instructions
    FAIL: OSA2017 ONADD/ONSUB/ONMUL/ONDIV instructions.
    FAIL: OSA2017 RLE instructions
    FAIL: sparc64 rdasr
    FAIL: sparc64 rdpr
    FAIL: sparc64 rdhpr
    FAIL: sparc64 wrasr
    FAIL: sparc64 wrpr
   
    It turns out there's a common pattern here: failures happen for all
    tests that use SPARC ISA extensions beyond sparcv9, e.g. for the sparc
    PAUSE test:
   
    regexp_diff match failure
    regexp "^   0:  b7 80 40 02     wr  %g1, %g2, %pause$"
    line   "   0:   b7 80 40 02     wr  %g1, %g2, %asr27"
    [...]
    regexp_diff match failure
    regexp "^   8:  b7 80 20 08     pause  8$"
    line   "   8:   b7 80 20 08     wr  8, %asr27"
    [...]
   
    The fix is easy, actually: just as the tests specify the ISA extension
    to use as a gas flag, the same needs to be done for objdump.  For the
    test above, which has -Av9v, this means passing -msparc:v9v to objdump.
    Doing so makes all but two (unrelated; to be reported separately)
    failures go away.

In GNU/Linux GAS annotates the hardware capabilities when it assembles
an ELF object.  From gas/config/tc-sparc.c:sparc_md_end:

#if defined(OBJ_ELF) && !defined(TE_SOLARIS)
  hwcaps = hwcap_seen & U0xffffffff;
  hwcaps2 = hwcap_seen >> 32;

  if (hwcaps)
    bfd_elf_add_obj_attr_int (stdoutput, OBJ_ATTR_GNU, Tag_GNU_Sparc_HWCAPS, hwcaps);
  if (hwcaps2)
    bfd_elf_add_obj_attr_int (stdoutput, OBJ_ATTR_GNU, Tag_GNU_Sparc_HWCAPS2, hwcaps2);
#endif

Then when BFD opens the file, it looks at the GNU object attributes
HWCAPS and HWCAPS2 and determines the opcodes architecture that is
subsequently used by the disassembler.  See
bfd/elfxx-spac.c:_bfd_sparc_elf_object_p.

The hwcaps tags are not created in Solaris though, so that's why the
tests are failing...  I wonder if it is possible to change the tests so
they use -msparc:MACH only when testing in solaris targets?

Alternatively, I guess we could just change the assembler to add the GNU
object attributes also in solaris...
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Re: Specify architecture for SPARC gas tests

Rainer Orth-2
Hi Jose,

> In GNU/Linux GAS annotates the hardware capabilities when it assembles
> an ELF object.  From gas/config/tc-sparc.c:sparc_md_end:
>
> #if defined(OBJ_ELF) && !defined(TE_SOLARIS)
>   hwcaps = hwcap_seen & U0xffffffff;
>   hwcaps2 = hwcap_seen >> 32;
>
>   if (hwcaps)
>     bfd_elf_add_obj_attr_int (stdoutput, OBJ_ATTR_GNU, Tag_GNU_Sparc_HWCAPS, hwcaps);
>   if (hwcaps2)
>     bfd_elf_add_obj_attr_int (stdoutput, OBJ_ATTR_GNU, Tag_GNU_Sparc_HWCAPS2, hwcaps2);
> #endif
>
> Then when BFD opens the file, it looks at the GNU object attributes
> HWCAPS and HWCAPS2 and determines the opcodes architecture that is
> subsequently used by the disassembler.  See
> bfd/elfxx-spac.c:_bfd_sparc_elf_object_p.

ah, that's the missing piece: I'd already wondered how those failures
could have escaped you.

> The hwcaps tags are not created in Solaris though, so that's why the
> tests are failing...  I wonder if it is possible to change the tests so
> they use -msparc:MACH only when testing in solaris targets?

I've no idea, but there's already tcl code that modifies/rewrites tags
in the *.?d files.  That could certainly be extended...

> Alternatively, I guess we could just change the assembler to add the GNU
> object attributes also in solaris...

TBH, I'd rather not, given that Solaris has a native format for this
feature:

        https://docs.oracle.com/cd/E37838_01/html/E36783/chapter7-28.html#scrolltoc

I'd long meant to implement this in binutils.

        Rainer

--
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Rainer Orth, Center for Biotechnology, Bielefeld University
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Re: Specify architecture for SPARC gas tests

Jose E. Marchesi-2

    > The hwcaps tags are not created in Solaris though, so that's why the
    > tests are failing...  I wonder if it is possible to change the tests so
    > they use -msparc:MACH only when testing in solaris targets?
   
    I've no idea, but there's already tcl code that modifies/rewrites tags
    in the *.?d files.  That could certainly be extended...

I just checked and you can set OBJDUMPFLAGS before running
run_dump_test.  What about doing something like this in sparc.exp:

proc set_tests_arch {arch} {
  global OBJDUMPFLAGS

  if [istarget "sparc-solaris*"] {
     set OBJDUMPFLAGS "-msparc:$arch"
  }
}

[...]

set_tests_mach v9m8
run_dump_test "on"
run_list_test "on-diag" "-64"
; ... other M8 tests

set_tests_mach v9m
run_dump_test "xcrypto"
; ... other M7 tests

wdyt?
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Re: Specify architecture for SPARC gas tests

Rainer Orth-2
Hi jose,

> I just checked and you can set OBJDUMPFLAGS before running
> run_dump_test.  What about doing something like this in sparc.exp:
>
> proc set_tests_arch {arch} {
>   global OBJDUMPFLAGS
>
>   if [istarget "sparc-solaris*"] {
>      set OBJDUMPFLAGS "-msparc:$arch"
>   }
> }
>
> [...]
>
> set_tests_mach v9m8
> run_dump_test "on"
> run_list_test "on-diag" "-64"
> ; ... other M8 tests
>
> set_tests_mach v9m
> run_dump_test "xcrypto"
> ; ... other M7 tests
>
> wdyt?
works for me.  The following patch passed testing on both
sparc-sun-solaris2.11 and sparcv9-sun-solaris2.11.

At the occasion, I noticed that the ldtxa hadn't been run at all
before.  It's now included as well.

Ok for mainline?


Now, only two (quite weird) failures remain:

FAIL: sparc LDM/STM/LDMA/STMA

regexp_diff match failure
regexp "^  1c:  c7 88 64 66     ldmuh  \[ %g1 \+ 0x66 \], %g3$"
line   "  1c:   c7 88 64 66     ldmuh  [ 0x66 + %g1 ], %g3"
regexp_diff match failure
regexp "^  20:  c7 88 64 66     ldmuh  \[ %g1 \+ 0x66 \], %g3$"
line   "  20:   c7 88 64 66     ldmuh  [ 0x66 + %g1 ], %g3"
regexp_diff match failure
regexp "^  30:  c7 88 68 66     ldmsw  \[ %g1 \+ 0x66 \], %g3$"
line   "  30:   c7 88 68 66     ldmsw  [ 0x66 + %g1 ], %g3"
regexp_diff match failure
regexp "^  34:  c7 88 68 66     ldmsw  \[ %g1 \+ 0x66 \], %g3$"
line   "  34:   c7 88 68 66     ldmsw  [ 0x66 + %g1 ], %g3"
regexp_diff match failure
regexp "^  44:  c7 88 6c 66     ldmuw  \[ %g1 \+ 0x66 \], %g3$"
line   "  44:   c7 88 6c 66     ldmuw  [ 0x66 + %g1 ], %g3"
regexp_diff match failure
regexp "^  48:  c7 88 6c 66     ldmuw  \[ %g1 \+ 0x66 \], %g3$"
line   "  48:   c7 88 6c 66     ldmuw  [ 0x66 + %g1 ], %g3"

FAIL: sparc LDMF/STMF/LDMFA/STMFA

regexp_diff match failure
regexp "^  54:  c3 a8 7c 66     stmfd  %f32, \[ %g1 \+ 0x66 \]$"
line   "  54:   c3 a8 7c 66     stmfd  %f32, [ 0x66 + %g1 ]"
regexp_diff match failure
regexp "^  58:  c3 a8 7c 66     stmfd  %f32, \[ %g1 \+ 0x66 \]$"
line   "  58:   c3 a8 7c 66     stmfd  %f32, [ 0x66 + %g1 ]"

I can see no pattern here: in the first case, ldmsh, ldmx, and st* are
correct, in the second stmfs is.

        Rainer

--
-----------------------------------------------------------------------------
Rainer Orth, Center for Biotechnology, Bielefeld University


2018-02-12  Jose E. Marchesi  <[hidden email]>
            Rainer Orth  <[hidden email]>

        * testsuite/gas/sparc/sparc.exp (set_tests_arch): New proc.
        Prefix v9c, v9d, v9v, v9m, v9m8 tests with corresponding
        set_tests_arch.


# HG changeset patch
# Parent  e9edce3b659de9093e265b4f0c544ec7d188143f
Specify architecture for SPARC gas tests

diff --git a/gas/testsuite/gas/sparc/sparc.exp b/gas/testsuite/gas/sparc/sparc.exp
--- a/gas/testsuite/gas/sparc/sparc.exp
+++ b/gas/testsuite/gas/sparc/sparc.exp
@@ -31,6 +31,20 @@ proc gas_64_check { } {
     return [regexp "elf64\[_-\]sparc" [lindex $status 1]]
 }
 
+# Until binutils support Solaris-style capabilities, specify the arch
+# necessary to disassemble the ISA extensions used.
+proc set_tests_arch {arch} {
+    global OBJDUMPFLAGS
+
+    if [istarget "sparc*-*-solaris*"] {
+ if { $arch != "" } {
+    set OBJDUMPFLAGS "-msparc:$arch"
+ } else {
+    set OBJDUMPFLAGS ""
+ }
+    }
+}
+
 if [istarget sparc*-*-*] {
 
     if [is_elf_format] {
@@ -50,40 +64,53 @@ if [istarget sparc*-*-*] {
         run_list_test "pr4587" ""
         run_dump_test "ticc-imm-reg"
         run_dump_test "v8-movwr-imm"
-        run_dump_test "pause"
         run_dump_test "save-args"
-        run_dump_test "cbcond"
+
+ set_tests_arch "v9c"
+ run_dump_test "ldtxa"
+
+ set_tests_arch "v9d"
+ run_dump_test "edge"
+
+ set_tests_arch "v9v"
+ run_dump_test "cbcond"
+ run_dump_test "cfr"
+ run_dump_test "crypto"
+ run_dump_test "hpcvis3"
+ run_dump_test "ima"
+ run_dump_test "pause"
+
+ set_tests_arch "v9m"
+ run_dump_test "mcdper"
+ run_dump_test "mwait"
+ run_dump_test "sparc5vis4"
+ run_dump_test "xcrypto"
+
+ set_tests_arch "v9m8"
+ run_dump_test "fpcmpshl"
+ run_dump_test "ldm-stm"
+ run_dump_test "ldmf-stmf"
+ run_dump_test "on"
+ run_dump_test "rle"
+ run_dump_test "sparc6"
+ set_tests_arch ""
+
         run_list_test "cbcond-diag" "-64"
-        run_dump_test "cfr"
-        run_dump_test "crypto"
-        run_dump_test "edge"
         run_dump_test "flush"
-        run_dump_test "hpcvis3"
-        run_dump_test "ima"
         run_dump_test "ld_st_fsr"
         run_dump_test "ldtw_sttw"
         run_dump_test "ldd_std"
         run_dump_test "ldx_stx"
         run_dump_test "ldx_efsr"
-        run_dump_test "mwait"
-        run_dump_test "mcdper"
-        run_dump_test "sparc5vis4"
-        run_dump_test "xcrypto"
         run_dump_test "v9branch1"
         run_dump_test "imm-plus-rreg"
         run_dump_test "dcti-couples-v9"
         run_dump_test "call-relax"
-        run_dump_test "sparc6"
         run_list_test "sparc6-diag" "-64"
-        run_dump_test "fpcmpshl"
         run_list_test "fpcmpshl-diag" "-64"
-        run_dump_test "ldm-stm"
         run_list_test "ldm-stm-diag" "-64"
-        run_dump_test "ldmf-stmf"
         run_list_test "ldmf-stmf-diag" "-64"
-        run_dump_test "on"
         run_list_test "on-diag" "-64"
-        run_dump_test "rle"
     } else {
         # The next tests are a.out only.
         run_dump_test "call-relax-aout"
@@ -95,12 +122,6 @@ if [istarget sparc*-*-*] {
  run_dump_test "prefetch"
  run_dump_test "set64"
  run_dump_test "synth64"
-        run_dump_test "rdasr"
- run_dump_test "rdpr"
- run_dump_test "rdhpr"
-        run_dump_test "wrasr"
- run_dump_test "wrpr"
- run_dump_test "wrhpr"
  run_dump_test "window"
  run_dump_test "reloc64"
  run_dump_test "pcrel64"
@@ -109,6 +130,17 @@ if [istarget sparc*-*-*] {
         run_list_test "hwcaps-bump" "-64 -bump"
         run_list_test "asi-bump-warn" "-64 -bump"
         run_list_test "asi-arch-error" "-Av9"
+
+ set_tests_arch "v9m"
+ run_dump_test "rdhpr"
+ run_dump_test "rdpr"
+ run_dump_test "wrasr"
+ run_dump_test "wrhpr"
+ run_dump_test "wrpr"
+
+ set_tests_arch "v9m8"
+ run_dump_test "rdasr"
+ set_tests_arch ""
     }
 
     run_dump_test "synth"
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Re: Specify architecture for SPARC gas tests

Jose E. Marchesi-2
   
    > I just checked and you can set OBJDUMPFLAGS before running
    > run_dump_test.  What about doing something like this in sparc.exp:
    >
    > proc set_tests_arch {arch} {
    >   global OBJDUMPFLAGS
    >
    >   if [istarget "sparc-solaris*"] {
    >      set OBJDUMPFLAGS "-msparc:$arch"
    >   }
    > }
    >
    > [...]
    >
    > set_tests_mach v9m8
    > run_dump_test "on"
    > run_list_test "on-diag" "-64"
    > ; ... other M8 tests
    >
    > set_tests_mach v9m
    > run_dump_test "xcrypto"
    > ; ... other M7 tests
    >
    > wdyt?
   
    works for me.  The following patch passed testing on both
    sparc-sun-solaris2.11 and sparcv9-sun-solaris2.11.
   
    At the occasion, I noticed that the ldtxa hadn't been run at all
    before.  It's now included as well.
   
    Ok for mainline?

Ok.  Thanks.
   
    Now, only two (quite weird) failures remain:
   
    FAIL: sparc LDM/STM/LDMA/STMA
   
    regexp_diff match failure
    regexp "^  1c:  c7 88 64 66     ldmuh  \[ %g1 \+ 0x66 \], %g3$"
    line   "  1c:   c7 88 64 66     ldmuh  [ 0x66 + %g1 ], %g3"
    regexp_diff match failure
    regexp "^  20:  c7 88 64 66     ldmuh  \[ %g1 \+ 0x66 \], %g3$"
    line   "  20:   c7 88 64 66     ldmuh  [ 0x66 + %g1 ], %g3"
    regexp_diff match failure
    regexp "^  30:  c7 88 68 66     ldmsw  \[ %g1 \+ 0x66 \], %g3$"
    line   "  30:   c7 88 68 66     ldmsw  [ 0x66 + %g1 ], %g3"
    regexp_diff match failure
    regexp "^  34:  c7 88 68 66     ldmsw  \[ %g1 \+ 0x66 \], %g3$"
    line   "  34:   c7 88 68 66     ldmsw  [ 0x66 + %g1 ], %g3"
    regexp_diff match failure
    regexp "^  44:  c7 88 6c 66     ldmuw  \[ %g1 \+ 0x66 \], %g3$"
    line   "  44:   c7 88 6c 66     ldmuw  [ 0x66 + %g1 ], %g3"
    regexp_diff match failure
    regexp "^  48:  c7 88 6c 66     ldmuw  \[ %g1 \+ 0x66 \], %g3$"
    line   "  48:   c7 88 6c 66     ldmuw  [ 0x66 + %g1 ], %g3"
   
    FAIL: sparc LDMF/STMF/LDMFA/STMFA
   
    regexp_diff match failure
    regexp "^  54:  c3 a8 7c 66     stmfd  %f32, \[ %g1 \+ 0x66 \]$"
    line   "  54:   c3 a8 7c 66     stmfd  %f32, [ 0x66 + %g1 ]"
    regexp_diff match failure
    regexp "^  58:  c3 a8 7c 66     stmfd  %f32, \[ %g1 \+ 0x66 \]$"
    line   "  58:   c3 a8 7c 66     stmfd  %f32, [ 0x66 + %g1 ]"
   
    I can see no pattern here: in the first case, ldmsh, ldmx, and st* are
    correct, in the second stmfs is.
   

I can't reproduce these two failures with a cross binutils...

It is indeed weird... the way the opcodes are organized in sparc-opc.c
should guarantee that the [d + i] variant is chosen by the disassembler,
provided the right architecture level is selected:

#define ldm(width,opm,flags)                                                 \
  { "ldm" width, F3(3, 0x31, 0)|OPM((opm))|OPMI(0), F3(~3, ~0x31, ~0)|OPM(~(opm))|OPMI(~0), "[1+2],d", (flags), 0, HWCAP2_SPARC6, m8 }, \
  { "ldm" width, F3(3, 0x31, 0)|OPM((opm))|OPMI(0), F3(~3, ~0x31, ~0)|OPM(~(opm))|OPMI(~0)|RS2_G0, "[1],d", (flags), 0, HWCAP2_SPARC6, m8 }, /* ldm [rs1+%g0],d */ \
  { "ldm" width, F3(3, 0x31, 1)|OPM((opm)), F3(~3, ~0x31, ~1)|OPM(~(opm)), "[1+j],d", (flags), 0, HWCAP2_SPARC6, m8 }, \
  { "ldm" width, F3(3, 0x31, 1)|OPM((opm)), F3(~3, ~0x31, ~1)|OPM(~(opm)), "[j+1],d", (flags), 0, HWCAP2_SPARC6, m8 }, /* ldm [rs1+j],d  */ \
  { "ldm" width, F3(3, 0x31, 1)|OPM((opm)), F3(~3, ~0x31, ~1)|OPM(~(opm))|RS1_G0, "[j],d", (flags), 0, HWCAP2_SPARC6, m8 }, \
  { "ldm" width, F3(3, 0x31, 1)|OPM((opm)), F3(~3, ~0x31, ~1)|OPM(~(opm))|SIMM10(~0), "[1],d", (flags), 0, HWCAP2_SPARC6, m8 } /* ldm [rs1+0],d  */

You may want to debug what happens in the main `for' loop in
opcodes/sparc-dis.c:print_insn_sparc and why it is the "[j+1],d" entry
that is chosen.  I would do it myself but again I seem unable to
reproduce it :/