[PATCH] x86: drop stale Vec_Imm4 related comment

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[PATCH] x86: drop stale Vec_Imm4 related comment

Jan Beulich-2
I overlooked this in commit 9d3bf266fd ("x86: drop Vec_Imm4"), presumably
because of the mis-spelling.

opcodes/
2020-01-XX  Jan Beulich  <[hidden email]>

        * i386-opc.tbl: Drop stale comment from XOP section.

--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -2607,8 +2607,6 @@ vfnmsubss, 4, 0x667e, None, 1, CpuFMA4,
 vfnmsubss, 4, 0x667e, None, 1, CpuFMA4, Modrm|Vex|VexOpcode=2|VexVVVV=1|VexW=1|VexSources=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {RegXMM, Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
 
 // XOP instructions
-// We add Imm8 to Vex_Imm4.  We use Imm8 to indicate that the operand
-// is an immediate.  We will check if its value will fit 4 bits.
 
 vfrczpd,    2, 0x81, None, 1, CpuXOP, Modrm|VexOpcode=4|VexW=1|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Vex, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
 vfrczps,    2, 0x80, None, 1, CpuXOP, Modrm|VexOpcode=4|VexW=1|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Vex, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
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Re: [PATCH] x86: drop stale Vec_Imm4 related comment

H.J. Lu-30
On Tue, Jan 14, 2020 at 11:37 PM Jan Beulich <[hidden email]> wrote:

>
> I overlooked this in commit 9d3bf266fd ("x86: drop Vec_Imm4"), presumably
> because of the mis-spelling.
>
> opcodes/
> 2020-01-XX  Jan Beulich  <[hidden email]>
>
>         * i386-opc.tbl: Drop stale comment from XOP section.
>
> --- a/opcodes/i386-opc.tbl
> +++ b/opcodes/i386-opc.tbl
> @@ -2607,8 +2607,6 @@ vfnmsubss, 4, 0x667e, None, 1, CpuFMA4,
>  vfnmsubss, 4, 0x667e, None, 1, CpuFMA4, Modrm|Vex|VexOpcode=2|VexVVVV=1|VexW=1|VexSources=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {RegXMM, Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
>
>  // XOP instructions
> -// We add Imm8 to Vex_Imm4.  We use Imm8 to indicate that the operand
> -// is an immediate.  We will check if its value will fit 4 bits.
>
>  vfrczpd,    2, 0x81, None, 1, CpuXOP, Modrm|VexOpcode=4|VexW=1|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Vex, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
>  vfrczps,    2, 0x80, None, 1, CpuXOP, Modrm|VexOpcode=4|VexW=1|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Vex, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }

OK.

Thanks.

--
H.J.