[PATCH] RISC-V: Add %got_pcrel_hi operator

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[PATCH] RISC-V: Add %got_pcrel_hi operator

James Clarke
This operator allows compilers to expand the "la" pseduo-instruction and
potentially split up the two instructions.

gas/
        * config/tc-riscv.c (percent_op_utype): Add entry for a new
        %got_pcrel_hi operator.
        * testsuite/gas/riscv/no-relax-reloc.d: Update for new
        %got_pcrel_hi operator test.
        * testsuite/gas/riscv/no-relax-reloc.s: Add a %got_pcrel_hi
        operator test.
        * testsuite/gas/riscv/relax-reloc.d: Update for new
        %got_pcrel_hi operator test.
        * testsuite/gas/riscv/relax-reloc.s: Add a %got_pcrel_hi
        operator test.
---
 gas/config/tc-riscv.c                    | 1 +
 gas/testsuite/gas/riscv/no-relax-reloc.d | 4 +++-
 gas/testsuite/gas/riscv/no-relax-reloc.s | 3 +++
 gas/testsuite/gas/riscv/relax-reloc.d    | 7 +++++--
 gas/testsuite/gas/riscv/relax-reloc.s    | 3 +++
 5 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 987377ae81..5f4a1bbe83 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -1286,6 +1286,7 @@ static const struct percent_op_match percent_op_utype[] =
 {
   {"%tprel_hi", BFD_RELOC_RISCV_TPREL_HI20},
   {"%pcrel_hi", BFD_RELOC_RISCV_PCREL_HI20},
+  {"%got_pcrel_hi", BFD_RELOC_RISCV_GOT_HI20},
   {"%tls_ie_pcrel_hi", BFD_RELOC_RISCV_TLS_GOT_HI20},
   {"%tls_gd_pcrel_hi", BFD_RELOC_RISCV_TLS_GD_HI20},
   {"%hi", BFD_RELOC_RISCV_HI20},
diff --git a/gas/testsuite/gas/riscv/no-relax-reloc.d b/gas/testsuite/gas/riscv/no-relax-reloc.d
index 62f28e0927..c2ca1aa6e7 100644
--- a/gas/testsuite/gas/riscv/no-relax-reloc.d
+++ b/gas/testsuite/gas/riscv/no-relax-reloc.d
@@ -9,4 +9,6 @@ RELOCATION RECORDS FOR .*
 0+4 R_RISCV_LO12_I.*
 0+8 R_RISCV_PCREL_HI20.*
 0+c R_RISCV_PCREL_LO12_I.*
-0+10 R_RISCV_CALL.*
+0+10 R_RISCV_GOT_HI20.*
+0+14 R_RISCV_PCREL_LO12_I.*
+0+18 R_RISCV_CALL.*
diff --git a/gas/testsuite/gas/riscv/no-relax-reloc.s b/gas/testsuite/gas/riscv/no-relax-reloc.s
index 7f1a484fc2..d63852d08e 100644
--- a/gas/testsuite/gas/riscv/no-relax-reloc.s
+++ b/gas/testsuite/gas/riscv/no-relax-reloc.s
@@ -5,4 +5,7 @@ target:
         .LA0: auipc     a5,%pcrel_hi(bar)
         lw      a0,%pcrel_lo(.LA0)(a5)
 
+        .LA1: auipc     a5,%got_pcrel_hi(baz)
+        lw      a0,%pcrel_lo(.LA1)(a5)
+
  call target
diff --git a/gas/testsuite/gas/riscv/relax-reloc.d b/gas/testsuite/gas/riscv/relax-reloc.d
index f5f592ce03..623218ec5d 100644
--- a/gas/testsuite/gas/riscv/relax-reloc.d
+++ b/gas/testsuite/gas/riscv/relax-reloc.d
@@ -13,5 +13,8 @@ RELOCATION RECORDS FOR .*
 0+8 R_RISCV_RELAX.*
 0+c R_RISCV_PCREL_LO12_I.*
 0+c R_RISCV_RELAX.*
-0+10 R_RISCV_CALL.*
-0+10 R_RISCV_RELAX.*
+0+10 R_RISCV_GOT_HI20.*
+0+14 R_RISCV_PCREL_LO12_I.*
+0+14 R_RISCV_RELAX.*
+0+18 R_RISCV_CALL.*
+0+18 R_RISCV_RELAX.*
diff --git a/gas/testsuite/gas/riscv/relax-reloc.s b/gas/testsuite/gas/riscv/relax-reloc.s
index 7f1a484fc2..d63852d08e 100644
--- a/gas/testsuite/gas/riscv/relax-reloc.s
+++ b/gas/testsuite/gas/riscv/relax-reloc.s
@@ -5,4 +5,7 @@ target:
         .LA0: auipc     a5,%pcrel_hi(bar)
         lw      a0,%pcrel_lo(.LA0)(a5)
 
+        .LA1: auipc     a5,%got_pcrel_hi(baz)
+        lw      a0,%pcrel_lo(.LA1)(a5)
+
  call target
--
2.17.1

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Re: [PATCH] RISC-V: Add %got_pcrel_hi operator

Jim Wilson-2
On 11/7/18 10:27 AM, James Clarke wrote:

> This operator allows compilers to expand the "la" pseduo-instruction and
> potentially split up the two instructions.
>
> gas/
> * config/tc-riscv.c (percent_op_utype): Add entry for a new
> %got_pcrel_hi operator.
> * testsuite/gas/riscv/no-relax-reloc.d: Update for new
> %got_pcrel_hi operator test.
> * testsuite/gas/riscv/no-relax-reloc.s: Add a %got_pcrel_hi
> operator test.
> * testsuite/gas/riscv/relax-reloc.d: Update for new
> %got_pcrel_hi operator test.
> * testsuite/gas/riscv/relax-reloc.s: Add a %got_pcrel_hi
> operator test.

We have a list of assembler operators in the psABI document
     https://github.com/riscv/riscv-elf-psabi-doc
We also have a list of assembler operators in the assembler manual
     https://github.com/riscv/riscv-asm-manual
This looks a little redundant.  It isn't clear why assembler syntax is
mentioned in the psABI.  It doesn't seem relevant to that.  Anyways,
these should be updated.

It is probably best if there is a public proposal somewhere on the
RISC-V side instead of unilaterally changing assembler syntax,
particularly given that it is part of the psABI (even though it probably
shouldn't be).  Someone on the LLVM side for instance might want to
offer an opinion.  An issue filed with the psABI or assembler manual, or
an email sent to [hidden email] is probably sufficient.

Maybe the operator could just be %got_hi?  Not clear why we need the
pcrel in there.  The reloc itself is just R_RISCV_GOT_HI20.

Do you have a copyright assignment for binutils?  I found ones for mach,
hurd, and glibc.  I don't see an obvious binutils one.

Otherwise this looks OK to me.

Jim
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Re: [PATCH] RISC-V: Add %got_pcrel_hi operator

James Clarke
On 8 Nov 2018, at 00:40, Jim Wilson <[hidden email]> wrote:

> On 11/7/18 10:27 AM, James Clarke wrote:
>> This operator allows compilers to expand the "la" pseduo-instruction and
>> potentially split up the two instructions.
>> gas/
>> * config/tc-riscv.c (percent_op_utype): Add entry for a new
>> %got_pcrel_hi operator.
>> * testsuite/gas/riscv/no-relax-reloc.d: Update for new
>> %got_pcrel_hi operator test.
>> * testsuite/gas/riscv/no-relax-reloc.s: Add a %got_pcrel_hi
>> operator test.
>> * testsuite/gas/riscv/relax-reloc.d: Update for new
>> %got_pcrel_hi operator test.
>> * testsuite/gas/riscv/relax-reloc.s: Add a %got_pcrel_hi
>> operator test.
>
> We have a list of assembler operators in the psABI document
>    https://github.com/riscv/riscv-elf-psabi-doc
> We also have a list of assembler operators in the assembler manual
>    https://github.com/riscv/riscv-asm-manual
> This looks a little redundant.  It isn't clear why assembler syntax is
> mentioned in the psABI.  It doesn't seem relevant to that.  Anyways, these
> should be updated.
>
> It is probably best if there is a public proposal somewhere on the RISC-V side
> instead of unilaterally changing assembler syntax, particularly given that it
> is part of the psABI (even though it probably shouldn't be).  Someone on the
> LLVM side for instance might want to offer an opinion.  An issue filed with the
> psABI or assembler manual, or an email sent to [hidden email] is probably
> sufficient.

Ok, makes sense to get it standardised. I'll file an issue/PR against
riscv-asm-manual as that seems the more logical place of the two repositories
to have the discussion, and reach out to the mailing list if nobody bites.

> Maybe the operator could just be %got_hi?  Not clear why we need the pcrel in
> there.  The reloc itself is just R_RISCV_GOT_HI20.

I wasn't sure which to go for, as there's some inconsistency. We have
%tls_{ie,gd}_pcrel_hi that map to R_RISCV_TLS_GOT_HI20, which would lead to
%got_pcrel_hi being the logical choice, but also %tprel_hi mapping to
R_RISCV_TPREL_HI20. However, %tprel_hi uses %tprel_lo for the second half,
whereas %tls_{ie,gd}_pcrel_hi use %pcrel_lo for the second half, so given we
also use %pcrel_lo here I decided that it made sense to match that.

> Do you have a copyright assignment for binutils?  I found ones for mach, hurd,
> and glibc.  I don't see an obvious binutils one.

No, it's something I should have done years ago. I've had small patches
accepted, but I don't know whether this is regarded as small enough. Either
way, I've just sent in a request for the binutils (and gcc while I'm at it)
forms.

James

> Otherwise this looks OK to me.
>
> Jim

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Re: [PATCH] RISC-V: Add %got_pcrel_hi operator

Palmer Dabbelt-2
On Wed, 07 Nov 2018 17:22:18 PST (-0800), [hidden email] wrote:

> On 8 Nov 2018, at 00:40, Jim Wilson <[hidden email]> wrote:
>> On 11/7/18 10:27 AM, James Clarke wrote:
>>> This operator allows compilers to expand the "la" pseduo-instruction and
>>> potentially split up the two instructions.
>>> gas/
>>> * config/tc-riscv.c (percent_op_utype): Add entry for a new
>>> %got_pcrel_hi operator.
>>> * testsuite/gas/riscv/no-relax-reloc.d: Update for new
>>> %got_pcrel_hi operator test.
>>> * testsuite/gas/riscv/no-relax-reloc.s: Add a %got_pcrel_hi
>>> operator test.
>>> * testsuite/gas/riscv/relax-reloc.d: Update for new
>>> %got_pcrel_hi operator test.
>>> * testsuite/gas/riscv/relax-reloc.s: Add a %got_pcrel_hi
>>> operator test.
>>
>> We have a list of assembler operators in the psABI document
>>    https://github.com/riscv/riscv-elf-psabi-doc
>> We also have a list of assembler operators in the assembler manual
>>    https://github.com/riscv/riscv-asm-manual
>> This looks a little redundant.  It isn't clear why assembler syntax is
>> mentioned in the psABI.  It doesn't seem relevant to that.  Anyways, these
>> should be updated.

It's a bit off topic, but IIRC we didn't have an assembly manual when the psABI
doc was started so it ended up in there.  It doesn't make a whole lot of sense,
I'd be OK dropping the assembler syntax from the psABI doc.

>> It is probably best if there is a public proposal somewhere on the RISC-V side
>> instead of unilaterally changing assembler syntax, particularly given that it
>> is part of the psABI (even though it probably shouldn't be).  Someone on the
>> LLVM side for instance might want to offer an opinion.  An issue filed with the
>> psABI or assembler manual, or an email sent to [hidden email] is probably
>> sufficient.
>
> Ok, makes sense to get it standardised. I'll file an issue/PR against
> riscv-asm-manual as that seems the more logical place of the two repositories
> to have the discussion, and reach out to the mailing list if nobody bites.

Specifically: we want to make sure the LLVM syntax stays in sync with the GCC
syntax.  Alex (To'd) is the person to talk to on the LLVM side, but our general
practice is to propose assembler syntax additions in the spec and then point it
out on sw-dev for good measure.

>> Maybe the operator could just be %got_hi?  Not clear why we need the pcrel in
>> there.  The reloc itself is just R_RISCV_GOT_HI20.
>
> I wasn't sure which to go for, as there's some inconsistency. We have
> %tls_{ie,gd}_pcrel_hi that map to R_RISCV_TLS_GOT_HI20, which would lead to
> %got_pcrel_hi being the logical choice, but also %tprel_hi mapping to
> R_RISCV_TPREL_HI20. However, %tprel_hi uses %tprel_lo for the second half,
> whereas %tls_{ie,gd}_pcrel_hi use %pcrel_lo for the second half, so given we
> also use %pcrel_lo here I decided that it made sense to match that.

Andrew (also To'd) would know for sure, as this predates my involvement, but
I'm pretty sure these all came from MIPS and then just sort of evolved until
they did something useful.  At some point the relocations were all redesigned
for RISC-V -- that one I was around for, and I'm pretty sure we decided not to
mess with the assembler syntax which is probably why the mappings appear
nonsensical.

Given that MIPS has "%got_hi", I'd also go with "%got_hi" -- at least that way
we're consistently inconsistent :).  I'm fine either way, though.

>> Do you have a copyright assignment for binutils?  I found ones for mach, hurd,
>> and glibc.  I don't see an obvious binutils one.
>
> No, it's something I should have done years ago. I've had small patches
> accepted, but I don't know whether this is regarded as small enough. Either
> way, I've just sent in a request for the binutils (and gcc while I'm at it)
> forms.
>
> James
>
>> Otherwise this looks OK to me.
>>
>> Jim

Thanks!
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Re: [PATCH] RISC-V: Add %got_pcrel_hi operator

Andrew Waterman-2
On Wed, Nov 7, 2018 at 6:10 PM Palmer Dabbelt <[hidden email]> wrote:

> On Wed, 07 Nov 2018 17:22:18 PST (-0800), [hidden email] wrote:
> > On 8 Nov 2018, at 00:40, Jim Wilson <[hidden email]> wrote:
> >> On 11/7/18 10:27 AM, James Clarke wrote:
> >>> This operator allows compilers to expand the "la" pseduo-instruction
> and
> >>> potentially split up the two instructions.
> >>> gas/
> >>>     * config/tc-riscv.c (percent_op_utype): Add entry for a new
> >>>     %got_pcrel_hi operator.
> >>>     * testsuite/gas/riscv/no-relax-reloc.d: Update for new
> >>>     %got_pcrel_hi operator test.
> >>>     * testsuite/gas/riscv/no-relax-reloc.s: Add a %got_pcrel_hi
> >>>     operator test.
> >>>     * testsuite/gas/riscv/relax-reloc.d: Update for new
> >>>     %got_pcrel_hi operator test.
> >>>     * testsuite/gas/riscv/relax-reloc.s: Add a %got_pcrel_hi
> >>>     operator test.
> >>
> >> We have a list of assembler operators in the psABI document
> >>    https://github.com/riscv/riscv-elf-psabi-doc
> >> We also have a list of assembler operators in the assembler manual
> >>    https://github.com/riscv/riscv-asm-manual
> >> This looks a little redundant.  It isn't clear why assembler syntax is
> >> mentioned in the psABI.  It doesn't seem relevant to that.  Anyways,
> these
> >> should be updated.
>
> It's a bit off topic, but IIRC we didn't have an assembly manual when the
> psABI
> doc was started so it ended up in there.  It doesn't make a whole lot of
> sense,
> I'd be OK dropping the assembler syntax from the psABI doc.
>
> >> It is probably best if there is a public proposal somewhere on the
> RISC-V side
> >> instead of unilaterally changing assembler syntax, particularly given
> that it
> >> is part of the psABI (even though it probably shouldn't be).  Someone
> on the
> >> LLVM side for instance might want to offer an opinion.  An issue filed
> with the
> >> psABI or assembler manual, or an email sent to [hidden email] is
> probably
> >> sufficient.
> >
> > Ok, makes sense to get it standardised. I'll file an issue/PR against
> > riscv-asm-manual as that seems the more logical place of the two
> repositories
> > to have the discussion, and reach out to the mailing list if nobody
> bites.
>
> Specifically: we want to make sure the LLVM syntax stays in sync with the
> GCC
> syntax.  Alex (To'd) is the person to talk to on the LLVM side, but our
> general
> practice is to propose assembler syntax additions in the spec and then
> point it
> out on sw-dev for good measure.
>
> >> Maybe the operator could just be %got_hi?  Not clear why we need the
> pcrel in
> >> there.  The reloc itself is just R_RISCV_GOT_HI20.
> >
> > I wasn't sure which to go for, as there's some inconsistency. We have
> > %tls_{ie,gd}_pcrel_hi that map to R_RISCV_TLS_GOT_HI20, which would lead
> to
> > %got_pcrel_hi being the logical choice, but also %tprel_hi mapping to
> > R_RISCV_TPREL_HI20. However, %tprel_hi uses %tprel_lo for the second
> half,
> > whereas %tls_{ie,gd}_pcrel_hi use %pcrel_lo for the second half, so
> given we
> > also use %pcrel_lo here I decided that it made sense to match that.
>
> Andrew (also To'd) would know for sure, as this predates my involvement,
> but
> I'm pretty sure these all came from MIPS and then just sort of evolved
> until
> they did something useful.  At some point the relocations were all
> redesigned
> for RISC-V -- that one I was around for, and I'm pretty sure we decided
> not to
> mess with the assembler syntax which is probably why the mappings appear
> nonsensical.
>
> Given that MIPS has "%got_hi", I'd also go with "%got_hi" -- at least that
> way
> we're consistently inconsistent :).  I'm fine either way, though.


The inconsistency is surely my fault - I don’t think we can blame MIPS this
time.

got_pcrel_hi seems better to me, but it’s not a strong opinion.


>
> >> Do you have a copyright assignment for binutils?  I found ones for
> mach, hurd,
> >> and glibc.  I don't see an obvious binutils one.
> >
> > No, it's something I should have done years ago. I've had small patches
> > accepted, but I don't know whether this is regarded as small enough.
> Either
> > way, I've just sent in a request for the binutils (and gcc while I'm at
> it)
> > forms.
> >
> > James
> >
> >> Otherwise this looks OK to me.
> >>
> >> Jim
>
> Thanks!
>
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Re: [PATCH] RISC-V: Add %got_pcrel_hi operator

James Clarke
In reply to this post by Palmer Dabbelt-2
On 8 Nov 2018, at 02:10, Palmer Dabbelt <[hidden email]> wrote:

> On Wed, 07 Nov 2018 17:22:18 PST (-0800), [hidden email] wrote:
>> On 8 Nov 2018, at 00:40, Jim Wilson <[hidden email]> wrote:
>>> On 11/7/18 10:27 AM, James Clarke wrote:
>>>> This operator allows compilers to expand the "la" pseduo-instruction and
>>>> potentially split up the two instructions.
>>>> gas/
>>>> * config/tc-riscv.c (percent_op_utype): Add entry for a new
>>>> %got_pcrel_hi operator.
>>>> * testsuite/gas/riscv/no-relax-reloc.d: Update for new
>>>> %got_pcrel_hi operator test.
>>>> * testsuite/gas/riscv/no-relax-reloc.s: Add a %got_pcrel_hi
>>>> operator test.
>>>> * testsuite/gas/riscv/relax-reloc.d: Update for new
>>>> %got_pcrel_hi operator test.
>>>> * testsuite/gas/riscv/relax-reloc.s: Add a %got_pcrel_hi
>>>> operator test.
>>> We have a list of assembler operators in the psABI document
>>>   https://github.com/riscv/riscv-elf-psabi-doc
>>> We also have a list of assembler operators in the assembler manual
>>>   https://github.com/riscv/riscv-asm-manual
>>> This looks a little redundant.  It isn't clear why assembler syntax is
>>> mentioned in the psABI.  It doesn't seem relevant to that.  Anyways, these
>>> should be updated.
>
> It's a bit off topic, but IIRC we didn't have an assembly manual when the psABI doc was started so it ended up in there.  It doesn't make a whole lot of sense, I'd be OK dropping the assembler syntax from the psABI doc.

That's a discussion for later. I've opened [1] against riscv-asm-manual, so
let's take this discussion there.

James

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Re: [PATCH] RISC-V: Add %got_pcrel_hi operator

Palmer Dabbelt-2
On Thu, 08 Nov 2018 03:35:52 PST (-0800), [hidden email] wrote:

> On 8 Nov 2018, at 02:10, Palmer Dabbelt <[hidden email]> wrote:
>> On Wed, 07 Nov 2018 17:22:18 PST (-0800), [hidden email] wrote:
>>> On 8 Nov 2018, at 00:40, Jim Wilson <[hidden email]> wrote:
>>>> On 11/7/18 10:27 AM, James Clarke wrote:
>>>>> This operator allows compilers to expand the "la" pseduo-instruction and
>>>>> potentially split up the two instructions.
>>>>> gas/
>>>>> * config/tc-riscv.c (percent_op_utype): Add entry for a new
>>>>> %got_pcrel_hi operator.
>>>>> * testsuite/gas/riscv/no-relax-reloc.d: Update for new
>>>>> %got_pcrel_hi operator test.
>>>>> * testsuite/gas/riscv/no-relax-reloc.s: Add a %got_pcrel_hi
>>>>> operator test.
>>>>> * testsuite/gas/riscv/relax-reloc.d: Update for new
>>>>> %got_pcrel_hi operator test.
>>>>> * testsuite/gas/riscv/relax-reloc.s: Add a %got_pcrel_hi
>>>>> operator test.
>>>> We have a list of assembler operators in the psABI document
>>>>   https://github.com/riscv/riscv-elf-psabi-doc
>>>> We also have a list of assembler operators in the assembler manual
>>>>   https://github.com/riscv/riscv-asm-manual
>>>> This looks a little redundant.  It isn't clear why assembler syntax is
>>>> mentioned in the psABI.  It doesn't seem relevant to that.  Anyways, these
>>>> should be updated.
>>
>> It's a bit off topic, but IIRC we didn't have an assembly manual when the psABI doc was started so it ended up in there.  It doesn't make a whole lot of sense, I'd be OK dropping the assembler syntax from the psABI doc.
>
> That's a discussion for later. I've opened [1] against riscv-asm-manual, so
> let's take this discussion there.

Thanks!
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Re: [PATCH] RISC-V: Add %got_pcrel_hi operator

James Clarke
In reply to this post by James Clarke
On 8 Nov 2018, at 11:35, James Clarke <[hidden email]> wrote:

> On 8 Nov 2018, at 02:10, Palmer Dabbelt <[hidden email]> wrote:
>> On Wed, 07 Nov 2018 17:22:18 PST (-0800), [hidden email] wrote:
>>> On 8 Nov 2018, at 00:40, Jim Wilson <[hidden email]> wrote:
>>>> On 11/7/18 10:27 AM, James Clarke wrote:
>>>>> This operator allows compilers to expand the "la" pseduo-instruction and
>>>>> potentially split up the two instructions.
>>>>> gas/
>>>>> * config/tc-riscv.c (percent_op_utype): Add entry for a new
>>>>> %got_pcrel_hi operator.
>>>>> * testsuite/gas/riscv/no-relax-reloc.d: Update for new
>>>>> %got_pcrel_hi operator test.
>>>>> * testsuite/gas/riscv/no-relax-reloc.s: Add a %got_pcrel_hi
>>>>> operator test.
>>>>> * testsuite/gas/riscv/relax-reloc.d: Update for new
>>>>> %got_pcrel_hi operator test.
>>>>> * testsuite/gas/riscv/relax-reloc.s: Add a %got_pcrel_hi
>>>>> operator test.
>>>> We have a list of assembler operators in the psABI document
>>>>  https://github.com/riscv/riscv-elf-psabi-doc
>>>> We also have a list of assembler operators in the assembler manual
>>>>  https://github.com/riscv/riscv-asm-manual
>>>> This looks a little redundant.  It isn't clear why assembler syntax is
>>>> mentioned in the psABI.  It doesn't seem relevant to that.  Anyways, these
>>>> should be updated.
>>
>> It's a bit off topic, but IIRC we didn't have an assembly manual when the psABI doc was started so it ended up in there.  It doesn't make a whole lot of sense, I'd be OK dropping the assembler syntax from the psABI doc.
>
> That's a discussion for later. I've opened [1] against riscv-asm-manual, so
> let's take this discussion there.
>
> James

[1] https://github.com/riscv/riscv-asm-manual/pull/16

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Re: [PATCH] RISC-V: Add %got_pcrel_hi operator

Jim Wilson-2
On Thu, Nov 8, 2018 at 3:28 PM James Clarke <[hidden email]> wrote:
> > That's a discussion for later. I've opened [1] against riscv-asm-manual, so
> > let's take this discussion there.
> >
> > James
>
> [1] https://github.com/riscv/riscv-asm-manual/pull/16

There has been no contrary opinions offered there, so I approved the
riscv-asm-manual patch, though I don't have write access to commit it.
I see your binutils/gcc assignment came in over the weekend, so that
is good too.  I'm approving your binutils patch.  I don't know if you
have write access to binutils.  Do you want me to commit the binutils
patch?  I do have write access for that.

Jim
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Re: [PATCH] RISC-V: Add %got_pcrel_hi operator

Palmer Dabbelt-2
On Tue, 13 Nov 2018 16:09:57 PST (-0800), Jim Wilson wrote:

> On Thu, Nov 8, 2018 at 3:28 PM James Clarke <[hidden email]> wrote:
>> > That's a discussion for later. I've opened [1] against riscv-asm-manual, so
>> > let's take this discussion there.
>> >
>> > James
>>
>> [1] https://github.com/riscv/riscv-asm-manual/pull/16
>
> There has been no contrary opinions offered there, so I approved the
> riscv-asm-manual patch, though I don't have write access to commit it.

You should now.

> I see your binutils/gcc assignment came in over the weekend, so that
> is good too.  I'm approving your binutils patch.  I don't know if you
> have write access to binutils.  Do you want me to commit the binutils
> patch?  I do have write access for that.