[PATCH, BINUTILS, AARCH64, 3/8] Add Pointer Arithmetic instructions in Memory Tagging Extension

classic Classic list List threaded Threaded
5 messages Options
Reply | Threaded
Open this post in threaded view
|

[PATCH, BINUTILS, AARCH64, 3/8] Add Pointer Arithmetic instructions in Memory Tagging Extension

Sudakshina Das
Hi

This patch is part of the patch series to add support for ARMv8.5-A
Memory Tagging Extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
Memory Tagging Extension (MTE) is an optional extension to
ARMv8.5-A and is enabled using the +memtag command line option.

This patch add support to the Pointer Arithmetic instructions from
MTE. These are the following instructions added in this patch:
- SUBP <Xd>, <Xn|SP>, <Xm|SP>
- SUBPS <Xd>, <Xn|SP>, <Xm|SP>
- CMPP <Xn|SP>, <Xm|SP>
where CMPP is an alias to SUBPS XZR, <Xn|SP>, <Xm|SP>

where
<Xd> : Is the 64-bit destination GPR.
<Xn|SP> : Is the 64-bit first source GPR or Stack pointer.
<Xm|SP> : Is the 64-bit second source GPR or Stack pointer.

Testing done: Builds and reg tests all pass on aarch64-none-linux-gnu.
Added test.

Is this ok for trunk?

Thanks
Sudi

*** opcodes/ChangeLog ***

2018-xx-xx  Sudakshina Das  <[hidden email]>

        * aarch64-tbl.h (aarch64_opcode_table): Add subp, subps and
        cmpp.
        * aarch64-asm-2.c: Regenarated.
        * aarch64-dis-2.c: Regenerated.
        * aarch64-opc-2.c: Regenerated.

*** gas/ChangeLog ***

2018-xx-xx  Sudakshina Das  <[hidden email]>

        * testsuite/gas/aarch64/armv8_5-a-mte.s: Add tests for subp,
        subps and cmpp.
        * testsuite/gas/aarch64/armv8_5-a-mte.d: Likewise.



patch3.tar.gz (65K) Download Attachment
Reply | Threaded
Open this post in threaded view
|

Re: [PATCH, BINUTILS, AARCH64, 3/8] Add Pointer Arithmetic instructions in Memory Tagging Extension

Richard Earnshaw (lists)
On 09/10/2018 18:24, Sudakshina Das wrote:

> Hi
>
> This patch is part of the patch series to add support for ARMv8.5-A
> Memory Tagging Extensions.
> (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
> Memory Tagging Extension (MTE) is an optional extension to
> ARMv8.5-A and is enabled using the +memtag command line option.
>
> This patch add support to the Pointer Arithmetic instructions from
> MTE. These are the following instructions added in this patch:
> - SUBP <Xd>, <Xn|SP>, <Xm|SP>
> - SUBPS <Xd>, <Xn|SP>, <Xm|SP>
> - CMPP <Xn|SP>, <Xm|SP>
> where CMPP is an alias to SUBPS XZR, <Xn|SP>, <Xm|SP>
>
> where
> <Xd> : Is the 64-bit destination GPR.
> <Xn|SP> : Is the 64-bit first source GPR or Stack pointer.
> <Xm|SP> : Is the 64-bit second source GPR or Stack pointer.
>
> Testing done: Builds and reg tests all pass on aarch64-none-linux-gnu.
> Added test.
>
> Is this ok for trunk?
>
> Thanks
> Sudi
>
> *** opcodes/ChangeLog ***
>
> 2018-xx-xx  Sudakshina Das  <[hidden email]>
>
> * aarch64-tbl.h (aarch64_opcode_table): Add subp, subps and
> cmpp.
> * aarch64-asm-2.c: Regenarated.
> * aarch64-dis-2.c: Regenerated.
> * aarch64-opc-2.c: Regenerated.
>
> *** gas/ChangeLog ***
>
> 2018-xx-xx  Sudakshina Das  <[hidden email]>
>
> * testsuite/gas/aarch64/armv8_5-a-mte.s: Add tests for subp,
> subps and cmpp.
> * testsuite/gas/aarch64/armv8_5-a-mte.d: Likewise.
>
>

OK with the MTE/MEMTAG issue fixed.

R.
Reply | Threaded
Open this post in threaded view
|

Re: [PATCH, BINUTILS, AARCH64, 3/8] Add Pointer Arithmetic instructions in Memory Tagging Extension

Sudakshina Das
Hi Richard

On 30/10/18 09:46, Richard Earnshaw (lists) wrote:

> On 09/10/2018 18:24, Sudakshina Das wrote:
>> Hi
>>
>> This patch is part of the patch series to add support for ARMv8.5-A
>> Memory Tagging Extensions.
>> (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
>> Memory Tagging Extension (MTE) is an optional extension to
>> ARMv8.5-A and is enabled using the +memtag command line option.
>>
>> This patch add support to the Pointer Arithmetic instructions from
>> MTE. These are the following instructions added in this patch:
>> - SUBP <Xd>, <Xn|SP>, <Xm|SP>
>> - SUBPS <Xd>, <Xn|SP>, <Xm|SP>
>> - CMPP <Xn|SP>, <Xm|SP>
>> where CMPP is an alias to SUBPS XZR, <Xn|SP>, <Xm|SP>
>>
>> where
>> <Xd> : Is the 64-bit destination GPR.
>> <Xn|SP> : Is the 64-bit first source GPR or Stack pointer.
>> <Xm|SP> : Is the 64-bit second source GPR or Stack pointer.
>>
>> Testing done: Builds and reg tests all pass on aarch64-none-linux-gnu.
>> Added test.
>>
>> Is this ok for trunk?
>>
>> Thanks
>> Sudi
>>
>> *** opcodes/ChangeLog ***
>>
>> 2018-xx-xx  Sudakshina Das  <[hidden email]>
>>
>> * aarch64-tbl.h (aarch64_opcode_table): Add subp, subps and
>> cmpp.
>> * aarch64-asm-2.c: Regenarated.
>> * aarch64-dis-2.c: Regenerated.
>> * aarch64-opc-2.c: Regenerated.
>>
>> *** gas/ChangeLog ***
>>
>> 2018-xx-xx  Sudakshina Das  <[hidden email]>
>>
>> * testsuite/gas/aarch64/armv8_5-a-mte.s: Add tests for subp,
>> subps and cmpp.
>> * testsuite/gas/aarch64/armv8_5-a-mte.d: Likewise.
>>
>>
>
> OK with the MTE/MEMTAG issue fixed.
>
> R. >
Adding new patch with test case changes.

*** opcodes/ChangeLog ***

2018-xx-xx  Sudakshina Das  <[hidden email]>

        * aarch64-tbl.h (aarch64_opcode_table): Add subp, subps and
        cmpp.
        * aarch64-asm-2.c: Regenerated.
        * aarch64-dis-2.c: Regenerated.
        * aarch64-opc-2.c: Regenerated.

*** gas/ChangeLog ***

2018-xx-xx  Sudakshina Das  <[hidden email]>

        * testsuite/gas/aarch64/armv8_5-a-memtag.s: Add tests for subp,
        subps and cmpp.
        * testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise.
        * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
        * testsuite/gas/aarch64/illegal-memtag.l: Likewise.

Thanks
Sudi




patch3.tar.gz (65K) Download Attachment
Reply | Threaded
Open this post in threaded view
|

Re: [PATCH, BINUTILS, AARCH64, 3/8] Add Pointer Arithmetic instructions in Memory Tagging Extension

Sudakshina Das
Hi Richard

On 02/11/18 16:09, Sudakshina Das wrote:

> Hi Richard
>
> On 30/10/18 09:46, Richard Earnshaw (lists) wrote:
>> On 09/10/2018 18:24, Sudakshina Das wrote:
>>> Hi
>>>
>>> This patch is part of the patch series to add support for ARMv8.5-A
>>> Memory Tagging Extensions.
>>> (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
>>>
>>> Memory Tagging Extension (MTE) is an optional extension to
>>> ARMv8.5-A and is enabled using the +memtag command line option.
>>>
>>> This patch add support to the Pointer Arithmetic instructions from
>>> MTE. These are the following instructions added in this patch:
>>> - SUBP <Xd>, <Xn|SP>, <Xm|SP>
>>> - SUBPS <Xd>, <Xn|SP>, <Xm|SP>
>>> - CMPP <Xn|SP>, <Xm|SP>
>>> where CMPP is an alias to SUBPS XZR, <Xn|SP>, <Xm|SP>
>>>
>>> where
>>> <Xd> : Is the 64-bit destination GPR.
>>> <Xn|SP> : Is the 64-bit first source GPR or Stack pointer.
>>> <Xm|SP> : Is the 64-bit second source GPR or Stack pointer.
>>>
>>> Testing done: Builds and reg tests all pass on aarch64-none-linux-gnu.
>>> Added test.
>>>
>>> Is this ok for trunk?
>>>
>>> Thanks
>>> Sudi
>>>
>>> *** opcodes/ChangeLog ***
>>>
>>> 2018-xx-xx  Sudakshina Das  <[hidden email]>
>>>
>>>     * aarch64-tbl.h (aarch64_opcode_table): Add subp, subps and
>>>     cmpp.
>>>     * aarch64-asm-2.c: Regenarated.
>>>     * aarch64-dis-2.c: Regenerated.
>>>     * aarch64-opc-2.c: Regenerated.
>>>
>>> *** gas/ChangeLog ***
>>>
>>> 2018-xx-xx  Sudakshina Das  <[hidden email]>
>>>
>>>     * testsuite/gas/aarch64/armv8_5-a-mte.s: Add tests for subp,
>>>     subps and cmpp.
>>>     * testsuite/gas/aarch64/armv8_5-a-mte.d: Likewise.
>>>
>>>
>>
>> OK with the MTE/MEMTAG issue fixed.
>>
>> R. >
> Adding new patch with test case changes.
>
> *** opcodes/ChangeLog ***
>
> 2018-xx-xx  Sudakshina Das  <[hidden email]>
>
>      * aarch64-tbl.h (aarch64_opcode_table): Add subp, subps and
>      cmpp.
>      * aarch64-asm-2.c: Regenerated.
>      * aarch64-dis-2.c: Regenerated.
>      * aarch64-opc-2.c: Regenerated.
>
> *** gas/ChangeLog ***
>
> 2018-xx-xx  Sudakshina Das  <[hidden email]>
>
>      * testsuite/gas/aarch64/armv8_5-a-memtag.s: Add tests for subp,
>      subps and cmpp.
>      * testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise.
>      * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
>      * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
>
New patch. Changelog still applies.

Sudi

> Thanks
> Sudi
>
>
>


rb10007.patch (6K) Download Attachment
Reply | Threaded
Open this post in threaded view
|

Re: [PATCH, BINUTILS, AARCH64, 3/8] Add Pointer Arithmetic instructions in Memory Tagging Extension

Richard Earnshaw (lists)
On 08/11/2018 10:34, Sudakshina Das wrote:

> Hi Richard
>
> On 02/11/18 16:09, Sudakshina Das wrote:
>> Hi Richard
>>
>> On 30/10/18 09:46, Richard Earnshaw (lists) wrote:
>>> On 09/10/2018 18:24, Sudakshina Das wrote:
>>>> Hi
>>>>
>>>> This patch is part of the patch series to add support for ARMv8.5-A
>>>> Memory Tagging Extensions.
>>>> (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
>>>>
>>>> Memory Tagging Extension (MTE) is an optional extension to
>>>> ARMv8.5-A and is enabled using the +memtag command line option.
>>>>
>>>> This patch add support to the Pointer Arithmetic instructions from
>>>> MTE. These are the following instructions added in this patch:
>>>> - SUBP <Xd>, <Xn|SP>, <Xm|SP>
>>>> - SUBPS <Xd>, <Xn|SP>, <Xm|SP>
>>>> - CMPP <Xn|SP>, <Xm|SP>
>>>> where CMPP is an alias to SUBPS XZR, <Xn|SP>, <Xm|SP>
>>>>
>>>> where
>>>> <Xd> : Is the 64-bit destination GPR.
>>>> <Xn|SP> : Is the 64-bit first source GPR or Stack pointer.
>>>> <Xm|SP> : Is the 64-bit second source GPR or Stack pointer.
>>>>
>>>> Testing done: Builds and reg tests all pass on aarch64-none-linux-gnu.
>>>> Added test.
>>>>
>>>> Is this ok for trunk?
>>>>
>>>> Thanks
>>>> Sudi
>>>>
>>>> *** opcodes/ChangeLog ***
>>>>
>>>> 2018-xx-xx  Sudakshina Das  <[hidden email]>
>>>>
>>>>     * aarch64-tbl.h (aarch64_opcode_table): Add subp, subps and
>>>>     cmpp.
>>>>     * aarch64-asm-2.c: Regenarated.
>>>>     * aarch64-dis-2.c: Regenerated.
>>>>     * aarch64-opc-2.c: Regenerated.
>>>>
>>>> *** gas/ChangeLog ***
>>>>
>>>> 2018-xx-xx  Sudakshina Das  <[hidden email]>
>>>>
>>>>     * testsuite/gas/aarch64/armv8_5-a-mte.s: Add tests for subp,
>>>>     subps and cmpp.
>>>>     * testsuite/gas/aarch64/armv8_5-a-mte.d: Likewise.
>>>>
>>>>
>>>
>>> OK with the MTE/MEMTAG issue fixed.
>>>
>>> R. >
>> Adding new patch with test case changes.
>>
>> *** opcodes/ChangeLog ***
>>
>> 2018-xx-xx  Sudakshina Das  <[hidden email]>
>>
>>      * aarch64-tbl.h (aarch64_opcode_table): Add subp, subps and
>>      cmpp.
>>      * aarch64-asm-2.c: Regenerated.
>>      * aarch64-dis-2.c: Regenerated.
>>      * aarch64-opc-2.c: Regenerated.
>>
>> *** gas/ChangeLog ***
>>
>> 2018-xx-xx  Sudakshina Das  <[hidden email]>
>>
>>      * testsuite/gas/aarch64/armv8_5-a-memtag.s: Add tests for subp,
>>      subps and cmpp.
>>      * testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise.
>>      * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
>>      * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
>>
> New patch. Changelog still applies.

OK.

R.

>
> Sudi
>
>> Thanks
>> Sudi
>>
>>
>>
>
>
> rb10007.patch
>
> diff --git a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d
> index 461046194822a0f836c179dac3965c404e30e45b..a7cb6c4a6adcced8d1ec6c56f6f5293f3d4f773d 100644
> --- a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d
> +++ b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d
> @@ -33,3 +33,25 @@ Disassembly of section \.text:
>  .*: d180037b subg x27, x27, #0x0, #0x0
>  .*: d1bf3fe0 subg x0, sp, #0x3f0, #0xf
>  .*: d1bf141f subg sp, x0, #0x3f0, #0x5
> +.*: 9ac00000 subp x0, x0, x0
> +.*: 9ac0001b subp x27, x0, x0
> +.*: 9ac00360 subp x0, x27, x0
> +.*: 9adb0000 subp x0, x0, x27
> +.*: 9adb037b subp x27, x27, x27
> +.*: 9ac003e0 subp x0, sp, x0
> +.*: 9adf0000 subp x0, x0, sp
> +.*: 9ac0001f subp xzr, x0, x0
> +.*: bac00000 subps x0, x0, x0
> +.*: bac0001b subps x27, x0, x0
> +.*: bac00360 subps x0, x27, x0
> +.*: badb0000 subps x0, x0, x27
> +.*: badb037b subps x27, x27, x27
> +.*: bac003e0 subps x0, sp, x0
> +.*: badf0000 subps x0, x0, sp
> +.*: bac0001f cmpp x0, x0
> +.*: bac0001f cmpp x0, x0
> +.*: bac0037f cmpp x27, x0
> +.*: badb001f cmpp x0, x27
> +.*: badb037f cmpp x27, x27
> +.*: bac003ff cmpp sp, x0
> +.*: badf001f cmpp x0, sp
> diff --git a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s
> index 96a3f3756ec813b9cb93ca705750b56b3d588459..f17f87efdb4ad92e89739028235b0ba8f5add0d9 100644
> --- a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s
> +++ b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s
> @@ -35,3 +35,23 @@ func:
>   expand_2_reg subg
>   subg x0, sp, #0x3f0, #0xf
>   subg sp, x0, #0x3f0, #0x5
> +
> + # SUBP
> + expand_3_reg subp
> + subp x0, sp, x0
> + subp x0, x0, sp
> + subp xzr, x0, x0
> +
> + # SUBPS
> + expand_3_reg subps
> + subps x0, sp, x0
> + subps x0, x0, sp
> + subps xzr, x0, x0
> +
> + # CMPP
> + cmpp x0, x0
> + cmpp x27, x0
> + cmpp x0, x27
> + cmpp x27, x27
> + cmpp sp, x0
> + cmpp x0, sp
> diff --git a/gas/testsuite/gas/aarch64/illegal-memtag.l b/gas/testsuite/gas/aarch64/illegal-memtag.l
> index 501faa76fc2057fb628d84757b3d6ddd40aafe75..4da0c3540a353b968dc8a54161881bcc220f0bd6 100644
> --- a/gas/testsuite/gas/aarch64/illegal-memtag.l
> +++ b/gas/testsuite/gas/aarch64/illegal-memtag.l
> @@ -12,3 +12,11 @@
>  [^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `gmi x1,xzr,x3'
>  [^:]*:[0-9]+: Error: operand 1 must be an integer or stack pointer register -- `addg xzr,x2,#0,#0'
>  [^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `subg x1,xzr,#0,#0'
> +[^:]*:[0-9]+: Error: operand 1 must be an integer register -- `subp sp,x1,x2'
> +[^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `subp x1,xzr,x2'
> +[^:]*:[0-9]+: Error: operand 3 must be an integer or stack pointer register -- `subp x1,x2,xzr'
> +[^:]*:[0-9]+: Error: operand 1 must be an integer register -- `subps sp,x1,x2'
> +[^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `subps x1,xzr,x2'
> +[^:]*:[0-9]+: Error: operand 3 must be an integer or stack pointer register -- `subps x1,x2,xzr'
> +[^:]*:[0-9]+: Error: operand 1 must be an integer or stack pointer register -- `cmpp xzr,x2'
> +[^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `cmpp x2,xzr'
> diff --git a/gas/testsuite/gas/aarch64/illegal-memtag.s b/gas/testsuite/gas/aarch64/illegal-memtag.s
> index 05f3ead5c94abb50c0717d27c11370ebd0ebc875..7eab07f4d85591df898ed14f0d2ff86327445892 100644
> --- a/gas/testsuite/gas/aarch64/illegal-memtag.s
> +++ b/gas/testsuite/gas/aarch64/illegal-memtag.s
> @@ -17,3 +17,11 @@ func:
>   gmi x1, xzr, x3
>   addg xzr, x2, #0, #0
>   subg x1, xzr, #0, #0
> + subp sp, x1, x2
> + subp x1, xzr, x2
> + subp x1, x2, xzr
> + subps sp, x1, x2
> + subps x1, xzr, x2
> + subps x1, x2, xzr
> + cmpp xzr, x2
> + cmpp x2, xzr
> diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
> index a599b931d7fea623910ac7f60d82df73e636a408..498315835593add8efcc097948005ce53fb66556 100644
> --- a/opcodes/aarch64-tbl.h
> +++ b/opcodes/aarch64-tbl.h
> @@ -3044,6 +3044,9 @@ struct aarch64_opcode aarch64_opcode_table[] =
>    CORE_INSN ("asr",   0x1ac02800, 0x7fe0fc00, dp_2src, 0, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_SF | F_ALIAS),
>    CORE_INSN ("rorv",  0x1ac02c00, 0x7fe0fc00, dp_2src, 0, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_SF | F_HAS_ALIAS),
>    CORE_INSN ("ror",   0x1ac02c00, 0x7fe0fc00, dp_2src, 0, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_SF | F_ALIAS),
> +  MEMTAG_INSN ("subp",   0x9ac00000, 0xffe0fc00, dp_2src, OP3 (Rd, Rn_SP, Rm_SP), QL_I3SAMEX, 0),
> +  MEMTAG_INSN ("subps",  0xbac00000, 0xffe0fc00, dp_2src, OP3 (Rd, Rn_SP, Rm_SP), QL_I3SAMEX, F_HAS_ALIAS),
> +  MEMTAG_INSN ("cmpp",   0xbac0001f, 0xffe0fc1f, dp_2src, OP2 (Rn_SP, Rm_SP), QL_I2SAMEX, F_ALIAS),
>    MEMTAG_INSN ("irg",    0x9ac01000, 0xffe0fc00, dp_2src, OP3 (Rd_SP, Rn_SP, Rm), QL_I3SAMEX, F_OPD2_OPT | F_DEFAULT (0x1f)),
>    MEMTAG_INSN ("gmi",    0x9ac01400, 0xffe0fc00, dp_2src, OP3 (Rd, Rn_SP, Rm), QL_I3SAMEX, 0),
>    V8_3_INSN ("pacga", 0x9ac03000, 0xffe0fc00, dp_2src, OP3 (Rd, Rn, Rm_SP), QL_I3SAMEX, 0),
>