[PATCH 2/5] RX: include - Add RXv3 support.

classic Classic list List threaded Threaded
2 messages Options
Reply | Threaded
Open this post in threaded view
|

[PATCH 2/5] RX: include - Add RXv3 support.

Yoshinori Sato
        * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
        (E_FLAG_RX_V3): New RXv3 type.
        * opcode/rx.h (RX_Size): Add double size.
        (RX_Operand_Type): Add double FPU registers.
        (RX_Opcode_ID): Add new instuctions.
---
 include/ChangeLog   |  8 ++++++++
 include/elf/rx.h    |  3 ++-
 include/opcode/rx.h | 32 ++++++++++++++++++++++++++++++++
 3 files changed, 42 insertions(+), 1 deletion(-)

diff --git a/include/ChangeLog b/include/ChangeLog
index 5e6ed7e62b..16c30dc7b5 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,11 @@
+2018-12-25  Yoshinori Sato <[hidden email]>
+
+ * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
+ (E_FLAG_RX_V3): New RXv3 type.
+ * opcode/rx.h (RX_Size): Add double size.
+ (RX_Operand_Type): Add double FPU registers.
+ (RX_Opcode_ID): Add new instuctions.
+
 2018-12-14  H.J. Lu  <[hidden email]>
 
  PR ld/23900
diff --git a/include/elf/rx.h b/include/elf/rx.h
index c449cdcc2d..fe24fd60ca 100644
--- a/include/elf/rx.h
+++ b/include/elf/rx.h
@@ -111,7 +111,7 @@ START_RELOC_NUMBERS (elf_rx_reloc_type)
 END_RELOC_NUMBERS (R_RX_max)
 
 #define EF_RX_CPU_RX 0x00000079      /* FIXME: this collides with the E_FLAG_RX_... values below.  */
-#define EF_RX_CPU_MASK 0x0000007F /* specific cpu bits.  */
+#define EF_RX_CPU_MASK 0x000003FF /* specific cpu bits.  */
 #define EF_RX_ALL_FLAGS (EF_RX_CPU_MASK)
 
 /* Values for the e_flags field in the ELF header.  */
@@ -124,6 +124,7 @@ END_RELOC_NUMBERS (R_RX_max)
 #define E_FLAG_RX_SINSNS_NO 0        /* Bit-5 if this binary must not be linked with a string instruction using binary.  */
 #define E_FLAG_RX_SINSNS_MASK (3 << 6) /* Mask of bits used to determine string instruction use.  */
 #define E_FLAG_RX_V2 (1 << 8) /* RX v2 instructions */
+#define E_FLAG_RX_V3 (1 << 9) /* RX v3 instructions */
 
 /* These define the addend field of R_RX_RH_RELAX relocations.  */
 #define RX_RELAXA_IMM6 0x00000010 /* Imm8/16/24/32 at bit offset 6.  */
diff --git a/include/opcode/rx.h b/include/opcode/rx.h
index 54ff409df6..45b6482bf8 100644
--- a/include/opcode/rx.h
+++ b/include/opcode/rx.h
@@ -38,6 +38,7 @@ typedef enum
   RX_SWord,
   RX_3Byte,
   RX_Long,
+  RX_Double,
   RX_Bad_Size,
   RX_MAX_SIZE
 } RX_Size;
@@ -54,6 +55,11 @@ typedef enum
   RX_Operand_Condition, /* eq, gtu, etc */
   RX_Operand_Flag, /* [UIOSZC] */
   RX_Operand_TwoReg, /* [Rn + scale*R2] */
+  RX_Operand_DoubleReg, /* DRn */
+  RX_Operand_DoubleRegH,/* DRHn */
+  RX_Operand_DoubleRegL,/* DRLn */
+  RX_Operand_DoubleCReg,/* DCRxx */
+  RX_Operand_DoubleCond,/* UN/EQ/LE/LT */
 } RX_Operand_Type;
 
 typedef enum
@@ -180,6 +186,32 @@ typedef enum
   RXO_racl,
   RXO_rdacl,
   RXO_rdacw,
+
+  RXO_bfmov,
+  RXO_bfmovz,
+  RXO_rstr,
+  RXO_save,
+  RXO_dmov,
+  RXO_dpopm,
+  RXO_dpushm,
+  RXO_mvfdc,
+  RXO_mvfdr,
+  RXO_mvtdc,
+  RXO_dabs,
+  RXO_dadd,
+  RXO_dcmp,
+  RXO_ddiv,
+  RXO_dmul,
+  RXO_dneg,
+  RXO_dround,
+  RXO_dsqrt,
+  RXO_dsub,
+  RXO_dtoi,
+  RXO_dtof,
+  RXO_dtou,
+  RXO_ftod,
+  RXO_itod,
+  RXO_utod
 } RX_Opcode_ID;
 
 /* Condition bitpatterns, as registers.  */
--
2.11.0

Reply | Threaded
Open this post in threaded view
|

Re: [PATCH 2/5] RX: include - Add RXv3 support.

Nick Clifton
Hi Yoshinori,

> * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
> (E_FLAG_RX_V3): New RXv3 type.
> * opcode/rx.h (RX_Size): Add double size.
> (RX_Operand_Type): Add double FPU registers.
> (RX_Opcode_ID): Add new instuctions.

Approved - please apply.

Cheers
  Nick