[PATCH 00/19] x86: further disassembler fixes and folding

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[PATCH 00/19] x86: further disassembler fixes and folding

Jan Beulich-2
While the diffstat for this series (see below) is imo quite nice,
this still is only a further step towards the goal of making the
code overall more manageable by reducing the number of table
entries/branches, enumerators, macros, helper functions, and case
labels/blocks, many of which are currently redundant with one
another. Bugs are again getting fixed and other improvements made
along the road, as things were recognized.

01: x86-64: fold ILP32 test expectations
02: x86: drop dead code from OP_IMREG()
03: x86-64: don't hide an empty but meaningless REX prefix
04: x86: avoid attaching suffix to register-only CRC32
05: x86: don't disassemble MOVBE with two suffixes
06: x86: fold VCMP_Fixup() into CMP_Fixup()
07: x86-64: fix {,V}PCMPESTR{I,M} disassembly in Intel mode
08: x86: extend %BW use to VP{COMPRESS,EXPAND}{B,W}
09: x86: merge/move logic determining the EVEX disp8 shift
10: x86: replace %LW by %DQ
11: x86: drop Vex128 and Vex256
12: x86: drop need_vex_reg
13: x86: drop further EVEX table entries that can be served by VEX ones
14: x86: simplify decode of opcodes valid with (embedded) 66 prefix only
15: x86: also use %BW / %DQ for kshift*
16: x86: simplify decode of opcodes valid only without any (embedded) prefix
17: x86: drop Rdq, Rd, and MaskR
18: x86: drop Rm and the 'L' macro
19: x86/Intel: debug registers are named DRn

 gas/testsuite/gas/i386/arch-10-bdver1.d            |   39
 gas/testsuite/gas/i386/arch-10-bdver2.d            |   39
 gas/testsuite/gas/i386/arch-10-bdver3.d            |   39
 gas/testsuite/gas/i386/arch-10-bdver4.d            |   39
 gas/testsuite/gas/i386/arch-10-btver1.d            |   39
 gas/testsuite/gas/i386/arch-10-btver2.d            |   39
 gas/testsuite/gas/i386/arch-10-lzcnt.d             |   39
 gas/testsuite/gas/i386/arch-10-prefetchw.d         |   39
 gas/testsuite/gas/i386/arch-10.d                   |    2
 gas/testsuite/gas/i386/arch-2.d                    |    2
 gas/testsuite/gas/i386/arch-3.d                    |   14
 gas/testsuite/gas/i386/arch-5.d                    |    2
 gas/testsuite/gas/i386/arch-6.d                    |    2
 gas/testsuite/gas/i386/crc32-suffix.d              |   25
 gas/testsuite/gas/i386/crc32.d                     |   18
 gas/testsuite/gas/i386/i386.exp                    |    4
 gas/testsuite/gas/i386/ilp32/x86-64-arch-1.d       |   14
 gas/testsuite/gas/i386/ilp32/x86-64-arch-2.d       |   39
 gas/testsuite/gas/i386/ilp32/x86-64-avx-intel.d    | 3600 --------------
 gas/testsuite/gas/i386/ilp32/x86-64-avx.d          | 3600 --------------
 gas/testsuite/gas/i386/ilp32/x86-64-crc32-intel.d  |   33
 gas/testsuite/gas/i386/ilp32/x86-64-crc32.d        |   33
 gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d     |   25
 gas/testsuite/gas/i386/ilp32/x86-64-ifunc.d        |   18
 gas/testsuite/gas/i386/ilp32/x86-64-reg-intel.d    |   52
 gas/testsuite/gas/i386/ilp32/x86-64-reg.d          |   52
 gas/testsuite/gas/i386/ilp32/x86-64-rep-suffix.d   |   20
 gas/testsuite/gas/i386/ilp32/x86-64-sse4_2-intel.d |   84
 gas/testsuite/gas/i386/ilp32/x86-64-sse4_2.d       |   48
 gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d  |   68
 gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d |   68
 gas/testsuite/gas/i386/ilp32/x86-64-stack.d        |   68
 gas/testsuite/gas/i386/intel-intel.d               |    4
 gas/testsuite/gas/i386/intel.d                     |    2
 gas/testsuite/gas/i386/intel.s                     |    4
 gas/testsuite/gas/i386/movbe-suffix.d              |   22
 gas/testsuite/gas/i386/opcode-intel.d              |    4
 gas/testsuite/gas/i386/prefix.d                    |    8
 gas/testsuite/gas/i386/sse-noavx.d                 |    2
 gas/testsuite/gas/i386/sse4_2.d                    |   24
 gas/testsuite/gas/i386/x86-64-arch-2-bdver1.d      |   39
 gas/testsuite/gas/i386/x86-64-arch-2-bdver2.d      |   39
 gas/testsuite/gas/i386/x86-64-arch-2-bdver3.d      |   39
 gas/testsuite/gas/i386/x86-64-arch-2-bdver4.d      |   39
 gas/testsuite/gas/i386/x86-64-arch-2-btver1.d      |   39
 gas/testsuite/gas/i386/x86-64-arch-2-btver2.d      |   39
 gas/testsuite/gas/i386/x86-64-arch-2-lzcnt.d       |   39
 gas/testsuite/gas/i386/x86-64-arch-2-prefetchw.d   |   39
 gas/testsuite/gas/i386/x86-64-arch-2.d             |    2
 gas/testsuite/gas/i386/x86-64-avx-intel.d          |    4
 gas/testsuite/gas/i386/x86-64-crc32-suffix.d       |   35
 gas/testsuite/gas/i386/x86-64-crc32.d              |   30
 gas/testsuite/gas/i386/x86-64-movbe-suffix.d       |   28
 gas/testsuite/gas/i386/x86-64-pseudos.d            |    7
 gas/testsuite/gas/i386/x86-64-pseudos.s            |    5
 gas/testsuite/gas/i386/x86-64-reg-intel.d          |    8
 gas/testsuite/gas/i386/x86-64-reg.d                |    8
 gas/testsuite/gas/i386/x86-64-sse-noavx.d          |    2
 gas/testsuite/gas/i386/x86-64-sse4_2-intel.d       |    4
 gas/testsuite/gas/i386/x86-64-sse4_2.d             |   20
 opcodes/i386-dis-evex-len.h                        |  278 -
 opcodes/i386-dis-evex-mod.h                        |   83
 opcodes/i386-dis-evex-prefix.h                     | 1042 ----
 opcodes/i386-dis-evex-reg.h                        |   24
 opcodes/i386-dis-evex-w.h                          |  308 -
 opcodes/i386-dis-evex.h                            |  438 -
 opcodes/i386-dis.c                                 | 5378 ++++-----------------
 67 files changed, 2003 insertions(+), 14286 deletions(-)

Jan
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[PATCH 02/19] x86: drop dead code from OP_IMREG()

Jan Beulich-2
There's only a very limited set of modes that this function gets invoked
with - avoid it being more generic than it needs to be. This may, down
the road, allow actually doing away with the function altogether.

This eliminates a first improperly used "USED_REX (0)".

gas/
2020-07-XX  Jan Beulich  <[hidden email]>

        * testsuite/gas/i386/x86-64-pseudos.s: Add empty-REX tests for
        not-ModR/M-encoded byte register cases.
        * testsuite/gas/i386/x86-64-pseudos.d: Adjust expectations.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
        CH, DH, BH, AX, DX): Delete.
        (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
        eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
        dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.

--- a/gas/testsuite/gas/i386/x86-64-pseudos.d
+++ b/gas/testsuite/gas/i386/x86-64-pseudos.d
@@ -301,6 +301,8 @@ Disassembly of section .text:
  +[a-f0-9]+: 0f 28 90 80 00 00 00 movaps 0x80\(%rax\),%xmm2
  +[a-f0-9]+: 0f 28 90 80 00 00 00 movaps 0x80\(%rax\),%xmm2
  +[a-f0-9]+: 88 c4                 mov    %al,%ah
+ +[a-f0-9]+: 40 d3 e0             rex shl %cl,%eax
+ +[a-f0-9]+: 40 a0 01 00 00 00 00 00 00 00 rex movabs 0x1,%al
  +[a-f0-9]+: 40 89 c3             rex mov %eax,%ebx
  +[a-f0-9]+: 41 89 c6             mov    %eax,%r14d
  +[a-f0-9]+: 41 89 00             mov    %eax,\(%r8\)
--- a/gas/testsuite/gas/i386/x86-64-pseudos.s
+++ b/gas/testsuite/gas/i386/x86-64-pseudos.s
@@ -305,6 +305,8 @@ _start:
  {disp8} movaps 128(%rax),%xmm2
  {disp32} movaps 128(%rax),%xmm2
  {rex} mov %al,%ah
+ {rex} shl %cl, %eax
+ {rex} movabs 1, %al
  {rex} movl %eax,%ebx
  {rex} movl %eax,%r14d
  {rex} movl %eax,(%r8)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -326,23 +326,8 @@ fetch_data (struct disassemble_info *inf
 #define RMDX { OP_REG, dx_reg }
 
 #define eAX { OP_IMREG, eAX_reg }
-#define eBX { OP_IMREG, eBX_reg }
-#define eCX { OP_IMREG, eCX_reg }
-#define eDX { OP_IMREG, eDX_reg }
-#define eSP { OP_IMREG, eSP_reg }
-#define eBP { OP_IMREG, eBP_reg }
-#define eSI { OP_IMREG, eSI_reg }
-#define eDI { OP_IMREG, eDI_reg }
 #define AL { OP_IMREG, al_reg }
 #define CL { OP_IMREG, cl_reg }
-#define DL { OP_IMREG, dl_reg }
-#define BL { OP_IMREG, bl_reg }
-#define AH { OP_IMREG, ah_reg }
-#define CH { OP_IMREG, ch_reg }
-#define DH { OP_IMREG, dh_reg }
-#define BH { OP_IMREG, bh_reg }
-#define AX { OP_IMREG, ax_reg }
-#define DX { OP_IMREG, dx_reg }
 #define zAX { OP_IMREG, z_mode_ax_reg }
 #define indirDX { OP_IMREG, indir_dx_reg }
 
@@ -15285,36 +15270,17 @@ OP_IMREG (int code, int sizeflag)
       else
  s = "(%dx)";
       break;
-    case ax_reg: case cx_reg: case dx_reg: case bx_reg:
-    case sp_reg: case bp_reg: case si_reg: case di_reg:
-      s = names16[code - ax_reg];
-      break;
-    case es_reg: case ss_reg: case cs_reg:
-    case ds_reg: case fs_reg: case gs_reg:
-      s = names_seg[code - es_reg];
-      break;
-    case al_reg: case ah_reg: case cl_reg: case ch_reg:
-    case dl_reg: case dh_reg: case bl_reg: case bh_reg:
-      USED_REX (0);
-      if (rex)
- s = names8rex[code - al_reg];
-      else
- s = names8[code - al_reg];
+    case al_reg: case cl_reg:
+      s = names8[code - al_reg];
       break;
-    case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
-    case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
+    case eAX_reg:
       USED_REX (REX_W);
       if (rex & REX_W)
- s = names64[code - eAX_reg];
-      else
  {
-  if (sizeflag & DFLAG)
-    s = names32[code - eAX_reg];
-  else
-    s = names16[code - eAX_reg];
-  used_prefixes |= (prefixes & PREFIX_DATA);
+  s = *names64;
+  break;
  }
-      break;
+      /* Fall through.  */
     case z_mode_ax_reg:
       if ((rex & REX_W) || (sizeflag & DFLAG))
  s = *names32;

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[PATCH 03/19] x86-64: don't hide an empty but meaningless REX prefix

Jan Beulich-2
In reply to this post by Jan Beulich-2
Unlike for non-zero values passed to USED_REX(), where rex_used gets
updated only when the respective bit was actually set in the encoding,
zero getting passed in is not further guarded, yet such a (potentially
"empty") REX prefix takes effect only when there are registers numbered
4 and up.

gas/
2020-07-XX  Jan Beulich  <[hidden email]>

        * testsuite/gas/i386/x86-64-pseudos.s: Add empty-REX tests for
        ModR/M-encoded byte register cases.
        * testsuite/gas/i386/x86-64-pseudos.d,
        testsuite/gas/i386/x86-64-reg-intel.d,
        testsuite/gas/i386/x86-64-reg.d: Adjust expectations.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
        Conditionalize invocations of "USED_REX (0)".

--- a/gas/testsuite/gas/i386/x86-64-pseudos.d
+++ b/gas/testsuite/gas/i386/x86-64-pseudos.d
@@ -303,6 +303,9 @@ Disassembly of section .text:
  +[a-f0-9]+: 88 c4                 mov    %al,%ah
  +[a-f0-9]+: 40 d3 e0             rex shl %cl,%eax
  +[a-f0-9]+: 40 a0 01 00 00 00 00 00 00 00 rex movabs 0x1,%al
+ +[a-f0-9]+: 40 38 ca             rex cmp %cl,%dl
+ +[a-f0-9]+: 40 b3 01             rex mov \$(0x)?1,%bl
+ +[a-f0-9]+: f2 40 0f 38 f0 c1     rex crc32b? %cl,%eax
  +[a-f0-9]+: 40 89 c3             rex mov %eax,%ebx
  +[a-f0-9]+: 41 89 c6             mov    %eax,%r14d
  +[a-f0-9]+: 41 89 00             mov    %eax,\(%r8\)
--- a/gas/testsuite/gas/i386/x86-64-pseudos.s
+++ b/gas/testsuite/gas/i386/x86-64-pseudos.s
@@ -307,6 +307,9 @@ _start:
  {rex} mov %al,%ah
  {rex} shl %cl, %eax
  {rex} movabs 1, %al
+ {rex} cmp %cl, %dl
+ {rex} mov $1, %bl
+ {rex} crc32 %cl, %eax
  {rex} movl %eax,%ebx
  {rex} movl %eax,%r14d
  {rex} movl %eax,(%r8)
--- a/gas/testsuite/gas/i386/x86-64-reg-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-reg-intel.d
@@ -26,10 +26,10 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 0f 73 f6 02           psllq  mm6,0x2
 [ ]*[a-f0-9]+: 66 41 0f 73 f2 02     psllq  xmm10,0x2
 [ ]*[a-f0-9]+: 66 41 0f 73 fa 02     pslldq xmm10,0x2
-[ ]*[a-f0-9]+: 40 80 c0 01[ ]+add    al,0x1
-[ ]*[a-f0-9]+: 40 80 c1 01[ ]+add    cl,0x1
-[ ]*[a-f0-9]+: 40 80 c2 01[ ]+add    dl,0x1
-[ ]*[a-f0-9]+: 40 80 c3 01[ ]+add    bl,0x1
+[ ]*[a-f0-9]+: 40 80 c0 01[ ]+rex add al,0x1
+[ ]*[a-f0-9]+: 40 80 c1 01[ ]+rex add cl,0x1
+[ ]*[a-f0-9]+: 40 80 c2 01[ ]+rex add dl,0x1
+[ ]*[a-f0-9]+: 40 80 c3 01[ ]+rex add bl,0x1
 [ ]*[a-f0-9]+: 40 80 c4 01[ ]+add    spl,0x1
 [ ]*[a-f0-9]+: 40 80 c5 01[ ]+add    bpl,0x1
 [ ]*[a-f0-9]+: 40 80 c6 01[ ]+add    sil,0x1
--- a/gas/testsuite/gas/i386/x86-64-reg.d
+++ b/gas/testsuite/gas/i386/x86-64-reg.d
@@ -25,10 +25,10 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 0f 73 f6 02           psllq  \$0x2,%mm6
 [ ]*[a-f0-9]+: 66 41 0f 73 f2 02     psllq  \$0x2,%xmm10
 [ ]*[a-f0-9]+: 66 41 0f 73 fa 02     pslldq \$0x2,%xmm10
-[ ]*[a-f0-9]+: 40 80 c0 01[ ]+add    \$0x1,%al
-[ ]*[a-f0-9]+: 40 80 c1 01[ ]+add    \$0x1,%cl
-[ ]*[a-f0-9]+: 40 80 c2 01[ ]+add    \$0x1,%dl
-[ ]*[a-f0-9]+: 40 80 c3 01[ ]+add    \$0x1,%bl
+[ ]*[a-f0-9]+: 40 80 c0 01[ ]+rex add \$0x1,%al
+[ ]*[a-f0-9]+: 40 80 c1 01[ ]+rex add \$0x1,%cl
+[ ]*[a-f0-9]+: 40 80 c2 01[ ]+rex add \$0x1,%dl
+[ ]*[a-f0-9]+: 40 80 c3 01[ ]+rex add \$0x1,%bl
 [ ]*[a-f0-9]+: 40 80 c4 01[ ]+add    \$0x1,%spl
 [ ]*[a-f0-9]+: 40 80 c5 01[ ]+add    \$0x1,%bpl
 [ ]*[a-f0-9]+: 40 80 c6 01[ ]+add    \$0x1,%sil
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -14398,7 +14398,8 @@ OP_E_register (int bytemode, int sizefla
     {
     case b_mode:
     case b_swap_mode:
-      USED_REX (0);
+      if (reg & 4)
+ USED_REX (0);
       if (rex)
  names = names8rex;
       else
@@ -15027,7 +15028,8 @@ OP_G (int bytemode, int sizeflag)
   switch (bytemode)
     {
     case b_mode:
-      USED_REX (0);
+      if (modrm.reg & 4)
+ USED_REX (0);
       if (rex)
  oappend (names8rex[modrm.reg + add]);
       else
@@ -15218,9 +15220,10 @@ OP_REG (int code, int sizeflag)
     case sp_reg: case bp_reg: case si_reg: case di_reg:
       s = names16[code - ax_reg + add];
       break;
-    case al_reg: case ah_reg: case cl_reg: case ch_reg:
-    case dl_reg: case dh_reg: case bl_reg: case bh_reg:
+    case ah_reg: case ch_reg: case dh_reg: case bh_reg:
       USED_REX (0);
+      /* Fall through.  */
+    case al_reg: case cl_reg: case dl_reg: case bl_reg:
       if (rex)
  s = names8rex[code - al_reg + add];
       else
@@ -16416,7 +16419,8 @@ CRC32_Fixup (int bytemode, int sizeflag)
       add = (rex & REX_B) ? 8 : 0;
       if (bytemode == b_mode)
  {
-  USED_REX (0);
+  if (modrm.rm & 4)
+    USED_REX (0);
   if (rex)
     oappend (names8rex[modrm.rm + add]);
   else

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[PATCH 04/19] x86: avoid attaching suffix to register-only CRC32

Jan Beulich-2
In reply to this post by Jan Beulich-2
Just like other insns with GPR operands, CRC32 with only register
operands should not get a suffix added unless in suffix-always mode.
Do away with CRC32_Fixup() altogether, using other more generic logic
instead.

gas/
2020-07-XX  Jan Beulich  <[hidden email]>

        * testsuite/gas/i386/crc32-suffix.d,
        testsuite/gas/i386/x86-64-crc32-suffix.d: New.
        * testsuite/gas/i386/i386.exp: Run new tests.
        * testsuite/gas/i386/arch-10-bdver1.d,
        testsuite/gas/i386/arch-10-bdver2.d,
        testsuite/gas/i386/arch-10-bdver3.d,
        testsuite/gas/i386/arch-10-bdver4.d,
        testsuite/gas/i386/arch-10-btver1.d,
        testsuite/gas/i386/arch-10-btver2.d,
        testsuite/gas/i386/arch-10-lzcnt.d,
        testsuite/gas/i386/arch-10-prefetchw.d,
        testsuite/gas/i386/arch-10.d, testsuite/gas/i386/arch-2.d,
        testsuite/gas/i386/arch-3.d, testsuite/gas/i386/arch-5.d,
        testsuite/gas/i386/arch-6.d, testsuite/gas/i386/crc32.d,
        testsuite/gas/i386/sse-noavx.d, testsuite/gas/i386/sse4_2.d,
        testsuite/gas/i386/x86-64-arch-2-bdver1.d,
        testsuite/gas/i386/x86-64-arch-2-bdver2.d,
        testsuite/gas/i386/x86-64-arch-2-bdver3.d,
        testsuite/gas/i386/x86-64-arch-2-bdver4.d,
        testsuite/gas/i386/x86-64-arch-2-btver1.d,
        testsuite/gas/i386/x86-64-arch-2-btver2.d,
        testsuite/gas/i386/x86-64-arch-2-lzcnt.d,
        testsuite/gas/i386/x86-64-arch-2-prefetchw.d,
        testsuite/gas/i386/x86-64-arch-2.d,
        testsuite/gas/i386/x86-64-crc32.d,
        testsuite/gas/i386/x86-64-pseudos.d,
        testsuite/gas/i386/x86-64-sse-noavx.d,
        testsuite/gas/i386/x86-64-sse4_2.d: Adjust expectations.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (CRC32_Fixup): Delete.
        (prefix_table): Use Eb/Ev for crc32 entries.

--- a/gas/testsuite/gas/i386/arch-10-bdver1.d
+++ b/gas/testsuite/gas/i386/arch-10-bdver1.d
@@ -2,41 +2,4 @@
 #as: -march=bdver1+vmx+smx+xsaveopt+fma+movbe+ept+padlock+bmi+tbm
 #objdump: -dw
 #name: i386 arch 10 (bdver1)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 44 d8             cmove  %eax,%ebx
-[ ]*[a-f0-9]+: 0f ae 38             clflush \(%eax\)
-[ ]*[a-f0-9]+: 0f 05                 syscall
-[ ]*[a-f0-9]+: 0f fc dc             paddb  %mm4,%mm3
-[ ]*[a-f0-9]+: f3 0f 58 dc           addss  %xmm4,%xmm3
-[ ]*[a-f0-9]+: f2 0f 58 dc           addsd  %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77             vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4             vmxoff
-[ ]*[a-f0-9]+: 0f 37                 getsec
-[ ]*[a-f0-9]+: 0f 01 d0             xgetbv
-[ ]*[a-f0-9]+: 0f ae 31             xsaveopt \(%ecx\)
-[ ]*[a-f0-9]+: 66 0f 38 dc 01       aesenc \(%ecx\),%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08     pclmulqdq \$0x8,%xmm1,%xmm0
-[ ]*[a-f0-9]+: c4 e2 79 dc 11       vaesenc \(%ecx\),%xmm0,%xmm2
-[ ]*[a-f0-9]+: c4 e3 49 44 d4 08     vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: c4 e2 c9 98 d4       vfmadd132pd %xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: 0f 38 f0 19           movbe  \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 66 0f 38 80 19       invept \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 0f 01 f9             rdtscp
-[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
-[ ]*[a-f0-9]+: f2 0f 79 ca           insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da             vmload
-[ ]*[a-f0-9]+: f3 0f bd d9           lzcnt  %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0             xstore-rng
-[ ]*[a-f0-9]+: 0f 1f 00             nopl   \(%eax\)
-[ ]*[a-f0-9]+: c4 e2 60 f3 c9       blsr   %ecx,%ebx
-[ ]*[a-f0-9]+: 8f e9 60 01 c9       blcfill %ecx,%ebx
-#pass
+#dump: arch-10.d
--- a/gas/testsuite/gas/i386/arch-10-bdver2.d
+++ b/gas/testsuite/gas/i386/arch-10-bdver2.d
@@ -2,41 +2,4 @@
 #as: -march=bdver2+vmx+smx+xsaveopt+movbe+ept+padlock
 #objdump: -dw
 #name: i386 arch 10 (bdver2)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 44 d8             cmove  %eax,%ebx
-[ ]*[a-f0-9]+: 0f ae 38             clflush \(%eax\)
-[ ]*[a-f0-9]+: 0f 05                 syscall
-[ ]*[a-f0-9]+: 0f fc dc             paddb  %mm4,%mm3
-[ ]*[a-f0-9]+: f3 0f 58 dc           addss  %xmm4,%xmm3
-[ ]*[a-f0-9]+: f2 0f 58 dc           addsd  %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77             vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4             vmxoff
-[ ]*[a-f0-9]+: 0f 37                 getsec
-[ ]*[a-f0-9]+: 0f 01 d0             xgetbv
-[ ]*[a-f0-9]+: 0f ae 31             xsaveopt \(%ecx\)
-[ ]*[a-f0-9]+: 66 0f 38 dc 01       aesenc \(%ecx\),%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08     pclmulqdq \$0x8,%xmm1,%xmm0
-[ ]*[a-f0-9]+: c4 e2 79 dc 11       vaesenc \(%ecx\),%xmm0,%xmm2
-[ ]*[a-f0-9]+: c4 e3 49 44 d4 08     vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: c4 e2 c9 98 d4       vfmadd132pd %xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: 0f 38 f0 19           movbe  \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 66 0f 38 80 19       invept \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 0f 01 f9             rdtscp
-[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
-[ ]*[a-f0-9]+: f2 0f 79 ca           insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da             vmload
-[ ]*[a-f0-9]+: f3 0f bd d9           lzcnt  %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0             xstore-rng
-[ ]*[a-f0-9]+: 0f 1f 00             nopl   \(%eax\)
-[ ]*[a-f0-9]+: c4 e2 60 f3 c9       blsr   %ecx,%ebx
-[ ]*[a-f0-9]+: 8f e9 60 01 c9       blcfill %ecx,%ebx
-#pass
+#dump: arch-10.d
--- a/gas/testsuite/gas/i386/arch-10-bdver3.d
+++ b/gas/testsuite/gas/i386/arch-10-bdver3.d
@@ -2,41 +2,4 @@
 #as: -march=bdver3+vmx+smx+movbe+ept+padlock
 #objdump: -dw
 #name: i386 arch 10 (bdver3)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 44 d8             cmove  %eax,%ebx
-[ ]*[a-f0-9]+: 0f ae 38             clflush \(%eax\)
-[ ]*[a-f0-9]+: 0f 05                 syscall
-[ ]*[a-f0-9]+: 0f fc dc             paddb  %mm4,%mm3
-[ ]*[a-f0-9]+: f3 0f 58 dc           addss  %xmm4,%xmm3
-[ ]*[a-f0-9]+: f2 0f 58 dc           addsd  %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77             vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4             vmxoff
-[ ]*[a-f0-9]+: 0f 37                 getsec
-[ ]*[a-f0-9]+: 0f 01 d0             xgetbv
-[ ]*[a-f0-9]+: 0f ae 31             xsaveopt \(%ecx\)
-[ ]*[a-f0-9]+: 66 0f 38 dc 01       aesenc \(%ecx\),%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08     pclmulqdq \$0x8,%xmm1,%xmm0
-[ ]*[a-f0-9]+: c4 e2 79 dc 11       vaesenc \(%ecx\),%xmm0,%xmm2
-[ ]*[a-f0-9]+: c4 e3 49 44 d4 08     vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: c4 e2 c9 98 d4       vfmadd132pd %xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: 0f 38 f0 19           movbe  \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 66 0f 38 80 19       invept \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 0f 01 f9             rdtscp
-[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
-[ ]*[a-f0-9]+: f2 0f 79 ca           insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da             vmload
-[ ]*[a-f0-9]+: f3 0f bd d9           lzcnt  %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0             xstore-rng
-[ ]*[a-f0-9]+: 0f 1f 00             nopl   \(%eax\)
-[ ]*[a-f0-9]+: c4 e2 60 f3 c9       blsr   %ecx,%ebx
-[ ]*[a-f0-9]+: 8f e9 60 01 c9       blcfill %ecx,%ebx
-#pass
+#dump: arch-10.d
--- a/gas/testsuite/gas/i386/arch-10-bdver4.d
+++ b/gas/testsuite/gas/i386/arch-10-bdver4.d
@@ -2,41 +2,4 @@
 #as: -march=bdver4+vmx+smx+ept+padlock
 #objdump: -dw
 #name: i386 arch 10 (bdver4)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 44 d8             cmove  %eax,%ebx
-[ ]*[a-f0-9]+: 0f ae 38             clflush \(%eax\)
-[ ]*[a-f0-9]+: 0f 05                 syscall
-[ ]*[a-f0-9]+: 0f fc dc             paddb  %mm4,%mm3
-[ ]*[a-f0-9]+: f3 0f 58 dc           addss  %xmm4,%xmm3
-[ ]*[a-f0-9]+: f2 0f 58 dc           addsd  %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77             vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4             vmxoff
-[ ]*[a-f0-9]+: 0f 37                 getsec
-[ ]*[a-f0-9]+: 0f 01 d0             xgetbv
-[ ]*[a-f0-9]+: 0f ae 31             xsaveopt \(%ecx\)
-[ ]*[a-f0-9]+: 66 0f 38 dc 01       aesenc \(%ecx\),%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08     pclmulqdq \$0x8,%xmm1,%xmm0
-[ ]*[a-f0-9]+: c4 e2 79 dc 11       vaesenc \(%ecx\),%xmm0,%xmm2
-[ ]*[a-f0-9]+: c4 e3 49 44 d4 08     vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: c4 e2 c9 98 d4       vfmadd132pd %xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: 0f 38 f0 19           movbe  \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 66 0f 38 80 19       invept \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 0f 01 f9             rdtscp
-[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
-[ ]*[a-f0-9]+: f2 0f 79 ca           insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da             vmload
-[ ]*[a-f0-9]+: f3 0f bd d9           lzcnt  %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0             xstore-rng
-[ ]*[a-f0-9]+: 0f 1f 00             nopl   \(%eax\)
-[ ]*[a-f0-9]+: c4 e2 60 f3 c9       blsr   %ecx,%ebx
-[ ]*[a-f0-9]+: 8f e9 60 01 c9       blcfill %ecx,%ebx
-#pass
+#dump: arch-10.d
--- a/gas/testsuite/gas/i386/arch-10-btver1.d
+++ b/gas/testsuite/gas/i386/arch-10-btver1.d
@@ -2,41 +2,4 @@
 #as: -march=btver1+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+ept+padlock+fma+bmi+tbm
 #objdump: -dw
 #name: i386 arch 10 (btver1)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 44 d8             cmove  %eax,%ebx
-[ ]*[a-f0-9]+: 0f ae 38             clflush \(%eax\)
-[ ]*[a-f0-9]+: 0f 05                 syscall
-[ ]*[a-f0-9]+: 0f fc dc             paddb  %mm4,%mm3
-[ ]*[a-f0-9]+: f3 0f 58 dc           addss  %xmm4,%xmm3
-[ ]*[a-f0-9]+: f2 0f 58 dc           addsd  %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77             vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4             vmxoff
-[ ]*[a-f0-9]+: 0f 37                 getsec
-[ ]*[a-f0-9]+: 0f 01 d0             xgetbv
-[ ]*[a-f0-9]+: 0f ae 31             xsaveopt \(%ecx\)
-[ ]*[a-f0-9]+: 66 0f 38 dc 01       aesenc \(%ecx\),%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08     pclmulqdq \$0x8,%xmm1,%xmm0
-[ ]*[a-f0-9]+: c4 e2 79 dc 11       vaesenc \(%ecx\),%xmm0,%xmm2
-[ ]*[a-f0-9]+: c4 e3 49 44 d4 08     vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: c4 e2 c9 98 d4       vfmadd132pd %xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: 0f 38 f0 19           movbe  \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 66 0f 38 80 19       invept \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 0f 01 f9             rdtscp
-[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
-[ ]*[a-f0-9]+: f2 0f 79 ca           insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da             vmload
-[ ]*[a-f0-9]+: f3 0f bd d9           lzcnt  %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0             xstore-rng
-[ ]*[a-f0-9]+: 0f 1f 00             nopl   \(%eax\)
-[ ]*[a-f0-9]+: c4 e2 60 f3 c9       blsr   %ecx,%ebx
-[ ]*[a-f0-9]+: 8f e9 60 01 c9       blcfill %ecx,%ebx
-#pass
+#dump: arch-10.d
--- a/gas/testsuite/gas/i386/arch-10-btver2.d
+++ b/gas/testsuite/gas/i386/arch-10-btver2.d
@@ -2,41 +2,4 @@
 #as: -march=btver2+smx+vmx+ept+padlock+fma+tbm
 #objdump: -dw
 #name: i386 arch 10 (btver2)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 44 d8             cmove  %eax,%ebx
-[ ]*[a-f0-9]+: 0f ae 38             clflush \(%eax\)
-[ ]*[a-f0-9]+: 0f 05                 syscall
-[ ]*[a-f0-9]+: 0f fc dc             paddb  %mm4,%mm3
-[ ]*[a-f0-9]+: f3 0f 58 dc           addss  %xmm4,%xmm3
-[ ]*[a-f0-9]+: f2 0f 58 dc           addsd  %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77             vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4             vmxoff
-[ ]*[a-f0-9]+: 0f 37                 getsec
-[ ]*[a-f0-9]+: 0f 01 d0             xgetbv
-[ ]*[a-f0-9]+: 0f ae 31             xsaveopt \(%ecx\)
-[ ]*[a-f0-9]+: 66 0f 38 dc 01       aesenc \(%ecx\),%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08     pclmulqdq \$0x8,%xmm1,%xmm0
-[ ]*[a-f0-9]+: c4 e2 79 dc 11       vaesenc \(%ecx\),%xmm0,%xmm2
-[ ]*[a-f0-9]+: c4 e3 49 44 d4 08     vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: c4 e2 c9 98 d4       vfmadd132pd %xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: 0f 38 f0 19           movbe  \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 66 0f 38 80 19       invept \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 0f 01 f9             rdtscp
-[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
-[ ]*[a-f0-9]+: f2 0f 79 ca           insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da             vmload
-[ ]*[a-f0-9]+: f3 0f bd d9           lzcnt  %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0             xstore-rng
-[ ]*[a-f0-9]+: 0f 1f 00             nopl   \(%eax\)
-[ ]*[a-f0-9]+: c4 e2 60 f3 c9       blsr   %ecx,%ebx
-[ ]*[a-f0-9]+: 8f e9 60 01 c9       blcfill %ecx,%ebx
-#pass
+#dump: arch-10.d
--- a/gas/testsuite/gas/i386/arch-10-lzcnt.d
+++ b/gas/testsuite/gas/i386/arch-10-lzcnt.d
@@ -2,41 +2,4 @@
 #as: -march=i686+nop+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+lzcnt+padlock+bmi+tbm
 #objdump: -dw
 #name: i386 arch 10 (lzcnt)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 44 d8             cmove  %eax,%ebx
-[ ]*[a-f0-9]+: 0f ae 38             clflush \(%eax\)
-[ ]*[a-f0-9]+: 0f 05                 syscall
-[ ]*[a-f0-9]+: 0f fc dc             paddb  %mm4,%mm3
-[ ]*[a-f0-9]+: f3 0f 58 dc           addss  %xmm4,%xmm3
-[ ]*[a-f0-9]+: f2 0f 58 dc           addsd  %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77             vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4             vmxoff
-[ ]*[a-f0-9]+: 0f 37                 getsec
-[ ]*[a-f0-9]+: 0f 01 d0             xgetbv
-[ ]*[a-f0-9]+: 0f ae 31             xsaveopt \(%ecx\)
-[ ]*[a-f0-9]+: 66 0f 38 dc 01       aesenc \(%ecx\),%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08     pclmulqdq \$0x8,%xmm1,%xmm0
-[ ]*[a-f0-9]+: c4 e2 79 dc 11       vaesenc \(%ecx\),%xmm0,%xmm2
-[ ]*[a-f0-9]+: c4 e3 49 44 d4 08     vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: c4 e2 c9 98 d4       vfmadd132pd %xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: 0f 38 f0 19           movbe  \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 66 0f 38 80 19       invept \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 0f 01 f9             rdtscp
-[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
-[ ]*[a-f0-9]+: f2 0f 79 ca           insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da             vmload
-[ ]*[a-f0-9]+: f3 0f bd d9           lzcnt  %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0             xstore-rng
-[ ]*[a-f0-9]+: 0f 1f 00             nopl   \(%eax\)
-[ ]*[a-f0-9]+: c4 e2 60 f3 c9       blsr   %ecx,%ebx
-[ ]*[a-f0-9]+: 8f e9 60 01 c9       blcfill %ecx,%ebx
-#pass
+#dump: arch-10.d
--- a/gas/testsuite/gas/i386/arch-10-prefetchw.d
+++ b/gas/testsuite/gas/i386/arch-10-prefetchw.d
@@ -2,41 +2,4 @@
 #as: -march=i686+mmx+nop+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+sse4a+svme+lzcnt+padlock+bmi+tbm+prfchw
 #objdump: -dw
 #name: i386 arch 10 (prefetchw)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 44 d8             cmove  %eax,%ebx
-[ ]*[a-f0-9]+: 0f ae 38             clflush \(%eax\)
-[ ]*[a-f0-9]+: 0f 05                 syscall
-[ ]*[a-f0-9]+: 0f fc dc             paddb  %mm4,%mm3
-[ ]*[a-f0-9]+: f3 0f 58 dc           addss  %xmm4,%xmm3
-[ ]*[a-f0-9]+: f2 0f 58 dc           addsd  %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77             vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4             vmxoff
-[ ]*[a-f0-9]+: 0f 37                 getsec
-[ ]*[a-f0-9]+: 0f 01 d0             xgetbv
-[ ]*[a-f0-9]+: 0f ae 31             xsaveopt \(%ecx\)
-[ ]*[a-f0-9]+: 66 0f 38 dc 01       aesenc \(%ecx\),%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08     pclmulqdq \$0x8,%xmm1,%xmm0
-[ ]*[a-f0-9]+: c4 e2 79 dc 11       vaesenc \(%ecx\),%xmm0,%xmm2
-[ ]*[a-f0-9]+: c4 e3 49 44 d4 08     vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: c4 e2 c9 98 d4       vfmadd132pd %xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: 0f 38 f0 19           movbe  \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 66 0f 38 80 19       invept \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 0f 01 f9             rdtscp
-[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
-[ ]*[a-f0-9]+: f2 0f 79 ca           insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da             vmload
-[ ]*[a-f0-9]+: f3 0f bd d9           lzcnt  %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0             xstore-rng
-[ ]*[a-f0-9]+: 0f 1f 00             nopl   \(%eax\)
-[ ]*[a-f0-9]+: c4 e2 60 f3 c9       blsr   %ecx,%ebx
-[ ]*[a-f0-9]+: 8f e9 60 01 c9       blcfill %ecx,%ebx
-#pass
+#dump: arch-10.d
--- a/gas/testsuite/gas/i386/arch-10.d
+++ b/gas/testsuite/gas/i386/arch-10.d
@@ -16,7 +16,7 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
 [ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
 [ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32  %ecx,%ebx
 [ ]*[a-f0-9]+: c5 fc 77             vzeroall
 [ ]*[a-f0-9]+: 0f 01 c4             vmxoff
 [ ]*[a-f0-9]+: 0f 37                 getsec
--- a/gas/testsuite/gas/i386/arch-2.d
+++ b/gas/testsuite/gas/i386/arch-2.d
@@ -11,5 +11,5 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 0f 3a 08 c1 00     roundps \$0x0,%xmm1,%xmm0
 [ ]*[a-f0-9]+: 66 0f 3a 0b c1 00     roundsd \$0x0,%xmm1,%xmm0
 [ ]*[a-f0-9]+: 66 0f 3a 0a c1 00     roundss \$0x0,%xmm1,%xmm0
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32  %ecx,%ebx
 #pass
--- a/gas/testsuite/gas/i386/arch-3.d
+++ b/gas/testsuite/gas/i386/arch-3.d
@@ -1,15 +1,3 @@
 #objdump: -dw
 #name: i386 arch 3
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 66 0f 38 17 c1       ptest  %xmm1,%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 09 c1 00     roundpd \$0x0,%xmm1,%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 08 c1 00     roundps \$0x0,%xmm1,%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 0b c1 00     roundsd \$0x0,%xmm1,%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 0a c1 00     roundss \$0x0,%xmm1,%xmm0
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-#pass
+#dump: arch-2.d
--- a/gas/testsuite/gas/i386/arch-5.d
+++ b/gas/testsuite/gas/i386/arch-5.d
@@ -7,5 +7,5 @@ Disassembly of section .text:
 
 0+ <.text>:
 [ ]*[a-f0-9]+: f3 0f b8 d9           popcnt %ecx,%ebx
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32  %ecx,%ebx
 #pass
--- a/gas/testsuite/gas/i386/arch-6.d
+++ b/gas/testsuite/gas/i386/arch-6.d
@@ -7,5 +7,5 @@ Disassembly of section .text:
 
 0+ <.text>:
 [ ]*[a-f0-9]+: f3 0f b8 d9           popcnt %ecx,%ebx
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32  %ecx,%ebx
 #pass
--- /dev/null
+++ b/gas/testsuite/gas/i386/crc32-suffix.d
@@ -0,0 +1,25 @@
+#objdump: -dwMsuffix
+#name: i386 crc32 w/ suffix
+#source: crc32.s
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ ]*[a-f0-9]+: f2 0f 38 f0 06       crc32b \(%esi\),%eax
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 06     crc32w \(%esi\),%eax
+[ ]*[a-f0-9]+: f2 0f 38 f1 06       crc32l \(%esi\),%eax
+[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32b %al,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32b %al,%eax
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32w %ax,%eax
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32w %ax,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32l %eax,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32l %eax,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f0 06       crc32b \(%esi\),%eax
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 06     crc32w \(%esi\),%eax
+[ ]*[a-f0-9]+: f2 0f 38 f1 06       crc32l \(%esi\),%eax
+[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32b %al,%eax
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32w %ax,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32l %eax,%eax
+#pass
--- a/gas/testsuite/gas/i386/crc32.d
+++ b/gas/testsuite/gas/i386/crc32.d
@@ -9,16 +9,16 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: f2 0f 38 f0 06       crc32b \(%esi\),%eax
 [ ]*[a-f0-9]+: 66 f2 0f 38 f1 06     crc32w \(%esi\),%eax
 [ ]*[a-f0-9]+: f2 0f 38 f1 06       crc32l \(%esi\),%eax
-[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32b %al,%eax
-[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32b %al,%eax
-[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32w %ax,%eax
-[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32w %ax,%eax
-[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32l %eax,%eax
-[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32l %eax,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32  %al,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32  %al,%eax
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32  %ax,%eax
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32  %ax,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32  %eax,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32  %eax,%eax
 [ ]*[a-f0-9]+: f2 0f 38 f0 06       crc32b \(%esi\),%eax
 [ ]*[a-f0-9]+: 66 f2 0f 38 f1 06     crc32w \(%esi\),%eax
 [ ]*[a-f0-9]+: f2 0f 38 f1 06       crc32l \(%esi\),%eax
-[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32b %al,%eax
-[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32w %ax,%eax
-[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32l %eax,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32  %al,%eax
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32  %ax,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32  %eax,%eax
 #pass
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -149,6 +149,7 @@ if [expr ([istarget "i*86-*-*"] ||  [ist
     run_dump_test "sse4_2-intel"
     run_dump_test "crc32"
     run_dump_test "crc32-intel"
+    run_dump_test "crc32-suffix"
     run_list_test "inval-crc32" "-al"
     run_dump_test "simd"
     run_dump_test "simd-intel"
@@ -777,6 +778,7 @@ if [expr ([istarget "i*86-*-*"] || [ista
     run_dump_test "x86-64-sse4_2-intel"
     run_dump_test "x86-64-crc32"
     run_dump_test "x86-64-crc32-intel"
+    run_dump_test "x86-64-crc32-suffix"
     run_list_test "x86-64-inval-crc32" "-al"
     run_dump_test "x86-64-simd"
     run_dump_test "x86-64-simd-intel"
--- a/gas/testsuite/gas/i386/sse-noavx.d
+++ b/gas/testsuite/gas/i386/sse-noavx.d
@@ -7,7 +7,7 @@
 Disassembly of section .text:
 
 0+ <_start>:
-[ ]*[a-f0-9]+: f2 0f 38 f0 d9       crc32b %cl,%ebx
+[ ]*[a-f0-9]+: f2 0f 38 f0 d9       crc32  %cl,%ebx
 [ ]*[a-f0-9]+: 66 0f 2d d3           cvtpd2pi %xmm3,%mm2
 [ ]*[a-f0-9]+: 66 0f 2a d3           cvtpi2pd %mm3,%xmm2
 [ ]*[a-f0-9]+: 0f 2a d3             cvtpi2ps %mm3,%xmm2
--- a/gas/testsuite/gas/i386/sse4_2.d
+++ b/gas/testsuite/gas/i386/sse4_2.d
@@ -6,15 +6,15 @@
 Disassembly of section .text:
 
 0+000 <foo>:
-[ ]*[0-9a-f]+: f2 0f 38 f0 d9       crc32b %cl,%ebx
-[ ]*[0-9a-f]+: 66 f2 0f 38 f1 d9     crc32w %cx,%ebx
-[ ]*[0-9a-f]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
+[ ]*[0-9a-f]+: f2 0f 38 f0 d9       crc32  %cl,%ebx
+[ ]*[0-9a-f]+: 66 f2 0f 38 f1 d9     crc32  %cx,%ebx
+[ ]*[0-9a-f]+: f2 0f 38 f1 d9       crc32  %ecx,%ebx
 [ ]*[0-9a-f]+: f2 0f 38 f0 19       crc32b \(%ecx\),%ebx
 [ ]*[0-9a-f]+: 66 f2 0f 38 f1 19     crc32w \(%ecx\),%ebx
 [ ]*[0-9a-f]+: f2 0f 38 f1 19       crc32l \(%ecx\),%ebx
-[ ]*[0-9a-f]+: f2 0f 38 f0 d9       crc32b %cl,%ebx
-[ ]*[0-9a-f]+: 66 f2 0f 38 f1 d9     crc32w %cx,%ebx
-[ ]*[0-9a-f]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
+[ ]*[0-9a-f]+: f2 0f 38 f0 d9       crc32  %cl,%ebx
+[ ]*[0-9a-f]+: 66 f2 0f 38 f1 d9     crc32  %cx,%ebx
+[ ]*[0-9a-f]+: f2 0f 38 f1 d9       crc32  %ecx,%ebx
 [ ]*[0-9a-f]+: 66 0f 38 37 01       pcmpgtq \(%ecx\),%xmm0
 [ ]*[0-9a-f]+: 66 0f 38 37 c1       pcmpgtq %xmm1,%xmm0
 [ ]*[0-9a-f]+: 66 0f 3a 61 01 00     pcmpestri \$0x0,\(%ecx\),%xmm0
@@ -33,15 +33,15 @@ Disassembly of section .text:
 [ ]*[0-9a-f]+: f3 0f b8 d9           popcnt %ecx,%ebx
 [ ]*[0-9a-f]+: 66 f3 0f b8 d9       popcnt %cx,%bx
 [ ]*[0-9a-f]+: f3 0f b8 d9           popcnt %ecx,%ebx
-[ ]*[a-f0-9]+: f2 0f 38 f0 d9       crc32b %cl,%ebx
-[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9     crc32w %cx,%ebx
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: f2 0f 38 f0 d9       crc32  %cl,%ebx
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9     crc32  %cx,%ebx
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32  %ecx,%ebx
 [ ]*[a-f0-9]+: f2 0f 38 f0 19       crc32b \(%ecx\),%ebx
 [ ]*[a-f0-9]+: 66 f2 0f 38 f1 19     crc32w \(%ecx\),%ebx
 [ ]*[a-f0-9]+: f2 0f 38 f1 19       crc32l \(%ecx\),%ebx
-[ ]*[a-f0-9]+: f2 0f 38 f0 d9       crc32b %cl,%ebx
-[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9     crc32w %cx,%ebx
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: f2 0f 38 f0 d9       crc32  %cl,%ebx
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9     crc32  %cx,%ebx
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32  %ecx,%ebx
 [ ]*[a-f0-9]+: 66 0f 38 37 01       pcmpgtq \(%ecx\),%xmm0
 [ ]*[a-f0-9]+: 66 0f 38 37 c1       pcmpgtq %xmm1,%xmm0
 [ ]*[a-f0-9]+: 66 0f 3a 61 01 00     pcmpestri \$0x0,\(%ecx\),%xmm0
--- a/gas/testsuite/gas/i386/x86-64-arch-2-bdver1.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-bdver1.d
@@ -2,41 +2,4 @@
 #as: -march=bdver1+vmx+smx+xsaveopt+fma+movbe+ept+padlock+bmi+tbm
 #objdump: -dw
 #name: x86-64 arch 2 (bdver1)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 44 d8             cmove  %eax,%ebx
-[ ]*[a-f0-9]+: 0f ae 38             clflush \(%rax\)
-[ ]*[a-f0-9]+: 0f 05                 syscall
-[ ]*[a-f0-9]+: 0f fc dc             paddb  %mm4,%mm3
-[ ]*[a-f0-9]+: f3 0f 58 dc           addss  %xmm4,%xmm3
-[ ]*[a-f0-9]+: f2 0f 58 dc           addsd  %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77             vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4             vmxoff
-[ ]*[a-f0-9]+: 0f 37                 getsec
-[ ]*[a-f0-9]+: 0f 01 d0             xgetbv
-[ ]*[a-f0-9]+: 0f ae 31             xsaveopt \(%rcx\)
-[ ]*[a-f0-9]+: 66 0f 38 dc 01       aesenc \(%rcx\),%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08     pclmulqdq \$0x8,%xmm1,%xmm0
-[ ]*[a-f0-9]+: c4 e2 79 dc 11       vaesenc \(%rcx\),%xmm0,%xmm2
-[ ]*[a-f0-9]+: c4 e3 49 44 d4 08     vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: c4 e2 c9 98 d4       vfmadd132pd %xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: 0f 38 f0 19           movbe  \(%rcx\),%ebx
-[ ]*[a-f0-9]+: 48 0f c7 0e           cmpxchg16b \(%rsi\)
-[ ]*[a-f0-9]+: 66 0f 38 80 19       invept \(%rcx\),%rbx
-[ ]*[a-f0-9]+: 0f 01 f9             rdtscp
-[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
-[ ]*[a-f0-9]+: f2 0f 79 ca           insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da             vmload
-[ ]*[a-f0-9]+: f3 0f bd d9           lzcnt  %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0             xstore-rng
-[ ]*[a-f0-9]+: c4 e2 60 f3 c9       blsr   %ecx,%ebx
-[ ]*[a-f0-9]+: 8f e9 60 01 c9       blcfill %ecx,%ebx
-#pass
+#dump: x86-64-arch-2.d
--- a/gas/testsuite/gas/i386/x86-64-arch-2-bdver2.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-bdver2.d
@@ -2,41 +2,4 @@
 #as: -march=bdver2+vmx+smx+xsaveopt+movbe+ept+padlock
 #objdump: -dw
 #name: x86-64 arch 2 (bdver2)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 44 d8             cmove  %eax,%ebx
-[ ]*[a-f0-9]+: 0f ae 38             clflush \(%rax\)
-[ ]*[a-f0-9]+: 0f 05                 syscall
-[ ]*[a-f0-9]+: 0f fc dc             paddb  %mm4,%mm3
-[ ]*[a-f0-9]+: f3 0f 58 dc           addss  %xmm4,%xmm3
-[ ]*[a-f0-9]+: f2 0f 58 dc           addsd  %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77             vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4             vmxoff
-[ ]*[a-f0-9]+: 0f 37                 getsec
-[ ]*[a-f0-9]+: 0f 01 d0             xgetbv
-[ ]*[a-f0-9]+: 0f ae 31             xsaveopt \(%rcx\)
-[ ]*[a-f0-9]+: 66 0f 38 dc 01       aesenc \(%rcx\),%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08     pclmulqdq \$0x8,%xmm1,%xmm0
-[ ]*[a-f0-9]+: c4 e2 79 dc 11       vaesenc \(%rcx\),%xmm0,%xmm2
-[ ]*[a-f0-9]+: c4 e3 49 44 d4 08     vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: c4 e2 c9 98 d4       vfmadd132pd %xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: 0f 38 f0 19           movbe  \(%rcx\),%ebx
-[ ]*[a-f0-9]+: 48 0f c7 0e           cmpxchg16b \(%rsi\)
-[ ]*[a-f0-9]+: 66 0f 38 80 19       invept \(%rcx\),%rbx
-[ ]*[a-f0-9]+: 0f 01 f9             rdtscp
-[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
-[ ]*[a-f0-9]+: f2 0f 79 ca           insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da             vmload
-[ ]*[a-f0-9]+: f3 0f bd d9           lzcnt  %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0             xstore-rng
-[ ]*[a-f0-9]+: c4 e2 60 f3 c9       blsr   %ecx,%ebx
-[ ]*[a-f0-9]+: 8f e9 60 01 c9       blcfill %ecx,%ebx
-#pass
+#dump: x86-64-arch-2.d
--- a/gas/testsuite/gas/i386/x86-64-arch-2-bdver3.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-bdver3.d
@@ -2,41 +2,4 @@
 #as: -march=bdver3+vmx+smx+movbe+ept+padlock
 #objdump: -dw
 #name: x86-64 arch 2 (bdver3)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 44 d8             cmove  %eax,%ebx
-[ ]*[a-f0-9]+: 0f ae 38             clflush \(%rax\)
-[ ]*[a-f0-9]+: 0f 05                 syscall
-[ ]*[a-f0-9]+: 0f fc dc             paddb  %mm4,%mm3
-[ ]*[a-f0-9]+: f3 0f 58 dc           addss  %xmm4,%xmm3
-[ ]*[a-f0-9]+: f2 0f 58 dc           addsd  %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77             vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4             vmxoff
-[ ]*[a-f0-9]+: 0f 37                 getsec
-[ ]*[a-f0-9]+: 0f 01 d0             xgetbv
-[ ]*[a-f0-9]+: 0f ae 31             xsaveopt \(%rcx\)
-[ ]*[a-f0-9]+: 66 0f 38 dc 01       aesenc \(%rcx\),%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08     pclmulqdq \$0x8,%xmm1,%xmm0
-[ ]*[a-f0-9]+: c4 e2 79 dc 11       vaesenc \(%rcx\),%xmm0,%xmm2
-[ ]*[a-f0-9]+: c4 e3 49 44 d4 08     vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: c4 e2 c9 98 d4       vfmadd132pd %xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: 0f 38 f0 19           movbe  \(%rcx\),%ebx
-[ ]*[a-f0-9]+: 48 0f c7 0e           cmpxchg16b \(%rsi\)
-[ ]*[a-f0-9]+: 66 0f 38 80 19       invept \(%rcx\),%rbx
-[ ]*[a-f0-9]+: 0f 01 f9             rdtscp
-[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
-[ ]*[a-f0-9]+: f2 0f 79 ca           insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da             vmload
-[ ]*[a-f0-9]+: f3 0f bd d9           lzcnt  %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0             xstore-rng
-[ ]*[a-f0-9]+: c4 e2 60 f3 c9       blsr   %ecx,%ebx
-[ ]*[a-f0-9]+: 8f e9 60 01 c9       blcfill %ecx,%ebx
-#pass
+#dump: x86-64-arch-2.d
--- a/gas/testsuite/gas/i386/x86-64-arch-2-bdver4.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-bdver4.d
@@ -2,41 +2,4 @@
 #as: -march=bdver4+vmx+smx+ept+padlock
 #objdump: -dw
 #name: x86-64 arch 2 (bdver4)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 44 d8             cmove  %eax,%ebx
-[ ]*[a-f0-9]+: 0f ae 38             clflush \(%rax\)
-[ ]*[a-f0-9]+: 0f 05                 syscall
-[ ]*[a-f0-9]+: 0f fc dc             paddb  %mm4,%mm3
-[ ]*[a-f0-9]+: f3 0f 58 dc           addss  %xmm4,%xmm3
-[ ]*[a-f0-9]+: f2 0f 58 dc           addsd  %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77             vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4             vmxoff
-[ ]*[a-f0-9]+: 0f 37                 getsec
-[ ]*[a-f0-9]+: 0f 01 d0             xgetbv
-[ ]*[a-f0-9]+: 0f ae 31             xsaveopt \(%rcx\)
-[ ]*[a-f0-9]+: 66 0f 38 dc 01       aesenc \(%rcx\),%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08     pclmulqdq \$0x8,%xmm1,%xmm0
-[ ]*[a-f0-9]+: c4 e2 79 dc 11       vaesenc \(%rcx\),%xmm0,%xmm2
-[ ]*[a-f0-9]+: c4 e3 49 44 d4 08     vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: c4 e2 c9 98 d4       vfmadd132pd %xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: 0f 38 f0 19           movbe  \(%rcx\),%ebx
-[ ]*[a-f0-9]+: 48 0f c7 0e           cmpxchg16b \(%rsi\)
-[ ]*[a-f0-9]+: 66 0f 38 80 19       invept \(%rcx\),%rbx
-[ ]*[a-f0-9]+: 0f 01 f9             rdtscp
-[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
-[ ]*[a-f0-9]+: f2 0f 79 ca           insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da             vmload
-[ ]*[a-f0-9]+: f3 0f bd d9           lzcnt  %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0             xstore-rng
-[ ]*[a-f0-9]+: c4 e2 60 f3 c9       blsr   %ecx,%ebx
-[ ]*[a-f0-9]+: 8f e9 60 01 c9       blcfill %ecx,%ebx
-#pass
+#dump: x86-64-arch-2.d
--- a/gas/testsuite/gas/i386/x86-64-arch-2-btver1.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-btver1.d
@@ -2,41 +2,4 @@
 #as: -march=btver1+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+ept+padlock+fma+bmi+tbm
 #objdump: -dw
 #name: x86-64 arch 2 (btver1)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 44 d8             cmove  %eax,%ebx
-[ ]*[a-f0-9]+: 0f ae 38             clflush \(%rax\)
-[ ]*[a-f0-9]+: 0f 05                 syscall
-[ ]*[a-f0-9]+: 0f fc dc             paddb  %mm4,%mm3
-[ ]*[a-f0-9]+: f3 0f 58 dc           addss  %xmm4,%xmm3
-[ ]*[a-f0-9]+: f2 0f 58 dc           addsd  %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77             vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4             vmxoff
-[ ]*[a-f0-9]+: 0f 37                 getsec
-[ ]*[a-f0-9]+: 0f 01 d0             xgetbv
-[ ]*[a-f0-9]+: 0f ae 31             xsaveopt \(%rcx\)
-[ ]*[a-f0-9]+: 66 0f 38 dc 01       aesenc \(%rcx\),%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08     pclmulqdq \$0x8,%xmm1,%xmm0
-[ ]*[a-f0-9]+: c4 e2 79 dc 11       vaesenc \(%rcx\),%xmm0,%xmm2
-[ ]*[a-f0-9]+: c4 e3 49 44 d4 08     vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: c4 e2 c9 98 d4       vfmadd132pd %xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: 0f 38 f0 19           movbe  \(%rcx\),%ebx
-[ ]*[a-f0-9]+: 48 0f c7 0e           cmpxchg16b \(%rsi\)
-[ ]*[a-f0-9]+: 66 0f 38 80 19       invept \(%rcx\),%rbx
-[ ]*[a-f0-9]+: 0f 01 f9             rdtscp
-[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
-[ ]*[a-f0-9]+: f2 0f 79 ca           insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da             vmload
-[ ]*[a-f0-9]+: f3 0f bd d9           lzcnt  %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0             xstore-rng
-[ ]*[a-f0-9]+: c4 e2 60 f3 c9       blsr   %ecx,%ebx
-[ ]*[a-f0-9]+: 8f e9 60 01 c9       blcfill %ecx,%ebx
-#pass
+#dump: x86-64-arch-2.d
--- a/gas/testsuite/gas/i386/x86-64-arch-2-btver2.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-btver2.d
@@ -2,41 +2,4 @@
 #as: -march=btver2+smx+vmx+ept+padlock+fma+tbm
 #objdump: -dw
 #name: x86-64 arch 2 (btver2)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 44 d8             cmove  %eax,%ebx
-[ ]*[a-f0-9]+: 0f ae 38             clflush \(%rax\)
-[ ]*[a-f0-9]+: 0f 05                 syscall
-[ ]*[a-f0-9]+: 0f fc dc             paddb  %mm4,%mm3
-[ ]*[a-f0-9]+: f3 0f 58 dc           addss  %xmm4,%xmm3
-[ ]*[a-f0-9]+: f2 0f 58 dc           addsd  %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77             vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4             vmxoff
-[ ]*[a-f0-9]+: 0f 37                 getsec
-[ ]*[a-f0-9]+: 0f 01 d0             xgetbv
-[ ]*[a-f0-9]+: 0f ae 31             xsaveopt \(%rcx\)
-[ ]*[a-f0-9]+: 66 0f 38 dc 01       aesenc \(%rcx\),%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08     pclmulqdq \$0x8,%xmm1,%xmm0
-[ ]*[a-f0-9]+: c4 e2 79 dc 11       vaesenc \(%rcx\),%xmm0,%xmm2
-[ ]*[a-f0-9]+: c4 e3 49 44 d4 08     vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: c4 e2 c9 98 d4       vfmadd132pd %xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: 0f 38 f0 19           movbe  \(%rcx\),%ebx
-[ ]*[a-f0-9]+: 48 0f c7 0e           cmpxchg16b \(%rsi\)
-[ ]*[a-f0-9]+: 66 0f 38 80 19       invept \(%rcx\),%rbx
-[ ]*[a-f0-9]+: 0f 01 f9             rdtscp
-[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
-[ ]*[a-f0-9]+: f2 0f 79 ca           insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da             vmload
-[ ]*[a-f0-9]+: f3 0f bd d9           lzcnt  %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0             xstore-rng
-[ ]*[a-f0-9]+: c4 e2 60 f3 c9       blsr   %ecx,%ebx
-[ ]*[a-f0-9]+: 8f e9 60 01 c9       blcfill %ecx,%ebx
-#pass
+#dump: x86-64-arch-2.d
--- a/gas/testsuite/gas/i386/x86-64-arch-2-lzcnt.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-lzcnt.d
@@ -2,41 +2,4 @@
 #as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+lzcnt+padlock+bmi+tbm
 #objdump: -dw
 #name: x86-64 arch 2 (lzcnt)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 44 d8             cmove  %eax,%ebx
-[ ]*[a-f0-9]+: 0f ae 38             clflush \(%rax\)
-[ ]*[a-f0-9]+: 0f 05                 syscall
-[ ]*[a-f0-9]+: 0f fc dc             paddb  %mm4,%mm3
-[ ]*[a-f0-9]+: f3 0f 58 dc           addss  %xmm4,%xmm3
-[ ]*[a-f0-9]+: f2 0f 58 dc           addsd  %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77             vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4             vmxoff
-[ ]*[a-f0-9]+: 0f 37                 getsec
-[ ]*[a-f0-9]+: 0f 01 d0             xgetbv
-[ ]*[a-f0-9]+: 0f ae 31             xsaveopt \(%rcx\)
-[ ]*[a-f0-9]+: 66 0f 38 dc 01       aesenc \(%rcx\),%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08     pclmulqdq \$0x8,%xmm1,%xmm0
-[ ]*[a-f0-9]+: c4 e2 79 dc 11       vaesenc \(%rcx\),%xmm0,%xmm2
-[ ]*[a-f0-9]+: c4 e3 49 44 d4 08     vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: c4 e2 c9 98 d4       vfmadd132pd %xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: 0f 38 f0 19           movbe  \(%rcx\),%ebx
-[ ]*[a-f0-9]+: 48 0f c7 0e           cmpxchg16b \(%rsi\)
-[ ]*[a-f0-9]+: 66 0f 38 80 19       invept \(%rcx\),%rbx
-[ ]*[a-f0-9]+: 0f 01 f9             rdtscp
-[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
-[ ]*[a-f0-9]+: f2 0f 79 ca           insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da             vmload
-[ ]*[a-f0-9]+: f3 0f bd d9           lzcnt  %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0             xstore-rng
-[ ]*[a-f0-9]+: c4 e2 60 f3 c9       blsr   %ecx,%ebx
-[ ]*[a-f0-9]+: 8f e9 60 01 c9       blcfill %ecx,%ebx
-#pass
+#dump: x86-64-arch-2.d
--- a/gas/testsuite/gas/i386/x86-64-arch-2-prefetchw.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-prefetchw.d
@@ -2,41 +2,4 @@
 #as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+ept+clflush+syscall+rdtscp+sse4a+svme+lzcnt+padlock+bmi+tbm+prfchw
 #objdump: -dw
 #name: x86-64 arch 2 (prefetchw)
-
-.*:     file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 0f 44 d8             cmove  %eax,%ebx
-[ ]*[a-f0-9]+: 0f ae 38             clflush \(%rax\)
-[ ]*[a-f0-9]+: 0f 05                 syscall
-[ ]*[a-f0-9]+: 0f fc dc             paddb  %mm4,%mm3
-[ ]*[a-f0-9]+: f3 0f 58 dc           addss  %xmm4,%xmm3
-[ ]*[a-f0-9]+: f2 0f 58 dc           addsd  %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
-[ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77             vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4             vmxoff
-[ ]*[a-f0-9]+: 0f 37                 getsec
-[ ]*[a-f0-9]+: 0f 01 d0             xgetbv
-[ ]*[a-f0-9]+: 0f ae 31             xsaveopt \(%rcx\)
-[ ]*[a-f0-9]+: 66 0f 38 dc 01       aesenc \(%rcx\),%xmm0
-[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08     pclmulqdq \$0x8,%xmm1,%xmm0
-[ ]*[a-f0-9]+: c4 e2 79 dc 11       vaesenc \(%rcx\),%xmm0,%xmm2
-[ ]*[a-f0-9]+: c4 e3 49 44 d4 08     vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: c4 e2 c9 98 d4       vfmadd132pd %xmm4,%xmm6,%xmm2
-[ ]*[a-f0-9]+: 0f 38 f0 19           movbe  \(%rcx\),%ebx
-[ ]*[a-f0-9]+: 48 0f c7 0e           cmpxchg16b \(%rsi\)
-[ ]*[a-f0-9]+: 66 0f 38 80 19       invept \(%rcx\),%rbx
-[ ]*[a-f0-9]+: 0f 01 f9             rdtscp
-[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
-[ ]*[a-f0-9]+: f2 0f 79 ca           insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da             vmload
-[ ]*[a-f0-9]+: f3 0f bd d9           lzcnt  %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0             xstore-rng
-[ ]*[a-f0-9]+: c4 e2 60 f3 c9       blsr   %ecx,%ebx
-[ ]*[a-f0-9]+: 8f e9 60 01 c9       blcfill %ecx,%ebx
-#pass
+#dump: x86-64-arch-2.d
--- a/gas/testsuite/gas/i386/x86-64-arch-2.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-2.d
@@ -16,7 +16,7 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 0f d0 dc           addsubpd %xmm4,%xmm3
 [ ]*[a-f0-9]+: 66 0f 38 01 dc       phaddw %xmm4,%xmm3
 [ ]*[a-f0-9]+: 66 0f 38 41 d9       phminposuw %xmm1,%xmm3
-[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9       crc32  %ecx,%ebx
 [ ]*[a-f0-9]+: c5 fc 77             vzeroall
 [ ]*[a-f0-9]+: 0f 01 c4             vmxoff
 [ ]*[a-f0-9]+: 0f 37                 getsec
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-crc32-suffix.d
@@ -0,0 +1,35 @@
+#objdump: -dwMsuffix
+#name: x86-64 crc32 w/ suffix
+#source: x86-64-crc32.s
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ ]*[a-f0-9]+: f2 0f 38 f0 06       crc32b \(%rsi\),%eax
+[ ]*[a-f0-9]+: f2 48 0f 38 f0 06     crc32b \(%rsi\),%rax
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 06     crc32w \(%rsi\),%eax
+[ ]*[a-f0-9]+: f2 0f 38 f1 06       crc32l \(%rsi\),%eax
+[ ]*[a-f0-9]+: f2 48 0f 38 f1 06     crc32q \(%rsi\),%rax
+[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32b %al,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32b %al,%eax
+[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0     crc32b %al,%rax
+[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0     crc32b %al,%rax
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32w %ax,%eax
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32w %ax,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32l %eax,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32l %eax,%eax
+[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0     crc32q %rax,%rax
+[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0     crc32q %rax,%rax
+[ ]*[a-f0-9]+: f2 48 0f 38 f0 06     crc32b \(%rsi\),%rax
+[ ]*[a-f0-9]+: f2 0f 38 f0 06       crc32b \(%rsi\),%eax
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 06     crc32w \(%rsi\),%eax
+[ ]*[a-f0-9]+: f2 0f 38 f1 06       crc32l \(%rsi\),%eax
+[ ]*[a-f0-9]+: f2 48 0f 38 f1 06     crc32q \(%rsi\),%rax
+[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32b %al,%eax
+[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0     crc32b %al,%rax
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32w %ax,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32l %eax,%eax
+[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0     crc32q %rax,%rax
+#pass
--- a/gas/testsuite/gas/i386/x86-64-crc32.d
+++ b/gas/testsuite/gas/i386/x86-64-crc32.d
@@ -11,24 +11,24 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 f2 0f 38 f1 06     crc32w \(%rsi\),%eax
 [ ]*[a-f0-9]+: f2 0f 38 f1 06       crc32l \(%rsi\),%eax
 [ ]*[a-f0-9]+: f2 48 0f 38 f1 06     crc32q \(%rsi\),%rax
-[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32b %al,%eax
-[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32b %al,%eax
-[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0     crc32b %al,%rax
-[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0     crc32b %al,%rax
-[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32w %ax,%eax
-[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32w %ax,%eax
-[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32l %eax,%eax
-[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32l %eax,%eax
-[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0     crc32q %rax,%rax
-[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0     crc32q %rax,%rax
+[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32  %al,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32  %al,%eax
+[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0     crc32  %al,%rax
+[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0     crc32  %al,%rax
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32  %ax,%eax
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32  %ax,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32  %eax,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32  %eax,%eax
+[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0     crc32  %rax,%rax
+[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0     crc32  %rax,%rax
 [ ]*[a-f0-9]+: f2 48 0f 38 f0 06     crc32b \(%rsi\),%rax
 [ ]*[a-f0-9]+: f2 0f 38 f0 06       crc32b \(%rsi\),%eax
 [ ]*[a-f0-9]+: 66 f2 0f 38 f1 06     crc32w \(%rsi\),%eax
 [ ]*[a-f0-9]+: f2 0f 38 f1 06       crc32l \(%rsi\),%eax
 [ ]*[a-f0-9]+: f2 48 0f 38 f1 06     crc32q \(%rsi\),%rax
-[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32b %al,%eax
-[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0     crc32b %al,%rax
-[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32w %ax,%eax
-[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32l %eax,%eax
-[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0     crc32q %rax,%rax
+[ ]*[a-f0-9]+: f2 0f 38 f0 c0       crc32  %al,%eax
+[ ]*[a-f0-9]+: f2 48 0f 38 f0 c0     crc32  %al,%rax
+[ ]*[a-f0-9]+: 66 f2 0f 38 f1 c0     crc32  %ax,%eax
+[ ]*[a-f0-9]+: f2 0f 38 f1 c0       crc32  %eax,%eax
+[ ]*[a-f0-9]+: f2 48 0f 38 f1 c0     crc32  %rax,%rax
 #pass
--- a/gas/testsuite/gas/i386/x86-64-pseudos.d
+++ b/gas/testsuite/gas/i386/x86-64-pseudos.d
@@ -305,7 +305,7 @@ Disassembly of section .text:
  +[a-f0-9]+: 40 a0 01 00 00 00 00 00 00 00 rex movabs 0x1,%al
  +[a-f0-9]+: 40 38 ca             rex cmp %cl,%dl
  +[a-f0-9]+: 40 b3 01             rex mov \$(0x)?1,%bl
- +[a-f0-9]+: f2 40 0f 38 f0 c1     rex crc32b? %cl,%eax
+ +[a-f0-9]+: f2 40 0f 38 f0 c1     rex crc32 %cl,%eax
  +[a-f0-9]+: 40 89 c3             rex mov %eax,%ebx
  +[a-f0-9]+: 41 89 c6             mov    %eax,%r14d
  +[a-f0-9]+: 41 89 00             mov    %eax,\(%r8\)
--- a/gas/testsuite/gas/i386/x86-64-sse-noavx.d
+++ b/gas/testsuite/gas/i386/x86-64-sse-noavx.d
@@ -8,7 +8,7 @@ Disassembly of section .text:
 
 0+ <_start>:
 [ ]*[a-f0-9]+: 48 0f c7 08           cmpxchg16b \(%rax\)
-[ ]*[a-f0-9]+: f2 0f 38 f0 d9       crc32b %cl,%ebx
+[ ]*[a-f0-9]+: f2 0f 38 f0 d9       crc32  %cl,%ebx
 [ ]*[a-f0-9]+: 66 0f 2d d3           cvtpd2pi %xmm3,%mm2
 [ ]*[a-f0-9]+: 66 0f 2a d3           cvtpi2pd %mm3,%xmm2
 [ ]*[a-f0-9]+: 0f 2a d3             cvtpi2ps %mm3,%xmm2
--- a/gas/testsuite/gas/i386/x86-64-sse4_2.d
+++ b/gas/testsuite/gas/i386/x86-64-sse4_2.d
@@ -6,20 +6,20 @@
 Disassembly of section .text:
 
 0+000 <foo>:
-[ ]*[0-9a-f]+: f2 0f 38 f0 d9       crc32b %cl,%ebx
-[ ]*[0-9a-f]+: f2 48 0f 38 f0 d9     crc32b %cl,%rbx
-[ ]*[0-9a-f]+: 66 f2 0f 38 f1 d9     crc32w %cx,%ebx
-[ ]*[0-9a-f]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[0-9a-f]+: f2 48 0f 38 f1 d9     crc32q %rcx,%rbx
+[ ]*[0-9a-f]+: f2 0f 38 f0 d9       crc32  %cl,%ebx
+[ ]*[0-9a-f]+: f2 48 0f 38 f0 d9     crc32  %cl,%rbx
+[ ]*[0-9a-f]+: 66 f2 0f 38 f1 d9     crc32  %cx,%ebx
+[ ]*[0-9a-f]+: f2 0f 38 f1 d9       crc32  %ecx,%ebx
+[ ]*[0-9a-f]+: f2 48 0f 38 f1 d9     crc32  %rcx,%rbx
 [ ]*[0-9a-f]+: f2 0f 38 f0 19       crc32b \(%rcx\),%ebx
 [ ]*[0-9a-f]+: 66 f2 0f 38 f1 19     crc32w \(%rcx\),%ebx
 [ ]*[0-9a-f]+: f2 0f 38 f1 19       crc32l \(%rcx\),%ebx
 [ ]*[0-9a-f]+: f2 48 0f 38 f1 19     crc32q \(%rcx\),%rbx
-[ ]*[0-9a-f]+: f2 0f 38 f0 d9       crc32b %cl,%ebx
-[ ]*[0-9a-f]+: f2 48 0f 38 f0 d9     crc32b %cl,%rbx
-[ ]*[0-9a-f]+: 66 f2 0f 38 f1 d9     crc32w %cx,%ebx
-[ ]*[0-9a-f]+: f2 0f 38 f1 d9       crc32l %ecx,%ebx
-[ ]*[0-9a-f]+: f2 48 0f 38 f1 d9     crc32q %rcx,%rbx
+[ ]*[0-9a-f]+: f2 0f 38 f0 d9       crc32  %cl,%ebx
+[ ]*[0-9a-f]+: f2 48 0f 38 f0 d9     crc32  %cl,%rbx
+[ ]*[0-9a-f]+: 66 f2 0f 38 f1 d9     crc32  %cx,%ebx
+[ ]*[0-9a-f]+: f2 0f 38 f1 d9       crc32  %ecx,%ebx
+[ ]*[0-9a-f]+: f2 48 0f 38 f1 d9     crc32  %rcx,%rbx
 [ ]*[0-9a-f]+: 66 0f 38 37 01       pcmpgtq \(%rcx\),%xmm0
 [ ]*[0-9a-f]+: 66 0f 38 37 c1       pcmpgtq %xmm1,%xmm0
 [ ]*[0-9a-f]+: 66 0f 3a 61 01 00     pcmpestril? \$0x0,\(%rcx\),%xmm0
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -115,7 +115,6 @@ static void HLE_Fixup2 (int, int);
 static void HLE_Fixup3 (int, int);
 static void CMPXCHG8B_Fixup (int, int);
 static void XMM_Fixup (int, int);
-static void CRC32_Fixup (int, int);
 static void FXSAVE_Fixup (int, int);
 static void PCMPESTR_Fixup (int, int);
 
@@ -4426,7 +4425,7 @@ static const struct dis386 prefix_table[
     { "movbeS", { Gv, { MOVBE_Fixup, v_mode } }, PREFIX_OPCODE },
     { Bad_Opcode },
     { "movbeS", { Gv, { MOVBE_Fixup, v_mode } }, PREFIX_OPCODE },
-    { "crc32", { Gdq, { CRC32_Fixup, b_mode } }, PREFIX_OPCODE },
+    { "crc32A", { Gdq, Eb }, PREFIX_OPCODE },
   },
 
   /* PREFIX_0F38F1 */
@@ -4434,7 +4433,7 @@ static const struct dis386 prefix_table[
     { "movbeS", { { MOVBE_Fixup, v_mode }, Gv }, PREFIX_OPCODE },
     { Bad_Opcode },
     { "movbeS", { { MOVBE_Fixup, v_mode }, Gv }, PREFIX_OPCODE },
-    { "crc32", { Gdq, { CRC32_Fixup, v_mode } }, PREFIX_OPCODE },
+    { "crc32Q", { Gdq, Ev }, PREFIX_OPCODE },
   },
 
   /* PREFIX_0F38F5 */
@@ -16370,78 +16369,6 @@ XMM_Fixup (int reg, int sizeflag ATTRIBU
 }
 
 static void
-CRC32_Fixup (int bytemode, int sizeflag)
-{
-  /* Add proper suffix to "crc32".  */
-  char *p = mnemonicendp;
-
-  switch (bytemode)
-    {
-    case b_mode:
-      if (intel_syntax)
- goto skip;
-
-      *p++ = 'b';
-      break;
-    case v_mode:
-      if (intel_syntax)
- goto skip;
-
-      USED_REX (REX_W);
-      if (rex & REX_W)
- *p++ = 'q';
-      else
- {
-  if (sizeflag & DFLAG)
-    *p++ = 'l';
-  else
-    *p++ = 'w';
-  used_prefixes |= (prefixes & PREFIX_DATA);
- }
-      break;
-    default:
-      oappend (INTERNAL_DISASSEMBLER_ERROR);
-      break;
-    }
-  mnemonicendp = p;
-  *p = '\0';
-
- skip:
-  if (modrm.mod == 3)
-    {
-      int add;
-
-      /* Skip mod/rm byte.  */
-      MODRM_CHECK;
-      codep++;
-
-      USED_REX (REX_B);
-      add = (rex & REX_B) ? 8 : 0;
-      if (bytemode == b_mode)
- {
-  if (modrm.rm & 4)
-    USED_REX (0);
-  if (rex)
-    oappend (names8rex[modrm.rm + add]);
-  else
-    oappend (names8[modrm.rm + add]);
- }
-      else
- {
-  USED_REX (REX_W);
-  if (rex & REX_W)
-    oappend (names64[modrm.rm + add]);
-  else if ((prefixes & PREFIX_DATA))
-    oappend (names16[modrm.rm + add]);
-  else
-    oappend (names32[modrm.rm + add]);
- }
-    }
-  else
-    OP_E (bytemode, sizeflag);
-}
-
-static void
 FXSAVE_Fixup (int bytemode, int sizeflag)
 {
   /* Add proper suffix to "fxsave" and "fxrstor".  */
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[PATCH 05/19] x86: don't disassemble MOVBE with two suffixes

Jan Beulich-2
In reply to this post by Jan Beulich-2
MOVBE_Fixup() is entirely redundant with the S macro already used on the
mnemonics, leading to double suffixes in suffix-always mode. Drop the
function.

gas/
2020-07-XX  Jan Beulich  <[hidden email]>

        * testsuite/gas/i386/movbe-suffix.d,
        testsuite/gas/i386/x86-64-movbe-suffix.d: New.
        * testsuite/gas/i386/i386.exp: Run new tests.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (MOVBE_Fixup): Delete.
        (Mv): Define.
        (prefix_table): Use Mv for movbe entries.

--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -270,6 +270,7 @@ if [expr ([istarget "i*86-*-*"] ||  [ist
     run_dump_test "sse-noavx"
     run_dump_test "movbe"
     run_dump_test "movbe-intel"
+    run_dump_test "movbe-suffix"
     run_list_test "inval-movbe" "-al"
     run_dump_test "ept"
     run_dump_test "ept-intel"
@@ -876,6 +877,7 @@ if [expr ([istarget "i*86-*-*"] || [ista
     run_dump_test "x86-64-sse-noavx"
     run_dump_test "x86-64-movbe"
     run_dump_test "x86-64-movbe-intel"
+    run_dump_test "x86-64-movbe-suffix"
     run_list_test "x86-64-inval-movbe" "-al"
     run_dump_test "x86-64-ept"
     run_dump_test "x86-64-ept-intel"
--- /dev/null
+++ b/gas/testsuite/gas/i386/movbe-suffix.d
@@ -0,0 +1,22 @@
+#objdump: -dwMsuffix
+#name: i386 movbe w/ suffix
+#source: movbe.s
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ ]*[a-f0-9]+: 66 0f 38 f0 19       movbew \(%ecx\),%bx
+[ ]*[a-f0-9]+: 0f 38 f0 19           movbel \(%ecx\),%ebx
+[ ]*[a-f0-9]+: 66 0f 38 f1 19       movbew %bx,\(%ecx\)
+[ ]*[a-f0-9]+: 0f 38 f1 19           movbel %ebx,\(%ecx\)
+[ ]*[a-f0-9]+: 66 0f 38 f0 19       movbew \(%ecx\),%bx
+[ ]*[a-f0-9]+: 0f 38 f0 19           movbel \(%ecx\),%ebx
+[ ]*[a-f0-9]+: 66 0f 38 f1 19       movbew %bx,\(%ecx\)
+[ ]*[a-f0-9]+: 0f 38 f1 19           movbel %ebx,\(%ecx\)
+[ ]*[a-f0-9]+: 66 0f 38 f0 19       movbew \(%ecx\),%bx
+[ ]*[a-f0-9]+: 0f 38 f0 19           movbel \(%ecx\),%ebx
+[ ]*[a-f0-9]+: 66 0f 38 f1 19       movbew %bx,\(%ecx\)
+[ ]*[a-f0-9]+: 0f 38 f1 19           movbel %ebx,\(%ecx\)
+#pass
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-movbe-suffix.d
@@ -0,0 +1,28 @@
+#objdump: -dwMsuffix
+#name: x86-64 movbe w/ suffix
+#source: x86-64-movbe.s
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ ]*[a-f0-9]+: 66 45 0f 38 f0 29     movbew \(%r9\),%r13w
+[ ]*[a-f0-9]+: 45 0f 38 f0 29       movbel \(%r9\),%r13d
+[ ]*[a-f0-9]+: 4d 0f 38 f0 29       movbeq \(%r9\),%r13
+[ ]*[a-f0-9]+: 66 45 0f 38 f1 29     movbew %r13w,\(%r9\)
+[ ]*[a-f0-9]+: 45 0f 38 f1 29       movbel %r13d,\(%r9\)
+[ ]*[a-f0-9]+: 4d 0f 38 f1 29       movbeq %r13,\(%r9\)
+[ ]*[a-f0-9]+: 66 45 0f 38 f0 29     movbew \(%r9\),%r13w
+[ ]*[a-f0-9]+: 45 0f 38 f0 29       movbel \(%r9\),%r13d
+[ ]*[a-f0-9]+: 4d 0f 38 f0 29       movbeq \(%r9\),%r13
+[ ]*[a-f0-9]+: 66 45 0f 38 f1 29     movbew %r13w,\(%r9\)
+[ ]*[a-f0-9]+: 45 0f 38 f1 29       movbel %r13d,\(%r9\)
+[ ]*[a-f0-9]+: 4d 0f 38 f1 29       movbeq %r13,\(%r9\)
+[ ]*[a-f0-9]+: 66 0f 38 f0 19       movbew \(%rcx\),%bx
+[ ]*[a-f0-9]+: 0f 38 f0 19           movbel \(%rcx\),%ebx
+[ ]*[a-f0-9]+: 48 0f 38 f0 19       movbeq \(%rcx\),%rbx
+[ ]*[a-f0-9]+: 66 0f 38 f1 19       movbew %bx,\(%rcx\)
+[ ]*[a-f0-9]+: 0f 38 f1 19           movbel %ebx,\(%rcx\)
+[ ]*[a-f0-9]+: 48 0f 38 f1 19       movbeq %rbx,\(%rcx\)
+#pass
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -118,7 +118,6 @@ static void XMM_Fixup (int, int);
 static void FXSAVE_Fixup (int, int);
 static void PCMPESTR_Fixup (int, int);
 
-static void MOVBE_Fixup (int, int);
 static void MOVSXD_Fixup (int, int);
 
 static void OP_Mask (int, int);
@@ -266,6 +265,7 @@ fetch_data (struct disassemble_info *inf
 #define Mo { OP_M, o_mode }
 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
 #define Mq { OP_M, q_mode }
+#define Mv { OP_M, v_mode }
 #define Mv_bnd { OP_M, v_bndmk_mode }
 #define Mx { OP_M, x_mode }
 #define Mxmm { OP_M, xmm_mode }
@@ -4422,17 +4422,17 @@ static const struct dis386 prefix_table[
 
   /* PREFIX_0F38F0 */
   {
-    { "movbeS", { Gv, { MOVBE_Fixup, v_mode } }, PREFIX_OPCODE },
+    { "movbeS", { Gv, Mv }, PREFIX_OPCODE },
     { Bad_Opcode },
-    { "movbeS", { Gv, { MOVBE_Fixup, v_mode } }, PREFIX_OPCODE },
+    { "movbeS", { Gv, Mv }, PREFIX_OPCODE },
     { "crc32A", { Gdq, Eb }, PREFIX_OPCODE },
   },
 
   /* PREFIX_0F38F1 */
   {
-    { "movbeS", { { MOVBE_Fixup, v_mode }, Gv }, PREFIX_OPCODE },
+    { "movbeS", { Mv, Gv }, PREFIX_OPCODE },
     { Bad_Opcode },
-    { "movbeS", { { MOVBE_Fixup, v_mode }, Gv }, PREFIX_OPCODE },
+    { "movbeS", { Mv, Gv }, PREFIX_OPCODE },
     { "crc32Q", { Gdq, Ev }, PREFIX_OPCODE },
   },
 
@@ -16808,44 +16808,6 @@ PCLMUL_Fixup (int bytemode ATTRIBUTE_UNU
 }
 
 static void
-MOVBE_Fixup (int bytemode, int sizeflag)
-{
-  /* Add proper suffix to "movbe".  */
-  char *p = mnemonicendp;
-
-  switch (bytemode)
-    {
-    case v_mode:
-      if (intel_syntax)
- goto skip;
-
-      USED_REX (REX_W);
-      if (sizeflag & SUFFIX_ALWAYS)
- {
-  if (rex & REX_W)
-    *p++ = 'q';
-  else
-    {
-      if (sizeflag & DFLAG)
- *p++ = 'l';
-      else
- *p++ = 'w';
-      used_prefixes |= (prefixes & PREFIX_DATA);
-    }
- }
-      break;
-    default:
-      oappend (INTERNAL_DISASSEMBLER_ERROR);
-      break;
-    }
-  mnemonicendp = p;
-  *p = '\0';
-
- skip:
-  OP_M (bytemode, sizeflag);
-}
-
-static void
 MOVSXD_Fixup (int bytemode, int sizeflag)
 {
   /* Add proper suffix to "movsxd".  */
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[PATCH 06/19] x86: fold VCMP_Fixup() into CMP_Fixup()

Jan Beulich-2
In reply to this post by Jan Beulich-2
There's no reason to have two functions and two tables, when the AVX
functionality here is a proper superset of the SSE one.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (VCMP_Fixup, VCMP): Delete.
        (simd_cmp_op): Add const.
        (vex_cmp_op): Move up and drop initial 8 entries. Add const.
        (CMP_Fixup): Handle VEX case.
        (prefix_table): Replace VCMP by CMP.
        * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.

--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -291,9 +291,9 @@
   },
   /* PREFIX_EVEX_0FC2 */
   {
-    { "vcmppX", { XMask, Vex, EXx, EXxEVexS, VCMP }, PREFIX_OPCODE },
+    { "vcmppX", { XMask, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
     { VEX_W_TABLE (EVEX_W_0FC2_P_1) },
-    { "vcmppX", { XMask, Vex, EXx, EXxEVexS, VCMP }, PREFIX_OPCODE },
+    { "vcmppX", { XMask, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
     { VEX_W_TABLE (EVEX_W_0FC2_P_3) },
   },
   /* PREFIX_EVEX_0FC4 */
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -270,12 +270,12 @@
   },
   /* EVEX_W_0FC2_P_1 */
   {
-    { "vcmpss", { XMask, VexScalar, EXxmm_md, EXxEVexS, VCMP }, 0 },
+    { "vcmpss", { XMask, VexScalar, EXxmm_md, EXxEVexS, CMP }, 0 },
   },
   /* EVEX_W_0FC2_P_3 */
   {
     { Bad_Opcode },
-    { "vcmpsd", { XMask, VexScalar, EXxmm_mq, EXxEVexS, VCMP }, 0 },
+    { "vcmpsd", { XMask, VexScalar, EXxmm_mq, EXxEVexS, CMP }, 0 },
   },
   /* EVEX_W_0FD2 */
   {
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -95,7 +95,6 @@ static void OP_Rounding (int, int);
 static void OP_REG_VexI4 (int, int);
 static void OP_VexI4 (int, int);
 static void PCLMUL_Fixup (int, int);
-static void VCMP_Fixup (int, int);
 static void VPCMP_Fixup (int, int);
 static void VPCOM_Fixup (int, int);
 static void OP_0f07 (int, int);
@@ -409,7 +408,6 @@ fetch_data (struct disassemble_info *inf
 #define XMVexScalarI4 { OP_REG_VexI4, scalar_mode }
 #define VexI4 { OP_VexI4, 0 }
 #define PCLMUL { PCLMUL_Fixup, 0 }
-#define VCMP { VCMP_Fixup, 0 }
 #define VPCMP { VPCMP_Fixup, 0 }
 #define VPCOM { VPCOM_Fixup, 0 }
 
@@ -5144,10 +5142,10 @@ static const struct dis386 prefix_table[
 
   /* PREFIX_VEX_0FC2 */
   {
-    { "vcmpps", { XM, Vex, EXx, VCMP }, 0 },
-    { "vcmpss", { XMScalar, VexScalar, EXxmm_md, VCMP }, 0 },
-    { "vcmppd", { XM, Vex, EXx, VCMP }, 0 },
-    { "vcmpsd", { XMScalar, VexScalar, EXxmm_mq, VCMP }, 0 },
+    { "vcmpps", { XM, Vex, EXx, CMP }, 0 },
+    { "vcmpss", { XMScalar, VexScalar, EXxmm_md, CMP }, 0 },
+    { "vcmppd", { XM, Vex, EXx, CMP }, 0 },
+    { "vcmpsd", { XMScalar, VexScalar, EXxmm_mq, CMP }, 0 },
   },
 
   /* PREFIX_VEX_0FC4 */
@@ -16111,7 +16109,7 @@ OP_3DNowSuffix (int bytemode ATTRIBUTE_U
   mnemonicendp = obufp;
 }
 
-static struct op simd_cmp_op[] =
+static const struct op simd_cmp_op[] =
 {
   { STRING_COMMA_LEN ("eq") },
   { STRING_COMMA_LEN ("lt") },
@@ -16123,6 +16121,34 @@ static struct op simd_cmp_op[] =
   { STRING_COMMA_LEN ("ord") }
 };
 
+static const struct op vex_cmp_op[] =
+{
+  { STRING_COMMA_LEN ("eq_uq") },
+  { STRING_COMMA_LEN ("nge") },
+  { STRING_COMMA_LEN ("ngt") },
+  { STRING_COMMA_LEN ("false") },
+  { STRING_COMMA_LEN ("neq_oq") },
+  { STRING_COMMA_LEN ("ge") },
+  { STRING_COMMA_LEN ("gt") },
+  { STRING_COMMA_LEN ("true") },
+  { STRING_COMMA_LEN ("eq_os") },
+  { STRING_COMMA_LEN ("lt_oq") },
+  { STRING_COMMA_LEN ("le_oq") },
+  { STRING_COMMA_LEN ("unord_s") },
+  { STRING_COMMA_LEN ("neq_us") },
+  { STRING_COMMA_LEN ("nlt_uq") },
+  { STRING_COMMA_LEN ("nle_uq") },
+  { STRING_COMMA_LEN ("ord_s") },
+  { STRING_COMMA_LEN ("eq_us") },
+  { STRING_COMMA_LEN ("nge_uq") },
+  { STRING_COMMA_LEN ("ngt_uq") },
+  { STRING_COMMA_LEN ("false_os") },
+  { STRING_COMMA_LEN ("neq_os") },
+  { STRING_COMMA_LEN ("ge_oq") },
+  { STRING_COMMA_LEN ("gt_oq") },
+  { STRING_COMMA_LEN ("true_us") },
+};
+
 static void
 CMP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
 {
@@ -16140,6 +16166,18 @@ CMP_Fixup (int bytemode ATTRIBUTE_UNUSED
       sprintf (p, "%s%s", simd_cmp_op[cmp_type].name, suffix);
       mnemonicendp += simd_cmp_op[cmp_type].len;
     }
+  else if (need_vex
+   && cmp_type < ARRAY_SIZE (simd_cmp_op) + ARRAY_SIZE (vex_cmp_op))
+    {
+      char suffix [3];
+      char *p = mnemonicendp - 2;
+      suffix[0] = p[0];
+      suffix[1] = p[1];
+      suffix[2] = '\0';
+      cmp_type -= ARRAY_SIZE (simd_cmp_op);
+      sprintf (p, "%s%s", vex_cmp_op[cmp_type].name, suffix);
+      mnemonicendp += vex_cmp_op[cmp_type].len;
+    }
   else
     {
       /* We have a reserved extension byte.  Output it directly.  */
@@ -16597,69 +16635,6 @@ OP_XMM_Vex (int bytemode, int sizeflag)
   OP_XMM (bytemode, sizeflag);
 }
 
-static struct op vex_cmp_op[] =
-{
-  { STRING_COMMA_LEN ("eq") },
-  { STRING_COMMA_LEN ("lt") },
-  { STRING_COMMA_LEN ("le") },
-  { STRING_COMMA_LEN ("unord") },
-  { STRING_COMMA_LEN ("neq") },
-  { STRING_COMMA_LEN ("nlt") },
-  { STRING_COMMA_LEN ("nle") },
-  { STRING_COMMA_LEN ("ord") },
-  { STRING_COMMA_LEN ("eq_uq") },
-  { STRING_COMMA_LEN ("nge") },
-  { STRING_COMMA_LEN ("ngt") },
-  { STRING_COMMA_LEN ("false") },
-  { STRING_COMMA_LEN ("neq_oq") },
-  { STRING_COMMA_LEN ("ge") },
-  { STRING_COMMA_LEN ("gt") },
-  { STRING_COMMA_LEN ("true") },
-  { STRING_COMMA_LEN ("eq_os") },
-  { STRING_COMMA_LEN ("lt_oq") },
-  { STRING_COMMA_LEN ("le_oq") },
-  { STRING_COMMA_LEN ("unord_s") },
-  { STRING_COMMA_LEN ("neq_us") },
-  { STRING_COMMA_LEN ("nlt_uq") },
-  { STRING_COMMA_LEN ("nle_uq") },
-  { STRING_COMMA_LEN ("ord_s") },
-  { STRING_COMMA_LEN ("eq_us") },
-  { STRING_COMMA_LEN ("nge_uq") },
-  { STRING_COMMA_LEN ("ngt_uq") },
-  { STRING_COMMA_LEN ("false_os") },
-  { STRING_COMMA_LEN ("neq_os") },
-  { STRING_COMMA_LEN ("ge_oq") },
-  { STRING_COMMA_LEN ("gt_oq") },
-  { STRING_COMMA_LEN ("true_us") },
-};
-
-static void
-VCMP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
-{
-  unsigned int cmp_type;
-
-  FETCH_DATA (the_info, codep + 1);
-  cmp_type = *codep++ & 0xff;
-  if (cmp_type < ARRAY_SIZE (vex_cmp_op))
-    {
-      char suffix [3];
-      char *p = mnemonicendp - 2;
-      suffix[0] = p[0];
-      suffix[1] = p[1];
-      suffix[2] = '\0';
-      sprintf (p, "%s%s", vex_cmp_op[cmp_type].name, suffix);
-      mnemonicendp += vex_cmp_op[cmp_type].len;
-    }
-  else
-    {
-      /* We have a reserved extension byte.  Output it directly.  */
-      scratchbuf[0] = '$';
-      print_operand_value (scratchbuf + 1, 1, cmp_type);
-      oappend_maybe_intel (scratchbuf);
-      scratchbuf[0] = '\0';
-    }
-}
-
 static void
 VPCMP_Fixup (int bytemode ATTRIBUTE_UNUSED,
      int sizeflag ATTRIBUTE_UNUSED)

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[PATCH 07/19] x86-64: fix {, V}PCMPESTR{I, M} disassembly in Intel mode

Jan Beulich-2
In reply to this post by Jan Beulich-2
The operands don't allow disambiguating the insn in 64-bit mode, and
hence suffixes need to be emitted not just in AT&T mode. Achieve this
by re-using %LQ while dropping PCMPESTR_Fixup().

gas/
2020-07-XX  Jan Beulich  <[hidden email]>

        * testsuite/gas/i386/x86-64-avx-intel.d,
        testsuite/gas/i386/x86-64-sse4_2-intel.d: Adjust expectations.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (PCMPESTR_Fixup): Delete.
        (dis386): Adjust "LQ" description.
        (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
        cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
        PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
        vpcmpestrm, and vpcmpestri.
        (putop): Honor "cond" when handling LQ.
        * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
        vcvtsi2ss and vcvtusi2ss.
        * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
        vcvtsi2sd and vcvtusi2sd.

--- a/gas/testsuite/gas/i386/x86-64-avx-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-avx-intel.d
@@ -781,11 +781,11 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: c4 e3 79 df 31 07     vaeskeygenassist xmm6,XMMWORD PTR \[rcx\],0x7
 [ ]*[a-f0-9]+: c4 e3 79 61 f4 07     vpcmpestri xmm6,xmm4,0x7
 [ ]*[a-f0-9]+: c4 e3 79 61 31 07     vpcmpestri xmm6,XMMWORD PTR \[rcx\],0x7
-[ ]*[a-f0-9]+: c4 e3 f9 61 f4 07     vpcmpestri xmm6,xmm4,0x7
+[ ]*[a-f0-9]+: c4 e3 f9 61 f4 07     vpcmpestriq xmm6,xmm4,0x7
 [ ]*[a-f0-9]+: c4 e3 79 61 31 07     vpcmpestri xmm6,XMMWORD PTR \[rcx\],0x7
 [ ]*[a-f0-9]+: c4 e3 79 60 f4 07     vpcmpestrm xmm6,xmm4,0x7
 [ ]*[a-f0-9]+: c4 e3 79 60 31 07     vpcmpestrm xmm6,XMMWORD PTR \[rcx\],0x7
-[ ]*[a-f0-9]+: c4 e3 f9 60 f4 07     vpcmpestrm xmm6,xmm4,0x7
+[ ]*[a-f0-9]+: c4 e3 f9 60 f4 07     vpcmpestrmq xmm6,xmm4,0x7
 [ ]*[a-f0-9]+: c4 e3 79 60 31 07     vpcmpestrm xmm6,XMMWORD PTR \[rcx\],0x7
 [ ]*[a-f0-9]+: c4 e3 79 63 f4 07     vpcmpistri xmm6,xmm4,0x7
 [ ]*[a-f0-9]+: c4 e3 79 63 31 07     vpcmpistri xmm6,XMMWORD PTR \[rcx\],0x7
--- a/gas/testsuite/gas/i386/x86-64-sse4_2-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-sse4_2-intel.d
@@ -25,11 +25,11 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 0f 38 37 c1       pcmpgtq xmm0,xmm1
 [ ]*[a-f0-9]+: 66 0f 3a 61 01 00     pcmpestri xmm0,XMMWORD PTR \[rcx\],0x0
 [ ]*[a-f0-9]+: 66 0f 3a 61 c1 00     pcmpestri xmm0,xmm1,0x0
-[ ]*[a-f0-9]+: 66 48 0f 3a 61 01 00 rex\.W pcmpestri xmm0,XMMWORD PTR \[rcx\],0x0
+[ ]*[a-f0-9]+: 66 48 0f 3a 61 01 00 pcmpestriq xmm0,XMMWORD PTR \[rcx\],0x0
 [ ]*[a-f0-9]+: 66 0f 3a 61 c1 00     pcmpestri xmm0,xmm1,0x0
 [ ]*[a-f0-9]+: 66 0f 3a 60 01 01     pcmpestrm xmm0,XMMWORD PTR \[rcx\],0x1
 [ ]*[a-f0-9]+: 66 0f 3a 60 c1 01     pcmpestrm xmm0,xmm1,0x1
-[ ]*[a-f0-9]+: 66 48 0f 3a 60 01 01 rex\.W pcmpestrm xmm0,XMMWORD PTR \[rcx\],0x1
+[ ]*[a-f0-9]+: 66 48 0f 3a 60 01 01 pcmpestrmq xmm0,XMMWORD PTR \[rcx\],0x1
 [ ]*[a-f0-9]+: 66 0f 3a 60 c1 01     pcmpestrm xmm0,xmm1,0x1
 [ ]*[a-f0-9]+: 66 0f 3a 63 01 02     pcmpistri xmm0,XMMWORD PTR \[rcx\],0x2
 [ ]*[a-f0-9]+: 66 0f 3a 63 c1 02     pcmpistri xmm0,xmm1,0x2
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -28,7 +28,7 @@
   /* PREFIX_EVEX_0F2A */
   {
     { Bad_Opcode },
-    { "vcvtsi2ss%LQ", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
+    { "vcvtsi2ss{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
     { Bad_Opcode },
     { VEX_W_TABLE (EVEX_W_0F2A_P_3) },
   },
@@ -272,7 +272,7 @@
   /* PREFIX_EVEX_0F7B */
   {
     { Bad_Opcode },
-    { "vcvtusi2ss%LQ", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
+    { "vcvtusi2ss{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
     { VEX_W_TABLE (EVEX_W_0F7B_P_2) },
     { VEX_W_TABLE (EVEX_W_0F7B_P_3) },
   },
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -39,8 +39,8 @@
   },
   /* EVEX_W_0F2A_P_3 */
   {
-    { "vcvtsi2sd%LQ", { XMScalar, VexScalar, Ed }, 0 },
-    { "vcvtsi2sd%LQ", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
+    { "vcvtsi2sd{%LQ|}", { XMScalar, VexScalar, Ed }, 0 },
+    { "vcvtsi2sd{%LQ|}", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
   },
   /* EVEX_W_0F51_P_1 */
   {
@@ -245,8 +245,8 @@
   },
   /* EVEX_W_0F7B_P_3 */
   {
-    { "vcvtusi2sd%LQ", { XMScalar, VexScalar, Ed }, 0 },
-    { "vcvtusi2sd%LQ", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
+    { "vcvtusi2sd{%LQ|}", { XMScalar, VexScalar, Ed }, 0 },
+    { "vcvtusi2sd{%LQ|}", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
   },
   /* EVEX_W_0F7E_P_1 */
   {
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -115,7 +115,6 @@ static void HLE_Fixup3 (int, int);
 static void CMPXCHG8B_Fixup (int, int);
 static void XMM_Fixup (int, int);
 static void FXSAVE_Fixup (int, int);
-static void PCMPESTR_Fixup (int, int);
 
 static void MOVSXD_Fixup (int, int);
 
@@ -2287,8 +2286,8 @@ struct dis386 {
    "XZ" => print 'x', 'y', or 'z' if suffix_always is true or no
    register operands and no broadcast.
    "XW" => print 's', 'd' depending on the VEX.W bit (for FMA)
-   "LQ" => print 'l' ('d' in Intel mode) or 'q' for memory
-   operand or no operand at all in 64bit mode, or if suffix_always
+   "LQ" => print 'l' ('d' in Intel mode) or 'q' for memory operand, cond
+   being false, or no operand at all in 64bit mode, or if suffix_always
    is true.
    "LB" => print "abs" in 64bit mode and behave as 'B' otherwise
    "LS" => print "abs" in 64bit mode and behave as 'S' otherwise
@@ -3703,9 +3702,9 @@ static const struct dis386 prefix_table[
   /* PREFIX_0F2A */
   {
     { "cvtpi2ps", { XM, EMCq }, PREFIX_OPCODE },
-    { "cvtsi2ss%LQ", { XM, Edq }, PREFIX_OPCODE },
+    { "cvtsi2ss{%LQ|}", { XM, Edq }, PREFIX_OPCODE },
     { "cvtpi2pd", { XM, EMCq }, PREFIX_OPCODE },
-    { "cvtsi2sd%LQ", { XM, Edq }, 0 },
+    { "cvtsi2sd{%LQ|}", { XM, Edq }, 0 },
   },
 
   /* PREFIX_0F2B */
@@ -3966,13 +3965,13 @@ static const struct dis386 prefix_table[
   /* PREFIX_0FAE_REG_4_MOD_0 */
   {
     { "xsave", { FXSAVE }, 0 },
-    { "ptwrite%LQ", { Edq }, 0 },
+    { "ptwrite{%LQ|}", { Edq }, 0 },
   },
 
   /* PREFIX_0FAE_REG_4_MOD_3 */
   {
     { Bad_Opcode },
-    { "ptwrite%LQ", { Edq }, 0 },
+    { "ptwrite{%LQ|}", { Edq }, 0 },
   },
 
   /* PREFIX_0FAE_REG_5_MOD_0 */
@@ -4592,14 +4591,14 @@ static const struct dis386 prefix_table[
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "pcmpestrm", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, PREFIX_OPCODE },
+    { "pcmpestrm!%LQ", { XM, EXx, Ib }, PREFIX_OPCODE },
   },
 
   /* PREFIX_0F3A61 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "pcmpestri", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, PREFIX_OPCODE },
+    { "pcmpestri!%LQ", { XM, EXx, Ib }, PREFIX_OPCODE },
   },
 
   /* PREFIX_0F3A62 */
@@ -4676,9 +4675,9 @@ static const struct dis386 prefix_table[
   /* PREFIX_VEX_0F2A */
   {
     { Bad_Opcode },
-    { "vcvtsi2ss%LQ", { XMScalar, VexScalar, Edq }, 0 },
+    { "vcvtsi2ss{%LQ|}", { XMScalar, VexScalar, Edq }, 0 },
     { Bad_Opcode },
-    { "vcvtsi2sd%LQ", { XMScalar, VexScalar, Edq }, 0 },
+    { "vcvtsi2sd{%LQ|}", { XMScalar, VexScalar, Edq }, 0 },
   },
 
   /* PREFIX_VEX_0F2C */
@@ -9847,12 +9846,12 @@ static const struct dis386 vex_len_table
 
   /* VEX_LEN_0F3A60_P_2 */
   {
-    { "vpcmpestrm", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, 0 },
+    { "vpcmpestrm!%LQ", { XM, EXx, Ib }, 0 },
   },
 
   /* VEX_LEN_0F3A61_P_2 */
   {
-    { "vpcmpestri", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, 0 },
+    { "vpcmpestri!%LQ", { XM, EXx, Ib }, 0 },
   },
 
   /* VEX_LEN_0F3A62_P_2 */
@@ -13644,15 +13643,15 @@ putop (const char *in_template, int size
     }
   else if (l == 1 && last[0] == 'L')
     {
-      if ((intel_syntax && need_modrm)
-  || (modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)))
+      if (cond ? modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)
+       : address_mode != mode_64bit)
  break;
       if ((rex & REX_W))
  {
   USED_REX (REX_W);
   *obufp++ = 'q';
  }
-      else if((address_mode == mode_64bit && need_modrm)
+      else if((address_mode == mode_64bit && need_modrm && cond)
       || (sizeflag & SUFFIX_ALWAYS))
  *obufp++ = intel_syntax? 'd' : 'l';
     }
@@ -16422,27 +16421,6 @@ FXSAVE_Fixup (int bytemode, int sizeflag
   OP_M (bytemode, sizeflag);
 }
 
-static void
-PCMPESTR_Fixup (int bytemode, int sizeflag)
-{
-  /* Add proper suffix to "{,v}pcmpestr{i,m}".  */
-  if (!intel_syntax)
-    {
-      char *p = mnemonicendp;
-
-      USED_REX (REX_W);
-      if (rex & REX_W)
- *p++ = 'q';
-      else if (sizeflag & SUFFIX_ALWAYS)
- *p++ = 'l';
-
-      *p = '\0';
-      mnemonicendp = p;
-    }
-
-  OP_EX (bytemode, sizeflag);
-}
-
 /* Display the destination register operand for instructions with
    VEX. */
 

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[PATCH 08/19] x86: extend %BW use to VP{COMPRESS,EXPAND}{B,W}

Jan Beulich-2
In reply to this post by Jan Beulich-2
Unlike the earlier ones these also need their operands adjusted. Replace
the (mis-described: there's nothing "scalar" here) {b,w}_scalar_mode by
a single new mode, with the actual unit width controlled by EVEX.W.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
        (EXbScalar, EXwScalar): Fold to ...
        (EXbwUnit): ... this.
        (b_scalar_mode, w_scalar_mode): Fold to ...
        (bw_unit_mode): ... this.
        (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
        w_scalar_mode handling by bw_unit_mode one.
        * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
        ...
        * i386-dis-evex-prefix.h: ... here.

--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -723,13 +723,13 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3862_P_2) },
+    { "vpexpand%BW", { XM, EXbwUnit }, 0 },
   },
   /* PREFIX_EVEX_0F3863 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3863_P_2) },
+    { "vpcompress%BW",   { EXbwUnit, XM }, 0 },
   },
   /* PREFIX_EVEX_0F3864 */
   {
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -522,16 +522,6 @@
     { MOD_TABLE (MOD_EVEX_0F385B_P_2_W_0) },
     { MOD_TABLE (MOD_EVEX_0F385B_P_2_W_1) },
   },
-  /* EVEX_W_0F3862_P_2 */
-  {
-    { "vpexpandb", { XM, EXbScalar }, 0 },
-    { "vpexpandw", { XM, EXwScalar }, 0 },
-  },
-  /* EVEX_W_0F3863_P_2 */
-  {
-    { "vpcompressb",   { EXbScalar, XM }, 0 },
-    { "vpcompressw",   { EXwScalar, XM }, 0 },
-  },
   /* EVEX_W_0F3870_P_2 */
   {
     { Bad_Opcode },
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -358,9 +358,8 @@ fetch_data (struct disassemble_info *inf
 #define EMS { OP_EM, v_swap_mode }
 #define EMd { OP_EM, d_mode }
 #define EMx { OP_EM, x_mode }
-#define EXbScalar { OP_EX, b_scalar_mode }
+#define EXbwUnit { OP_EX, bw_unit_mode }
 #define EXw { OP_EX, w_mode }
-#define EXwScalar { OP_EX, w_scalar_mode }
 #define EXd { OP_EX, d_mode }
 #define EXdS { OP_EX, d_swap_mode }
 #define EXq { OP_EX, q_mode }
@@ -488,6 +487,8 @@ enum
   x_mode,
   /* Similar to x_mode, but with different EVEX mem shifts.  */
   evex_x_gscat_mode,
+  /* Similar to x_mode, but with yet different EVEX mem shifts.  */
+  bw_unit_mode,
   /* Similar to x_mode, but with disabled broadcast.  */
   evex_x_nobcst_mode,
   /* Similar to x_mode, but with operands swapped and disabled broadcast
@@ -579,10 +580,6 @@ enum
 
   /* scalar, ignore vector length.  */
   scalar_mode,
-  /* like b_mode, ignore vector length.  */
-  b_scalar_mode,
-  /* like w_mode, ignore vector length.  */
-  w_scalar_mode,
   /* like d_swap_mode, ignore vector length.  */
   d_scalar_swap_mode,
   /* like q_swap_mode, ignore vector length.  */
@@ -2183,8 +2180,6 @@ enum
   EVEX_W_0F3859_P_2,
   EVEX_W_0F385A_P_2,
   EVEX_W_0F385B_P_2,
-  EVEX_W_0F3862_P_2,
-  EVEX_W_0F3863_P_2,
   EVEX_W_0F3870_P_2,
   EVEX_W_0F3872_P_1,
   EVEX_W_0F3872_P_2,
@@ -14109,8 +14104,7 @@ intel_operand_size (int bytemode, int si
     case x_swap_mode:
     case evex_x_gscat_mode:
     case evex_x_nobcst_mode:
-    case b_scalar_mode:
-    case w_scalar_mode:
+    case bw_unit_mode:
       if (need_vex)
  {
   switch (vex.length)
@@ -14592,11 +14586,12 @@ OP_E_memory (int bytemode, int sizeflag)
  case d_scalar_swap_mode:
   shift = 2;
   break;
- case w_scalar_mode:
+ case bw_unit_mode:
+  shift = vex.w ? 1 : 0;
+  break;
  case xmm_mw_mode:
   shift = 1;
   break;
- case b_scalar_mode:
  case xmm_mb_mode:
   shift = 0;
   break;

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Re: [PATCH 09/19] x86: merge/move logic determining the EVEX disp8 shift

Jan Beulich-2
In reply to this post by Jan Beulich-2
Fold redundant case blocks and move the extra adjustments logic into
the single case block that actually needs it - there's no need to go
through the extra logic for all the other cases. Also utilize there that
vex.b cannot be set at this point, due to earlier logic. Reduce the
comment there, which was partly stale anyway.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
        dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
        d_scalar_swap_mode case handling. Move shift adjsutment into
        the case its applicable to.

--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -14517,15 +14517,22 @@ OP_E_memory (int bytemode, int sizeflag)
  {
  case dqw_mode:
  case dw_mode:
+ case xmm_mw_mode:
   shift = 1;
   break;
  case dqb_mode:
  case db_mode:
+ case xmm_mb_mode:
   shift = 0;
   break;
  case dq_mode:
   if (address_mode != mode_64bit)
     {
+ case dqd_mode:
+ case xmm_md_mode:
+ case d_mode:
+ case d_swap_mode:
+ case d_scalar_swap_mode:
       shift = 2;
       break;
     }
@@ -14566,6 +14573,15 @@ OP_E_memory (int bytemode, int sizeflag)
     default:
       abort ();
     }
+  /* Make necessary corrections to shift for modes that need it.  */
+  if (bytemode == xmmq_mode
+      || bytemode == evex_half_bcst_xmmq_mode
+      || (bytemode == ymmq_mode && vex.length == 128))
+    shift -= 1;
+  else if (bytemode == xmmqd_mode)
+    shift -= 2;
+  else if (bytemode == xmmdw_mode)
+    shift -= 3;
   break;
  case ymm_mode:
   shift = 5;
@@ -14579,41 +14595,12 @@ OP_E_memory (int bytemode, int sizeflag)
  case q_scalar_swap_mode:
   shift = 3;
   break;
- case dqd_mode:
- case xmm_md_mode:
- case d_mode:
- case d_swap_mode:
- case d_scalar_swap_mode:
-  shift = 2;
-  break;
  case bw_unit_mode:
   shift = vex.w ? 1 : 0;
   break;
- case xmm_mw_mode:
-  shift = 1;
-  break;
- case xmm_mb_mode:
-  shift = 0;
-  break;
  default:
   abort ();
  }
-      /* Make necessary corrections to shift for modes that need it.
- For these modes we currently have shift 4, 5 or 6 depending on
- vex.length (it corresponds to xmmword, ymmword or zmmword
- operand).  We might want to make it 3, 4 or 5 (e.g. for
- xmmq_mode).  In case of broadcast enabled the corrections
- aren't needed, as element size is always 32 or 64 bits.  */
-      if (!vex.b
-  && (bytemode == xmmq_mode
-      || bytemode == evex_half_bcst_xmmq_mode))
- shift -= 1;
-      else if (bytemode == xmmqd_mode)
- shift -= 2;
-      else if (bytemode == xmmdw_mode)
- shift -= 3;
-      else if (bytemode == ymmq_mode && vex.length == 128)
- shift -= 1;
     }
   else
     shift = 0;

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[PATCH 10/19] x86: replace %LW by %DQ

Jan Beulich-2
In reply to this post by Jan Beulich-2
This makes more visible what the two alternatives will be that result
from this macro.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (dis386): "LW" description now applies to "DQ".
        (putop): Handle "DQ". Don't handle "LW" anymore.
        (prefix_table, mod_table): Replace %LW by %DQ.
        * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.

--- a/opcodes/i386-dis-evex-len.h
+++ b/opcodes/i386-dis-evex-len.h
@@ -81,8 +81,8 @@ static const struct dis386 evex_len_tabl
   /* EVEX_LEN_0F3836_P_2 */
   {
     { Bad_Opcode },
-    { "vperm%LW", { XM, Vex, EXx }, 0 },
-    { "vperm%LW", { XM, Vex, EXx }, 0 },
+    { "vperm%DQ", { XM, Vex, EXx }, 0 },
+    { "vperm%DQ", { XM, Vex, EXx }, 0 },
   },
 
   /* EVEX_LEN_0F385A_P_2_W_0_M_0 */
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -180,13 +180,13 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpror%LW", { Vex, EXx, Ib }, 0 },
+    { "vpror%DQ", { Vex, EXx, Ib }, 0 },
   },
   /* PREFIX_EVEX_0F72_REG_1 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vprol%LW", { Vex, EXx, Ib }, 0 },
+    { "vprol%DQ", { Vex, EXx, Ib }, 0 },
   },
   /* PREFIX_EVEX_0F72_REG_2 */
   {
@@ -198,7 +198,7 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpsra%LW", { Vex, EXx, Ib }, 0 },
+    { "vpsra%DQ", { Vex, EXx, Ib }, 0 },
   },
   /* PREFIX_EVEX_0F72_REG_6 */
   {
@@ -318,19 +318,19 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpand%LW", { XM, Vex, EXx }, 0 },
+    { "vpand%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0FDF */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpandn%LW", { XM, Vex, EXx }, 0 },
+    { "vpandn%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0FE2 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpsra%LW", { XM, Vex, EXxmm }, 0 },
+    { "vpsra%DQ", { XM, Vex, EXxmm }, 0 },
   },
   /* PREFIX_EVEX_0FE6 */
   {
@@ -349,13 +349,13 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpor%LW", { XM, Vex, EXx }, 0 },
+    { "vpor%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0FEF */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpxor%LW", { XM, Vex, EXx }, 0 },
+    { "vpxor%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F380D */
   {
@@ -391,13 +391,13 @@
   {
     { Bad_Opcode },
     { VEX_W_TABLE (EVEX_W_0F3814_P_1) },
-    { "vprorv%LW", { XM, Vex, EXx }, 0 },
+    { "vprorv%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F3815 */
   {
     { Bad_Opcode },
     { VEX_W_TABLE (EVEX_W_0F3815_P_1) },
-    { "vprolv%LW", { XM, Vex, EXx }, 0 },
+    { "vprolv%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F3816 */
   {
@@ -480,8 +480,8 @@
   /* PREFIX_EVEX_0F3827 */
   {
     { Bad_Opcode },
-    { "vptestnm%LW", { XMask, Vex, EXx }, 0 },
-    { "vptestm%LW", { XMask, Vex, EXx }, 0 },
+    { "vptestnm%DQ", { XMask, Vex, EXx }, 0 },
+    { "vptestm%DQ", { XMask, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F3828 */
   {
@@ -564,14 +564,14 @@
   /* PREFIX_EVEX_0F3838 */
   {
     { Bad_Opcode },
-    { "vpmovm2%LW", { XM, MaskR }, 0 },
+    { "vpmovm2%DQ", { XM, MaskR }, 0 },
     { "vpminsb", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F3839 */
   {
     { Bad_Opcode },
-    { "vpmov%LW2m", { XMask, EXx }, 0 },
-    { "vpmins%LW", { XM, Vex, EXx }, 0 },
+    { "vpmov%DQ2m", { XMask, EXx }, 0 },
+    { "vpmins%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F383A */
   {
@@ -583,25 +583,25 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpminu%LW", { XM, Vex, EXx }, 0 },
+    { "vpminu%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F383D */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpmaxs%LW", { XM, Vex, EXx }, 0 },
+    { "vpmaxs%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F383F */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpmaxu%LW", { XM, Vex, EXx }, 0 },
+    { "vpmaxu%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F3840 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpmull%LW", { XM, Vex, EXx }, 0 },
+    { "vpmull%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F3842 */
   {
@@ -619,25 +619,25 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vplzcnt%LW", { XM, EXx }, 0 },
+    { "vplzcnt%DQ", { XM, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F3845 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpsrlv%LW", { XM, Vex, EXx }, 0 },
+    { "vpsrlv%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F3846 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpsrav%LW", { XM, Vex, EXx }, 0 },
+    { "vpsrav%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F3847 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpsllv%LW", { XM, Vex, EXx }, 0 },
+    { "vpsllv%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F384C */
   {
@@ -699,7 +699,7 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpopcnt%LW", { XM, EXx }, 0 },
+    { "vpopcnt%DQ", { XM, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F3859 */
   {
@@ -735,7 +735,7 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpblendm%LW", { XM, Vex, EXx }, 0 },
+    { "vpblendm%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F3865 */
   {
@@ -754,7 +754,7 @@
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vp2intersect%LW", { XMask, Vex, EXx, EXxEVexS }, 0 },
+    { "vp2intersect%DQ", { XMask, Vex, EXx, EXxEVexS }, 0 },
   },
   /* PREFIX_EVEX_0F3870 */
   {
@@ -766,7 +766,7 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpshldv%LW",  { XM, Vex, EXx }, 0 },
+    { "vpshldv%DQ",  { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F3872 */
   {
@@ -779,7 +779,7 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpshrdv%LW",  { XM, Vex, EXx }, 0 },
+    { "vpshrdv%DQ",  { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F3875 */
   {
@@ -791,7 +791,7 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpermi2%LW", { XM, Vex, EXx }, 0 },
+    { "vpermi2%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F3877 */
   {
@@ -827,7 +827,7 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpermt2%LW", { XM, Vex, EXx }, 0 },
+    { "vpermt2%DQ", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F387F */
   {
@@ -851,7 +851,7 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpexpand%LW", { XM, EXEvexXGscat }, 0 },
+    { "vpexpand%DQ", { XM, EXEvexXGscat }, 0 },
   },
   /* PREFIX_EVEX_0F388A */
   {
@@ -863,7 +863,7 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpcompress%LW", { EXEvexXGscat, XM }, 0 },
+    { "vpcompress%DQ", { EXEvexXGscat, XM }, 0 },
   },
   /* PREFIX_EVEX_0F388D */
   {
@@ -881,7 +881,7 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpgatherd%LW", { XM, MVexVSIBDWpX }, 0 },
+    { "vpgatherd%DQ", { XM, MVexVSIBDWpX }, 0 },
   },
   /* PREFIX_EVEX_0F3891 */
   {
@@ -919,7 +919,7 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpscatterd%LW", { MVexVSIBDWpX, XM }, 0 },
+    { "vpscatterd%DQ", { MVexVSIBDWpX, XM }, 0 },
   },
   /* PREFIX_EVEX_0F38A1 */
   {
@@ -969,7 +969,7 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpconflict%LW", { XM, EXx }, 0 },
+    { "vpconflict%DQ", { XM, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F38C6_REG_1 */
   {
@@ -1065,7 +1065,7 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "valign%LW", { XM, Vex, EXx, Ib }, 0 },
+    { "valign%DQ", { XM, Vex, EXx, Ib }, 0 },
   },
   /* PREFIX_EVEX_0F3A05 */
   {
@@ -1149,13 +1149,13 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpcmpu%LW", { XMask, Vex, EXx, VPCMP }, 0 },
+    { "vpcmpu%DQ", { XMask, Vex, EXx, VPCMP }, 0 },
   },
   /* PREFIX_EVEX_0F3A1F */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpcmp%LW", { XMask, Vex, EXx, VPCMP }, 0 },
+    { "vpcmp%DQ", { XMask, Vex, EXx, VPCMP }, 0 },
   },
   /* PREFIX_EVEX_0F3A20 */
   {
@@ -1185,7 +1185,7 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpternlog%LW", { XM, Vex, EXx, Ib }, 0 },
+    { "vpternlog%DQ", { XM, Vex, EXx, Ib }, 0 },
   },
   /* PREFIX_EVEX_0F3A26 */
   {
@@ -1305,7 +1305,7 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpshld%LW",   { XM, Vex, EXx, Ib }, 0 },
+    { "vpshld%DQ",   { XM, Vex, EXx, Ib }, 0 },
   },
   /* PREFIX_EVEX_0F3A72 */
   {
@@ -1317,5 +1317,5 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpshrd%LW",   { XM, Vex, EXx, Ib }, 0 },
+    { "vpshrd%DQ",   { XM, Vex, EXx, Ib }, 0 },
   },
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -2287,7 +2287,7 @@ struct dis386 {
    "LB" => print "abs" in 64bit mode and behave as 'B' otherwise
    "LS" => print "abs" in 64bit mode and behave as 'S' otherwise
    "LV" => print "abs" for 64bit operand and behave as 'S' otherwise
-   "LW" => print 'd', 'q' depending on the VEX.W bit
+   "DQ" => print 'd' or 'q' depending on the VEX.W bit
    "BW" => print 'b' or 'w' depending on the EVEX.W bit
    "LP" => print 'w' or 'l' ('d' in Intel mode) if instruction has
    an operand size prefix, or suffix_always is true.  print
@@ -5891,7 +5891,7 @@ static const struct dis386 prefix_table[
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpsrlv%LW", { XM, Vex, EXx }, 0 },
+    { "vpsrlv%DQ", { XM, Vex, EXx }, 0 },
   },
 
   /* PREFIX_VEX_0F3846 */
@@ -5905,7 +5905,7 @@ static const struct dis386 prefix_table[
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpsllv%LW", { XM, Vex, EXx }, 0 },
+    { "vpsllv%DQ", { XM, Vex, EXx }, 0 },
   },
 
   /* PREFIX_VEX_0F3849_X86_64 */
@@ -5992,14 +5992,14 @@ static const struct dis386 prefix_table[
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpgatherd%LW", { XM, MVexVSIBDWpX, Vex }, 0 },
+    { "vpgatherd%DQ", { XM, MVexVSIBDWpX, Vex }, 0 },
   },
 
   /* PREFIX_VEX_0F3891 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpgatherq%LW", { XMGatherQ, MVexVSIBQWpX, VexGatherQ }, 0 },
+    { "vpgatherq%DQ", { XMGatherQ, MVexVSIBQWpX, VexGatherQ }, 0 },
   },
 
   /* PREFIX_VEX_0F3892 */
@@ -11477,11 +11477,11 @@ static const struct dis386 mod_table[][2
   },
   {
     /* MOD_VEX_0F388C_PREFIX_2 */
-    { "vpmaskmov%LW", { XM, Vex, Mx }, 0 },
+    { "vpmaskmov%DQ", { XM, Vex, Mx }, 0 },
   },
   {
     /* MOD_VEX_0F388E_PREFIX_2 */
-    { "vpmaskmov%LW", { Mx, Vex, XM }, 0 },
+    { "vpmaskmov%DQ", { Mx, Vex, XM }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F3A30_P_2_LEN_0 */
@@ -13636,6 +13636,8 @@ putop (const char *in_template, int size
     }
  }
     }
+  else if (l == 1 && last[0] == 'D')
+    *obufp++ = vex.w ? 'q' : 'd';
   else if (l == 1 && last[0] == 'L')
     {
       if (cond ? modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)
@@ -13796,8 +13798,6 @@ putop (const char *in_template, int size
  abort ();
       if (last[0] == 'X')
  *obufp++ = vex.w ? 'd': 's';
-      else if (last[0] == 'L')
- *obufp++ = vex.w ? 'q': 'd';
       else if (last[0] == 'B')
  *obufp++ = vex.w ? 'w': 'b';
       else

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[PATCH 11/19] x86: drop Vex128 and Vex256

Jan Beulich-2
In reply to this post by Jan Beulich-2
These are only used when VEX.L or EVEX.L'L have already been decoded,
and hence the "normal" length dependent name determination is quite
fine. Adjust a few enumerators to make clear that vex_len_table[] has
been consulted; be consistent and do so for all *f128 and *i128 insns
in one go.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
        (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
        VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
        VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
        (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
        VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
        VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
        VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
        (vex_table): Replace Vex128 by Vex.
        (vex_len_table): Likewise. Adjust referenced enum names.
        (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
        referenced enum names.
        (OP_VEX): Drop vex128_mode and vex256_mode cases.
        * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.

--- a/opcodes/i386-dis-evex-len.h
+++ b/opcodes/i386-dis-evex-len.h
@@ -16,7 +16,7 @@ static const struct dis386 evex_len_tabl
 
   /* EVEX_LEN_0FC4_P_2 */
   {
-    { "vpinsrw", { XM, Vex128, Edqw, Ib }, 0 },
+    { "vpinsrw", { XM, Vex, Edqw, Ib }, 0 },
   },
 
   /* EVEX_LEN_0FC5_P_2 */
@@ -289,7 +289,7 @@ static const struct dis386 evex_len_tabl
 
   /* EVEX_LEN_0F3A20_P_2 */
   {
-    { "vpinsrb", { XM, Vex128, Edqb, Ib }, 0 },
+    { "vpinsrb", { XM, Vex, Edqb, Ib }, 0 },
   },
 
   /* EVEX_LEN_0F3A21_P_2_W_0 */
@@ -299,7 +299,7 @@ static const struct dis386 evex_len_tabl
 
   /* EVEX_LEN_0F3A22_P_2 */
   {
-    { "vpinsrK", { XM, Vex128, Edq, Ib }, 0 },
+    { "vpinsrK", { XM, Vex, Edq, Ib }, 0 },
   },
 
   /* EVEX_LEN_0F3A23_P_2_W_0 */
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -395,8 +395,6 @@ fetch_data (struct disassemble_info *inf
 #define VexW { OP_VexW, vex_mode }
 #define VexScalar { OP_VEX, vex_scalar_mode }
 #define VexGatherQ { OP_VEX, vex_vsib_q_w_dq_mode }
-#define Vex128 { OP_VEX, vex128_mode }
-#define Vex256 { OP_VEX, vex256_mode }
 #define VexGdq { OP_VEX, dq_mode }
 #define VexTmm { OP_VEX, tmm_mode }
 #define EXdVexScalarS { OP_EX_Vex, d_scalar_swap_mode }
@@ -562,10 +560,6 @@ enum
   dqd_mode,
   /* normal vex mode */
   vex_mode,
-  /* 128bit vex mode */
-  vex128_mode,
-  /* 256bit vex mode */
-  vex256_mode,
 
   /* Operand size depends on the VEX.W bit, with VSIB dword indices.  */
   vex_vsib_d_w_dq_mode,
@@ -1973,7 +1967,7 @@ enum
   VEX_W_0F3816_P_2,
   VEX_W_0F3818_P_2,
   VEX_W_0F3819_P_2,
-  VEX_W_0F381A_P_2_M_0,
+  VEX_W_0F381A_P_2_M_0_L_0,
   VEX_W_0F382C_P_2_M_0,
   VEX_W_0F382D_P_2_M_0,
   VEX_W_0F382E_P_2_M_0,
@@ -1988,7 +1982,7 @@ enum
   VEX_W_0F384B_X86_64_P_3,
   VEX_W_0F3858_P_2,
   VEX_W_0F3859_P_2,
-  VEX_W_0F385A_P_2_M_0,
+  VEX_W_0F385A_P_2_M_0_L_0,
   VEX_W_0F385C_X86_64_P_1,
   VEX_W_0F385E_X86_64_P_0,
   VEX_W_0F385E_X86_64_P_1,
@@ -2002,17 +1996,17 @@ enum
   VEX_W_0F3A02_P_2,
   VEX_W_0F3A04_P_2,
   VEX_W_0F3A05_P_2,
-  VEX_W_0F3A06_P_2,
-  VEX_W_0F3A18_P_2,
-  VEX_W_0F3A19_P_2,
+  VEX_W_0F3A06_P_2_L_0,
+  VEX_W_0F3A18_P_2_L_0,
+  VEX_W_0F3A19_P_2_L_0,
   VEX_W_0F3A1D_P_2,
   VEX_W_0F3A30_P_2_LEN_0,
   VEX_W_0F3A31_P_2_LEN_0,
   VEX_W_0F3A32_P_2_LEN_0,
   VEX_W_0F3A33_P_2_LEN_0,
-  VEX_W_0F3A38_P_2,
-  VEX_W_0F3A39_P_2,
-  VEX_W_0F3A46_P_2,
+  VEX_W_0F3A38_P_2_L_0,
+  VEX_W_0F3A39_P_2_L_0,
+  VEX_W_0F3A46_P_2_L_0,
   VEX_W_0F3A4A_P_2,
   VEX_W_0F3A4B_P_2,
   VEX_W_0F3A4C_P_2,
@@ -9344,12 +9338,12 @@ static const struct dis386 vex_table[][2
 static const struct dis386 vex_len_table[][2] = {
   /* VEX_LEN_0F12_P_0_M_0 / VEX_LEN_0F12_P_2_M_0 */
   {
-    { "vmovlpX", { XM, Vex128, EXq }, 0 },
+    { "vmovlpX", { XM, Vex, EXq }, 0 },
   },
 
   /* VEX_LEN_0F12_P_0_M_1 */
   {
-    { "vmovhlps", { XM, Vex128, EXq }, 0 },
+    { "vmovhlps", { XM, Vex, EXq }, 0 },
   },
 
   /* VEX_LEN_0F13_M_0 */
@@ -9359,12 +9353,12 @@ static const struct dis386 vex_len_table
 
   /* VEX_LEN_0F16_P_0_M_0 / VEX_LEN_0F16_P_2_M_0 */
   {
-    { "vmovhpX", { XM, Vex128, EXq }, 0 },
+    { "vmovhpX", { XM, Vex, EXq }, 0 },
   },
 
   /* VEX_LEN_0F16_P_0_M_1 */
   {
-    { "vmovlhps", { XM, Vex128, EXq }, 0 },
+    { "vmovlhps", { XM, Vex, EXq }, 0 },
   },
 
   /* VEX_LEN_0F17_M_0 */
@@ -9554,7 +9548,7 @@ static const struct dis386 vex_len_table
 
   /* VEX_LEN_0FC4_P_2 */
   {
-    { "vpinsrw", { XM, Vex128, Edqw, Ib }, 0 },
+    { "vpinsrw", { XM, Vex, Edqw, Ib }, 0 },
   },
 
   /* VEX_LEN_0FC5_P_2 */
@@ -9587,7 +9581,7 @@ static const struct dis386 vex_len_table
   /* VEX_LEN_0F381A_P_2_M_0 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F381A_P_2_M_0) },
+    { VEX_W_TABLE (VEX_W_0F381A_P_2_M_0_L_0) },
   },
 
   /* VEX_LEN_0F3836_P_2 */
@@ -9638,7 +9632,7 @@ static const struct dis386 vex_len_table
   /* VEX_LEN_0F385A_P_2_M_0 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F385A_P_2_M_0) },
+    { VEX_W_TABLE (VEX_W_0F385A_P_2_M_0_L_0) },
   },
 
   /* VEX_LEN_0F385C_X86_64_P_1_W_0_M_0 */
@@ -9746,7 +9740,7 @@ static const struct dis386 vex_len_table
   /* VEX_LEN_0F3A06_P_2 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A06_P_2) },
+    { VEX_W_TABLE (VEX_W_0F3A06_P_2_L_0) },
   },
 
   /* VEX_LEN_0F3A14_P_2 */
@@ -9772,28 +9766,28 @@ static const struct dis386 vex_len_table
   /* VEX_LEN_0F3A18_P_2 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A18_P_2) },
+    { VEX_W_TABLE (VEX_W_0F3A18_P_2_L_0) },
   },
 
   /* VEX_LEN_0F3A19_P_2 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A19_P_2) },
+    { VEX_W_TABLE (VEX_W_0F3A19_P_2_L_0) },
   },
 
   /* VEX_LEN_0F3A20_P_2 */
   {
-    { "vpinsrb", { XM, Vex128, Edqb, Ib }, 0 },
+    { "vpinsrb", { XM, Vex, Edqb, Ib }, 0 },
   },
 
   /* VEX_LEN_0F3A21_P_2 */
   {
-    { "vinsertps", { XM, Vex128, EXd, Ib }, 0 },
+    { "vinsertps", { XM, Vex, EXd, Ib }, 0 },
   },
 
   /* VEX_LEN_0F3A22_P_2 */
   {
-    { "vpinsrK", { XM, Vex128, Edq, Ib }, 0 },
+    { "vpinsrK", { XM, Vex, Edq, Ib }, 0 },
   },
 
   /* VEX_LEN_0F3A30_P_2 */
@@ -9819,24 +9813,24 @@ static const struct dis386 vex_len_table
   /* VEX_LEN_0F3A38_P_2 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A38_P_2) },
+    { VEX_W_TABLE (VEX_W_0F3A38_P_2_L_0) },
   },
 
   /* VEX_LEN_0F3A39_P_2 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A39_P_2) },
+    { VEX_W_TABLE (VEX_W_0F3A39_P_2_L_0) },
   },
 
   /* VEX_LEN_0F3A41_P_2 */
   {
-    { "vdppd", { XM, Vex128, EXx, Ib }, 0 },
+    { "vdppd", { XM, Vex, EXx, Ib }, 0 },
   },
 
   /* VEX_LEN_0F3A46_P_2 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A46_P_2) },
+    { VEX_W_TABLE (VEX_W_0F3A46_P_2_L_0) },
   },
 
   /* VEX_LEN_0F3A60_P_2 */
@@ -10331,7 +10325,7 @@ static const struct dis386 vex_w_table[]
     { "vbroadcastsd", { XM, EXxmm_mq }, 0 },
   },
   {
-    /* VEX_W_0F381A_P_2_M_0 */
+    /* VEX_W_0F381A_P_2_M_0_L_0 */
     { "vbroadcastf128", { XM, Mxmm }, 0 },
   },
   {
@@ -10391,7 +10385,7 @@ static const struct dis386 vex_w_table[]
     { "vpbroadcastq", { XM, EXxmm_mq }, 0 },
   },
   {
-    /* VEX_W_0F385A_P_2_M_0 */
+    /* VEX_W_0F385A_P_2_M_0_L_0 */
     { "vbroadcasti128", { XM, Mxmm }, 0 },
   },
   {
@@ -10449,15 +10443,15 @@ static const struct dis386 vex_w_table[]
     { "vpermilpd", { XM, EXx, Ib }, 0 },
   },
   {
-    /* VEX_W_0F3A06_P_2 */
-    { "vperm2f128", { XM, Vex256, EXx, Ib }, 0 },
+    /* VEX_W_0F3A06_P_2_L_0 */
+    { "vperm2f128", { XM, Vex, EXx, Ib }, 0 },
   },
   {
-    /* VEX_W_0F3A18_P_2 */
-    { "vinsertf128", { XM, Vex256, EXxmm, Ib }, 0 },
+    /* VEX_W_0F3A18_P_2_L_0 */
+    { "vinsertf128", { XM, Vex, EXxmm, Ib }, 0 },
   },
   {
-    /* VEX_W_0F3A19_P_2 */
+    /* VEX_W_0F3A19_P_2_L_0 */
     { "vextractf128", { EXxmm, XM, Ib }, 0 },
   },
   {
@@ -10485,16 +10479,16 @@ static const struct dis386 vex_w_table[]
     { MOD_TABLE (MOD_VEX_W_1_0F3A33_P_2_LEN_0) },
   },
   {
-    /* VEX_W_0F3A38_P_2 */
-    { "vinserti128", { XM, Vex256, EXxmm, Ib }, 0 },
+    /* VEX_W_0F3A38_P_2_L_0 */
+    { "vinserti128", { XM, Vex, EXxmm, Ib }, 0 },
   },
   {
-    /* VEX_W_0F3A39_P_2 */
+    /* VEX_W_0F3A39_P_2_L_0 */
     { "vextracti128", { EXxmm, XM, Ib }, 0 },
   },
   {
-    /* VEX_W_0F3A46_P_2 */
-    { "vperm2i128", { XM, Vex256, EXx, Ib }, 0 },
+    /* VEX_W_0F3A46_P_2_L_0 */
+    { "vperm2i128", { XM, Vex, EXx, Ib }, 0 },
   },
   {
     /* VEX_W_0F3A4A_P_2 */
@@ -10584,35 +10578,35 @@ static const struct dis386 vex_w_table[]
   },
   /* VEX_W_0FXOP_08_CC_L_0 */
   {
-     { "vpcomb", { XM, Vex128, EXx, VPCOM }, 0 },
+     { "vpcomb", { XM, Vex, EXx, VPCOM }, 0 },
   },
   /* VEX_W_0FXOP_08_CD_L_0 */
   {
-     { "vpcomw", { XM, Vex128, EXx, VPCOM }, 0 },
+     { "vpcomw", { XM, Vex, EXx, VPCOM }, 0 },
   },
   /* VEX_W_0FXOP_08_CE_L_0 */
   {
-     { "vpcomd", { XM, Vex128, EXx, VPCOM }, 0 },
+     { "vpcomd", { XM, Vex, EXx, VPCOM }, 0 },
   },
   /* VEX_W_0FXOP_08_CF_L_0 */
   {
-     { "vpcomq", { XM, Vex128, EXx, VPCOM }, 0 },
+     { "vpcomq", { XM, Vex, EXx, VPCOM }, 0 },
   },
   /* VEX_W_0FXOP_08_EC_L_0 */
   {
-     { "vpcomub", { XM, Vex128, EXx, VPCOM }, 0 },
+     { "vpcomub", { XM, Vex, EXx, VPCOM }, 0 },
   },
   /* VEX_W_0FXOP_08_ED_L_0 */
   {
-     { "vpcomuw", { XM, Vex128, EXx, VPCOM }, 0 },
+     { "vpcomuw", { XM, Vex, EXx, VPCOM }, 0 },
   },
   /* VEX_W_0FXOP_08_EE_L_0 */
   {
-     { "vpcomud", { XM, Vex128, EXx, VPCOM }, 0 },
+     { "vpcomud", { XM, Vex, EXx, VPCOM }, 0 },
   },
   /* VEX_W_0FXOP_08_EF_L_0 */
   {
-     { "vpcomuq", { XM, Vex128, EXx, VPCOM }, 0 },
+     { "vpcomuq", { XM, Vex, EXx, VPCOM }, 0 },
   },
   /* VEX_W_0FXOP_09_80 */
   {
@@ -16465,7 +16459,6 @@ OP_VEX (int bytemode, int sizeflag ATTRI
       switch (bytemode)
  {
  case vex_mode:
- case vex128_mode:
  case vex_vsib_q_w_dq_mode:
  case vex_vsib_q_w_d_mode:
   names = names_xmm;
@@ -16494,7 +16487,6 @@ OP_VEX (int bytemode, int sizeflag ATTRI
       switch (bytemode)
  {
  case vex_mode:
- case vex256_mode:
   names = names_ymm;
   break;
  case vex_vsib_q_w_dq_mode:

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[PATCH 12/19] x86: drop need_vex_reg

Jan Beulich-2
In reply to this post by Jan Beulich-2
It was quite odd for the prior operand handling to have to clear this
flag for the actual operand handling to print nothing. Have the actual
operand handling determine whether the operand is actually present.
With this {d,q}_scalar_swap_mode become unused and hence also get dropped.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (OP_VexR, VexScalarR): New.
        (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
        XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
        need_vex_reg): Delete.
        (prefix_table): Replace VexScalar by VexScalarR and
        XMVexScalar by XMScalar for vmovss and vmovsd. Replace
        EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
        (vex_len_table): Replace EXqVexScalarS by EXqS.
        (get_valid_dis386): Don't set need_vex_reg.
        (print_insn): Don't initialize need_vex_reg.
        (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
        q_scalar_swap_mode cases.
        (OP_EX): Don't check for d_scalar_swap_mode and
        q_scalar_swap_mode.
        (OP_VEX): Done check need_vex_reg.
        * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
        XMVexScalar by XMScalar for vmovss and vmovsd. Replace
        EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.

--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -1,20 +1,20 @@
   /* EVEX_W_0F10_P_1 */
   {
-    { "vmovss", { XMVexScalar, VexScalar, EXxmm_md }, 0 },
+    { "vmovss", { XMScalar, VexScalarR, EXxmm_md }, 0 },
   },
   /* EVEX_W_0F10_P_3 */
   {
     { Bad_Opcode },
-    { "vmovsd", { XMVexScalar, VexScalar, EXxmm_mq }, 0 },
+    { "vmovsd", { XMScalar, VexScalarR, EXxmm_mq }, 0 },
   },
   /* EVEX_W_0F11_P_1 */
   {
-    { "vmovss", { EXdVexScalarS, VexScalar, XMScalar }, 0 },
+    { "vmovss", { EXdS, VexScalarR, XMScalar }, 0 },
   },
   /* EVEX_W_0F11_P_3 */
   {
     { Bad_Opcode },
-    { "vmovsd", { EXqVexScalarS, VexScalar, XMScalar }, 0 },
+    { "vmovsd", { EXqS, VexScalarR, XMScalar }, 0 },
   },
   /* EVEX_W_0F12_P_0_M_1 */
   {
@@ -294,7 +294,7 @@
   /* EVEX_W_0FD6_P_2 */
   {
     { Bad_Opcode },
-    { "vmovq", { EXqVexScalarS, XMScalar }, 0 },
+    { "vmovq", { EXqS, XMScalar }, 0 },
   },
   /* EVEX_W_0FE6_P_1 */
   {
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -88,9 +88,8 @@ static void OP_MS (int, int);
 static void OP_XS (int, int);
 static void OP_M (int, int);
 static void OP_VEX (int, int);
+static void OP_VexR (int, int);
 static void OP_VexW (int, int);
-static void OP_EX_Vex (int, int);
-static void OP_XMM_Vex (int, int);
 static void OP_Rounding (int, int);
 static void OP_REG_VexI4 (int, int);
 static void OP_VexI4 (int, int);
@@ -394,12 +393,10 @@ fetch_data (struct disassemble_info *inf
 #define Vex { OP_VEX, vex_mode }
 #define VexW { OP_VexW, vex_mode }
 #define VexScalar { OP_VEX, vex_scalar_mode }
+#define VexScalarR { OP_VexR, vex_scalar_mode }
 #define VexGatherQ { OP_VEX, vex_vsib_q_w_dq_mode }
 #define VexGdq { OP_VEX, dq_mode }
 #define VexTmm { OP_VEX, tmm_mode }
-#define EXdVexScalarS { OP_EX_Vex, d_scalar_swap_mode }
-#define EXqVexScalarS { OP_EX_Vex, q_scalar_swap_mode }
-#define XMVexScalar { OP_XMM_Vex, scalar_mode }
 #define XMVexI4 { OP_REG_VexI4, x_mode }
 #define XMVexScalarI4 { OP_REG_VexI4, scalar_mode }
 #define VexI4 { OP_VexI4, 0 }
@@ -574,10 +571,6 @@ enum
 
   /* scalar, ignore vector length.  */
   scalar_mode,
-  /* like d_swap_mode, ignore vector length.  */
-  d_scalar_swap_mode,
-  /* like q_swap_mode, ignore vector length.  */
-  q_scalar_swap_mode,
   /* like vex_mode, ignore vector length.  */
   vex_scalar_mode,
   /* Operand size depends on the VEX.W bit, ignore vector length.  */
@@ -2975,7 +2968,6 @@ static struct
   }
 vex;
 static unsigned char need_vex;
-static unsigned char need_vex_reg;
 
 struct op
   {
@@ -4633,17 +4625,17 @@ static const struct dis386 prefix_table[
   /* PREFIX_VEX_0F10 */
   {
     { "vmovups", { XM, EXx }, 0 },
-    { "vmovss", { XMVexScalar, VexScalar, EXxmm_md }, 0 },
+    { "vmovss", { XMScalar, VexScalarR, EXxmm_md }, 0 },
     { "vmovupd", { XM, EXx }, 0 },
-    { "vmovsd", { XMVexScalar, VexScalar, EXxmm_mq }, 0 },
+    { "vmovsd", { XMScalar, VexScalarR, EXxmm_mq }, 0 },
   },
 
   /* PREFIX_VEX_0F11 */
   {
     { "vmovups", { EXxS, XM }, 0 },
-    { "vmovss", { EXdVexScalarS, VexScalar, XMScalar }, 0 },
+    { "vmovss", { EXdS, VexScalarR, XMScalar }, 0 },
     { "vmovupd", { EXxS, XM }, 0 },
-    { "vmovsd", { EXqVexScalarS, VexScalar, XMScalar }, 0 },
+    { "vmovsd", { EXqS, VexScalarR, XMScalar }, 0 },
   },
 
   /* PREFIX_VEX_0F12 */
@@ -9558,7 +9550,7 @@ static const struct dis386 vex_len_table
 
   /* VEX_LEN_0FD6_P_2 */
   {
-    { "vmovq", { EXqVexScalarS, XMScalar }, 0 },
+    { "vmovq", { EXqS, XMScalar }, 0 },
   },
 
   /* VEX_LEN_0FF7_P_2 */
@@ -12146,7 +12138,6 @@ get_valid_dis386 (const struct dis386 *d
   break;
  }
       need_vex = 1;
-      need_vex_reg = 1;
       codep++;
       vindex = *codep++;
       dp = &xop_table[vex_table_index][vindex];
@@ -12213,7 +12204,6 @@ get_valid_dis386 (const struct dis386 *d
   break;
  }
       need_vex = 1;
-      need_vex_reg = 1;
       codep++;
       vindex = *codep++;
       dp = &vex_table[vex_table_index][vindex];
@@ -12252,7 +12242,6 @@ get_valid_dis386 (const struct dis386 *d
   break;
  }
       need_vex = 1;
-      need_vex_reg = 1;
       codep++;
       vindex = *codep++;
       dp = &vex_table[dp->op[1].bytemode][vindex];
@@ -12344,7 +12333,6 @@ get_valid_dis386 (const struct dis386 *d
  }
 
       need_vex = 1;
-      need_vex_reg = 1;
       codep++;
       vindex = *codep++;
       dp = &evex_table[vex_table_index][vindex];
@@ -12669,7 +12657,6 @@ print_insn (bfd_vma pc, disassemble_info
     }
 
   need_vex = 0;
-  need_vex_reg = 0;
   memset (&vex, 0, sizeof (vex));
 
   if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
@@ -14068,13 +14055,11 @@ intel_operand_size (int bytemode, int si
       used_prefixes |= (prefixes & PREFIX_DATA);
       break;
     case d_mode:
-    case d_scalar_swap_mode:
     case d_swap_mode:
     case dqd_mode:
       oappend ("DWORD PTR ");
       break;
     case q_mode:
-    case q_scalar_swap_mode:
     case q_swap_mode:
       oappend ("QWORD PTR ");
       break;
@@ -14526,7 +14511,6 @@ OP_E_memory (int bytemode, int sizeflag)
  case xmm_md_mode:
  case d_mode:
  case d_swap_mode:
- case d_scalar_swap_mode:
       shift = 2;
       break;
     }
@@ -14586,7 +14570,6 @@ OP_E_memory (int bytemode, int sizeflag)
  case xmm_mq_mode:
  case q_mode:
  case q_swap_mode:
- case q_scalar_swap_mode:
   shift = 3;
   break;
  case bw_unit_mode:
@@ -15860,9 +15843,7 @@ OP_EX (int bytemode, int sizeflag)
   if ((sizeflag & SUFFIX_ALWAYS)
       && (bytemode == x_swap_mode
   || bytemode == d_swap_mode
-  || bytemode == d_scalar_swap_mode
-  || bytemode == q_swap_mode
-  || bytemode == q_scalar_swap_mode))
+  || bytemode == q_swap_mode))
     swap_operand ();
 
   if (need_vex
@@ -15877,8 +15858,6 @@ OP_EX (int bytemode, int sizeflag)
       && bytemode != evex_half_bcst_xmmq_mode
       && bytemode != ymm_mode
       && bytemode != tmm_mode
-      && bytemode != d_scalar_swap_mode
-      && bytemode != q_scalar_swap_mode
       && bytemode != vex_scalar_w_dq_mode)
     {
       switch (vex.length)
@@ -16409,9 +16388,6 @@ OP_VEX (int bytemode, int sizeflag ATTRI
   if (!need_vex)
     abort ();
 
-  if (!need_vex_reg)
-    return;
-
   reg = vex.register_specifier;
   vex.register_specifier = 0;
   if (address_mode != mode_64bit)
@@ -16519,6 +16495,13 @@ OP_VEX (int bytemode, int sizeflag ATTRI
 }
 
 static void
+OP_VexR (int bytemode, int sizeflag)
+{
+  if (modrm.mod == 3)
+    OP_VEX (bytemode, sizeflag);
+}
+
+static void
 OP_VexW (int bytemode, int sizeflag)
 {
   OP_VEX (bytemode, sizeflag);
@@ -16572,22 +16555,6 @@ OP_VexI4 (int bytemode ATTRIBUTE_UNUSED,
 }
 
 static void
-OP_EX_Vex (int bytemode, int sizeflag)
-{
-  if (modrm.mod != 3)
-    need_vex_reg = 0;
-  OP_EX (bytemode, sizeflag);
-}
-
-static void
-OP_XMM_Vex (int bytemode, int sizeflag)
-{
-  if (modrm.mod != 3)
-    need_vex_reg = 0;
-  OP_XMM (bytemode, sizeflag);
-}
-
-static void
 VPCMP_Fixup (int bytemode ATTRIBUTE_UNUSED,
      int sizeflag ATTRIBUTE_UNUSED)
 {

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[PATCH 13/19] x86: drop further EVEX table entries that can be served by VEX ones

Jan Beulich-2
In reply to this post by Jan Beulich-2
A few cases were missed by 6df22cf64c93 ("x86: drop EVEX table entries
that can be served by VEX ones").

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
        PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
        (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
        vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
        Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
        the latter two.
        * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
        0F2C, 0F2D, 0F2E, and 0F2F.
        * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
        0F2F table entries.

--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -32,32 +32,6 @@
     { Bad_Opcode },
     { VEX_W_TABLE (EVEX_W_0F2A_P_3) },
   },
-  /* PREFIX_EVEX_0F2C */
-  {
-    { Bad_Opcode },
-    { "vcvttss2si", { Gdq, EXxmm_md, EXxEVexS }, 0 },
-    { Bad_Opcode },
-    { "vcvttsd2si", { Gdq, EXxmm_mq, EXxEVexS }, 0 },
-  },
-  /* PREFIX_EVEX_0F2D */
-  {
-    { Bad_Opcode },
-    { "vcvtss2si", { Gdq, EXxmm_md, EXxEVexR }, 0 },
-    { Bad_Opcode },
-    { "vcvtsd2si", { Gdq, EXxmm_mq, EXxEVexR }, 0 },
-  },
-  /* PREFIX_EVEX_0F2E */
-  {
-    { "vucomisX", { XMScalar, EXxmm_md, EXxEVexS }, PREFIX_OPCODE },
-    { Bad_Opcode },
-    { "vucomisX", { XMScalar, EXxmm_mq, EXxEVexS }, PREFIX_OPCODE },
-  },
-  /* PREFIX_EVEX_0F2F */
-  {
-    { "vcomisX", { XMScalar, EXxmm_md, EXxEVexS }, PREFIX_OPCODE },
-    { Bad_Opcode },
-    { "vcomisX", { XMScalar, EXxmm_mq, EXxEVexS }, PREFIX_OPCODE },
-  },
   /* PREFIX_EVEX_0F51 */
   {
     { "vsqrtpX", { XM, EXx, EXxEVexR }, PREFIX_OPCODE },
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -51,10 +51,10 @@ static const struct dis386 evex_table[][
     { "vmovapX", { EXxS, XM }, PREFIX_OPCODE },
     { PREFIX_TABLE (PREFIX_EVEX_0F2A) },
     { MOD_TABLE (MOD_EVEX_0F2B) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F2C) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F2D) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F2E) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F2F) },
+    { PREFIX_TABLE (PREFIX_VEX_0F2C) },
+    { PREFIX_TABLE (PREFIX_VEX_0F2D) },
+    { PREFIX_TABLE (PREFIX_VEX_0F2E) },
+    { PREFIX_TABLE (PREFIX_VEX_0F2F) },
     /* 30 */
     { Bad_Opcode },
     { Bad_Opcode },
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1411,10 +1411,6 @@ enum
   PREFIX_EVEX_0F12,
   PREFIX_EVEX_0F16,
   PREFIX_EVEX_0F2A,
-  PREFIX_EVEX_0F2C,
-  PREFIX_EVEX_0F2D,
-  PREFIX_EVEX_0F2E,
-  PREFIX_EVEX_0F2F,
   PREFIX_EVEX_0F51,
   PREFIX_EVEX_0F58,
   PREFIX_EVEX_0F59,
@@ -4664,31 +4660,31 @@ static const struct dis386 prefix_table[
   /* PREFIX_VEX_0F2C */
   {
     { Bad_Opcode },
-    { "vcvttss2si", { Gdq, EXxmm_md }, 0 },
+    { "vcvttss2si", { Gdq, EXxmm_md, EXxEVexS }, 0 },
     { Bad_Opcode },
-    { "vcvttsd2si", { Gdq, EXxmm_mq }, 0 },
+    { "vcvttsd2si", { Gdq, EXxmm_mq, EXxEVexS }, 0 },
   },
 
   /* PREFIX_VEX_0F2D */
   {
     { Bad_Opcode },
-    { "vcvtss2si", { Gdq, EXxmm_md }, 0 },
+    { "vcvtss2si", { Gdq, EXxmm_md, EXxEVexR }, 0 },
     { Bad_Opcode },
-    { "vcvtsd2si", { Gdq, EXxmm_mq }, 0 },
+    { "vcvtsd2si", { Gdq, EXxmm_mq, EXxEVexR }, 0 },
   },
 
   /* PREFIX_VEX_0F2E */
   {
-    { "vucomiss", { XMScalar, EXxmm_md }, 0 },
+    { "vucomisX", { XMScalar, EXxmm_md, EXxEVexS }, PREFIX_OPCODE },
     { Bad_Opcode },
-    { "vucomisd", { XMScalar, EXxmm_mq }, 0 },
+    { "vucomisX", { XMScalar, EXxmm_mq, EXxEVexS }, PREFIX_OPCODE },
   },
 
   /* PREFIX_VEX_0F2F */
   {
-    { "vcomiss", { XMScalar, EXxmm_md }, 0 },
+    { "vcomisX", { XMScalar, EXxmm_md, EXxEVexS }, PREFIX_OPCODE },
     { Bad_Opcode },
-    { "vcomisd", { XMScalar, EXxmm_mq }, 0 },
+    { "vcomisX", { XMScalar, EXxmm_mq, EXxEVexS }, PREFIX_OPCODE },
   },
 
   /* PREFIX_VEX_0F41 */

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[PATCH 14/19] x86: simplify decode of opcodes valid with (embedded) 66 prefix only

Jan Beulich-2
In reply to this post by Jan Beulich-2
The only valid (embedded or explicit) prefix being the data size one
(which is a fairly common pattern), avoid going through prefix_table[].
Instead extend the "required prefix" logic to also handle PREFIX_DATA
alone in a table entry, now used to identify this case. This requires
moving the (adjusted) ->prefix_requirement logic ahead of the printing
of stray prefixes, as the latter needs to observe the new setting of
PREFIX_DATA in used_prefixes.

Also add PREFIX_OPCODE on related entries when previously there was
mistakenly no decode step through prefix_table[].

gas/
2020-07-XX  Jan Beulich  <[hidden email]>

        * testsuite/gas/i386/prefix.d: Adjust expectations.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
        PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
        PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
        PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
        PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
        PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
        PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
        PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
        PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
        PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
        PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
        PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
        PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
        PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
        PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
        PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
        PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
        PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
        PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
        PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
        PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
        PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
        PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
        PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
        PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
        PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
        PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
        PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
        PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
        PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
        PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
        PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
        PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
        PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
        PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
        PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
        PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
        PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
        PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
        PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
        PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
        PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
        PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
        PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
        PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
        PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
        PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
        PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
        PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
        PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
        PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
        PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
        PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
        PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
        PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
        PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
        PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
        PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
        PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
        PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
        PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
        PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
        PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
        PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
        PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
        PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
        PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
        PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
        PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
        PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
        PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
        PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
        PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
        PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
        PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
        PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
        PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
        PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
        PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
        PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
        PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
        PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
        PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
        PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
        PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
        PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
        PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
        PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
        PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
        PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
        PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
        PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
        PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
        PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
        PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
        PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
        PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
        PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
        PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
        PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
        PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
        PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
        PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
        PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
        PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
        PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
        PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
        PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
        PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
        PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
        PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
        PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
        PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
        PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
        PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
        PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
        PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
        PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
        PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
        PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
        PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
        PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
        PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
        PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
        PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
        PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
        PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
        PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
        PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
        PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
        PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
        PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
        PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
        PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
        PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
        PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
        PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
        PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
        PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
        PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
        PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
        PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
        PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
        PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
        PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
        PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
        PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
        PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
        PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
        PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
        PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
        PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
        PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
        PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
        PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
        PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
        PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
        (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
        MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
        MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
        MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
        MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
        MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
        MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
        MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
        MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
        MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
        MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
        MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
        MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
        MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
        MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
        VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
        VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
        VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
        VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
        VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
        VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
        VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
        VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
        VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
        VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
        VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
        VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
        VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
        EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
        EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
        EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
        EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
        EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
        EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
        EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
        EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
        EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
        EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
        EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
        EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
        EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
        EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
        EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
        EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
        EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
        EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
        EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
        EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
        EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
        EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
        EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
        EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
        EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
        EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
        EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
        VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
        VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
        VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
        VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
        VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
        VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
        VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
        VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
        VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
        VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
        VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
        VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
        VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
        VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
        VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
        VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
        VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
        VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
        EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
        EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
        EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
        EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
        EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
        EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
        EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
        EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
        EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
        EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
        EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
        EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
        EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
        EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
        EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
        EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
        EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
        EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
        EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
        EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
        EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
        EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
        EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
        EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
        EVEX_W_0F3A72_P_2): Rename to ...
        (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
        MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
        MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
        MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
        MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
        MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
        MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
        MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
        MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
        MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
        MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
        VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
        VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
        VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
        VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
        VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
        VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
        VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
        VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
        VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
        EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
        EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
        EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
        EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
        EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
        EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
        EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
        EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
        EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
        EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
        EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
        EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
        EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
        EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
        EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
        EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
        EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
        EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
        EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
        EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
        EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
        EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
        EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
        EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
        EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
        VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
        VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
        VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
        VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
        VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
        VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
        VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
        VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
        VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
        VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
        VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
        VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
        VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
        EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
        EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
        EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
        EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
        EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
        EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
        EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
        EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
        EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
        EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
        EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
        EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
        EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
        EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
  respectively.
        (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
        vex_w_table, mod_table): Replace / remove respective entries.
        (print_insn): Move up dp->prefix_requirement handling. Handle
        PREFIX_DATA.
        * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
        i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
        Replace / remove respective entries.

--- a/gas/testsuite/gas/i386/prefix.d
+++ b/gas/testsuite/gas/i386/prefix.d
@@ -14,9 +14,9 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 26 9b                 es fwait
 [ ]*[a-f0-9]+: 9b                   fwait
 [ ]*[a-f0-9]+: 65 c7 05 00 00 00 00 00 00 00 00 movl   \$0x0,%gs:0x0
-[ ]*[a-f0-9]+: 66 f2 0f 38 17       data16 \(bad\)
-[ ]*[a-f0-9]+: f2 66 0f 54           repnz \(bad\)
-[ ]*[a-f0-9]+: f2 0f 54             repnz \(bad\)
+[ ]*[a-f0-9]+: 66 f2 0f 38 17       \(bad\)
+[ ]*[a-f0-9]+: f2 66 0f 54           \(bad\)
+[ ]*[a-f0-9]+: f2 0f 54             \(bad\)
 [ ]*[a-f0-9]+: f2 66 0f 11 22       data16 movsd %xmm4,\(%edx\)
 [ ]*[a-f0-9]+: f2 67 66 0f 11 22     data16 movsd %xmm4,\(%bp,%si\)
 [ ]*[a-f0-9]+: f2 67 f0 66 0f 11 22 lock data16 movsd %xmm4,\(%bp,%si\)
@@ -72,7 +72,7 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 90                   nop
 [ ]*[a-f0-9]+: f2 0f c7             \(bad\)  
 [ ]*[a-f0-9]+: f0 90                 lock nop
-[ ]*[a-f0-9]+: f3 0f 28             repz \(bad\) *
+[ ]*[a-f0-9]+: f3 0f 28             \(bad\) *
 [ ]*[a-f0-9]+: ff cc                 dec    %esp
 [ ]*[a-f0-9]+: c5 fa 28             \(bad\) *
 [ ]*[a-f0-9]+: ff cc                 dec    %esp
--- a/opcodes/i386-dis-evex-len.h
+++ b/opcodes/i386-dis-evex-len.h
@@ -1,7 +1,7 @@
 static const struct dis386 evex_len_table[][3] = {
-  /* EVEX_LEN_0F6E_P_2 */
+  /* EVEX_LEN_0F6E */
   {
-    { "vmovK", { XMScalar, Edq }, 0 },
+    { "vmovK", { XMScalar, Edq }, PREFIX_DATA },
   },
 
   /* EVEX_LEN_0F7E_P_1 */
@@ -14,61 +14,61 @@ static const struct dis386 evex_len_tabl
     { "vmovK", { Edq, XMScalar }, 0 },
   },
 
-  /* EVEX_LEN_0FC4_P_2 */
+  /* EVEX_LEN_0FC4 */
   {
-    { "vpinsrw", { XM, Vex, Edqw, Ib }, 0 },
+    { "vpinsrw", { XM, Vex, Edqw, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0FC5_P_2 */
+  /* EVEX_LEN_0FC5 */
   {
-    { "vpextrw", { Gdq, XS, Ib }, 0 },
+    { "vpextrw", { Gdq, XS, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0FD6_P_2 */
+  /* EVEX_LEN_0FD6 */
   {
-    { VEX_W_TABLE (EVEX_W_0FD6_P_2) },
+    { VEX_W_TABLE (EVEX_W_0FD6_L_0) },
   },
 
-  /* EVEX_LEN_0F3816_P_2 */
+  /* EVEX_LEN_0F3816 */
   {
     { Bad_Opcode },
-    { "vpermp%XW", { XM, Vex, EXx }, 0 },
-    { "vpermp%XW", { XM, Vex, EXx }, 0 },
+    { "vpermp%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpermp%XW", { XM, Vex, EXx }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3819_P_2_W_0 */
+  /* EVEX_LEN_0F3819_W_0 */
   {
     { Bad_Opcode },
-    { "vbroadcastf32x2", { XM, EXxmm_mq }, 0 },
-    { "vbroadcastf32x2", { XM, EXxmm_mq }, 0 },
+    { "vbroadcastf32x2", { XM, EXxmm_mq }, PREFIX_DATA },
+    { "vbroadcastf32x2", { XM, EXxmm_mq }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3819_P_2_W_1 */
+  /* EVEX_LEN_0F3819_W_1 */
   {
     { Bad_Opcode },
-    { "vbroadcastsd", { XM, EXxmm_mq }, 0 },
-    { "vbroadcastsd", { XM, EXxmm_mq }, 0 },
+    { "vbroadcastsd", { XM, EXxmm_mq }, PREFIX_DATA },
+    { "vbroadcastsd", { XM, EXxmm_mq }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F381A_P_2_W_0_M_0 */
+  /* EVEX_LEN_0F381A_W_0_M_0 */
   {
     { Bad_Opcode },
-    { "vbroadcastf32x4", { XM, EXxmm }, 0 },
-    { "vbroadcastf32x4", { XM, EXxmm }, 0 },
+    { "vbroadcastf32x4", { XM, EXxmm }, PREFIX_DATA },
+    { "vbroadcastf32x4", { XM, EXxmm }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F381A_P_2_W_1_M_0 */
+  /* EVEX_LEN_0F381A_W_1_M_0 */
   {
     { Bad_Opcode },
-    { "vbroadcastf64x2", { XM, EXxmm }, 0 },
-    { "vbroadcastf64x2", { XM, EXxmm }, 0 },
+    { "vbroadcastf64x2", { XM, EXxmm }, PREFIX_DATA },
+    { "vbroadcastf64x2", { XM, EXxmm }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F381B_P_2_W_0_M_0 */
+  /* EVEX_LEN_0F381B_W_0_M_0 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vbroadcastf32x8", { XM, EXymm }, 0 },
+    { "vbroadcastf32x8", { XM, EXymm }, PREFIX_DATA },
   },
 
   /* EVEX_LEN_0F381B_P_2_W_1_M_0 */
@@ -78,311 +78,311 @@ static const struct dis386 evex_len_tabl
     { "vbroadcastf64x4", { XM, EXymm }, 0 },
   },
 
-  /* EVEX_LEN_0F3836_P_2 */
+  /* EVEX_LEN_0F3836 */
   {
     { Bad_Opcode },
-    { "vperm%DQ", { XM, Vex, EXx }, 0 },
-    { "vperm%DQ", { XM, Vex, EXx }, 0 },
+    { "vperm%DQ", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vperm%DQ", { XM, Vex, EXx }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F385A_P_2_W_0_M_0 */
+  /* EVEX_LEN_0F385A_W_0_M_0 */
   {
     { Bad_Opcode },
-    { "vbroadcasti32x4", { XM, EXxmm }, 0 },
-    { "vbroadcasti32x4", { XM, EXxmm }, 0 },
+    { "vbroadcasti32x4", { XM, EXxmm }, PREFIX_DATA },
+    { "vbroadcasti32x4", { XM, EXxmm }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F385A_P_2_W_1_M_0 */
+  /* EVEX_LEN_0F385A_W_1_M_0 */
   {
     { Bad_Opcode },
-    { "vbroadcasti64x2", { XM, EXxmm }, 0 },
-    { "vbroadcasti64x2", { XM, EXxmm }, 0 },
+    { "vbroadcasti64x2", { XM, EXxmm }, PREFIX_DATA },
+    { "vbroadcasti64x2", { XM, EXxmm }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F385B_P_2_W_0_M_0 */
+  /* EVEX_LEN_0F385B_W_0_M_0 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vbroadcasti32x8", { XM, EXymm }, 0 },
+    { "vbroadcasti32x8", { XM, EXymm }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F385B_P_2_W_1_M_0 */
+  /* EVEX_LEN_0F385B_W_1_M_0 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vbroadcasti64x4", { XM, EXymm }, 0 },
+    { "vbroadcasti64x4", { XM, EXymm }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F38C6_REG_1_PREFIX_2 */
+  /* EVEX_LEN_0F38C6_R_1_M_0 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vgatherpf0dp%XW",  { MVexVSIBDWpX }, 0 },
+    { "vgatherpf0dp%XW",  { MVexVSIBDWpX }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F38C6_REG_2_PREFIX_2 */
+  /* EVEX_LEN_0F38C6_R_2_M_0 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vgatherpf1dp%XW",  { MVexVSIBDWpX }, 0 },
+    { "vgatherpf1dp%XW",  { MVexVSIBDWpX }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F38C6_REG_5_PREFIX_2 */
+  /* EVEX_LEN_0F38C6_R_5_M_0 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vscatterpf0dp%XW",  { MVexVSIBDWpX }, 0 },
+    { "vscatterpf0dp%XW",  { MVexVSIBDWpX }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F38C6_REG_6_PREFIX_2 */
+  /* EVEX_LEN_0F38C6_R_6_M_0 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vscatterpf1dp%XW",  { MVexVSIBDWpX }, 0 },
+    { "vscatterpf1dp%XW",  { MVexVSIBDWpX }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F38C7_R_1_P_2_W_0 */
+  /* EVEX_LEN_0F38C7_R_1_M_0_W_0 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vgatherpf0qps",  { MVexVSIBDQWpX }, 0 },
+    { "vgatherpf0qps",  { MVexVSIBDQWpX }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F38C7_R_1_P_2_W_1 */
+  /* EVEX_LEN_0F38C7_R_1_M_0_W_1 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vgatherpf0qpd",  { MVexVSIBQWpX }, 0 },
+    { "vgatherpf0qpd",  { MVexVSIBQWpX }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F38C7_R_2_P_2_W_0 */
+  /* EVEX_LEN_0F38C7_R_2_M_0_W_0 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vgatherpf1qps",  { MVexVSIBDQWpX }, 0 },
+    { "vgatherpf1qps",  { MVexVSIBDQWpX }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F38C7_R_2_P_2_W_1 */
+  /* EVEX_LEN_0F38C7_R_2_M_0_W_1 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vgatherpf1qpd",  { MVexVSIBQWpX }, 0 },
+    { "vgatherpf1qpd",  { MVexVSIBQWpX }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F38C7_R_5_P_2_W_0 */
+  /* EVEX_LEN_0F38C7_R_5_M_0_W_0 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vscatterpf0qps",  { MVexVSIBDQWpX }, 0 },
+    { "vscatterpf0qps",  { MVexVSIBDQWpX }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F38C7_R_5_P_2_W_1 */
+  /* EVEX_LEN_0F38C7_R_5_M_0_W_1 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vscatterpf0qpd",  { MVexVSIBQWpX }, 0 },
+    { "vscatterpf0qpd",  { MVexVSIBQWpX }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F38C7_R_6_P_2_W_0 */
+  /* EVEX_LEN_0F38C7_R_6_M_0_W_0 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vscatterpf1qps",  { MVexVSIBDQWpX }, 0 },
+    { "vscatterpf1qps",  { MVexVSIBDQWpX }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F38C7_R_6_P_2_W_1 */
+  /* EVEX_LEN_0F38C7_R_6_M_0_W_1 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vscatterpf1qpd",  { MVexVSIBQWpX }, 0 },
+    { "vscatterpf1qpd",  { MVexVSIBQWpX }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A00_P_2_W_1 */
+  /* EVEX_LEN_0F3A00_W_1 */
   {
     { Bad_Opcode },
-    { "vpermq", { XM, EXx, Ib }, 0 },
-    { "vpermq", { XM, EXx, Ib }, 0 },
+    { "vpermq", { XM, EXx, Ib }, PREFIX_DATA },
+    { "vpermq", { XM, EXx, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A01_P_2_W_1 */
+  /* EVEX_LEN_0F3A01_W_1 */
   {
     { Bad_Opcode },
-    { "vpermpd", { XM, EXx, Ib }, 0 },
-    { "vpermpd", { XM, EXx, Ib }, 0 },
+    { "vpermpd", { XM, EXx, Ib }, PREFIX_DATA },
+    { "vpermpd", { XM, EXx, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A14_P_2 */
+  /* EVEX_LEN_0F3A14 */
   {
-    { "vpextrb", { Edqb, XM, Ib }, 0 },
+    { "vpextrb", { Edqb, XM, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A15_P_2 */
+  /* EVEX_LEN_0F3A15 */
   {
-    { "vpextrw", { Edqw, XM, Ib }, 0 },
+    { "vpextrw", { Edqw, XM, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A16_P_2 */
+  /* EVEX_LEN_0F3A16 */
   {
-    { "vpextrK", { Edq, XM, Ib }, 0 },
+    { "vpextrK", { Edq, XM, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A17_P_2 */
+  /* EVEX_LEN_0F3A17 */
   {
-    { "vextractps", { Edqd, XMM, Ib }, 0 },
+    { "vextractps", { Edqd, XMM, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A18_P_2_W_0 */
+  /* EVEX_LEN_0F3A18_W_0 */
   {
     { Bad_Opcode },
-    { "vinsertf32x4", { XM, Vex, EXxmm, Ib }, 0 },
-    { "vinsertf32x4", { XM, Vex, EXxmm, Ib }, 0 },
+    { "vinsertf32x4", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
+    { "vinsertf32x4", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A18_P_2_W_1 */
+  /* EVEX_LEN_0F3A18_W_1 */
   {
     { Bad_Opcode },
-    { "vinsertf64x2", { XM, Vex, EXxmm, Ib }, 0 },
-    { "vinsertf64x2", { XM, Vex, EXxmm, Ib }, 0 },
+    { "vinsertf64x2", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
+    { "vinsertf64x2", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A19_P_2_W_0 */
+  /* EVEX_LEN_0F3A19_W_0 */
   {
     { Bad_Opcode },
-    { "vextractf32x4", { EXxmm, XM, Ib }, 0 },
-    { "vextractf32x4", { EXxmm, XM, Ib }, 0 },
+    { "vextractf32x4", { EXxmm, XM, Ib }, PREFIX_DATA },
+    { "vextractf32x4", { EXxmm, XM, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A19_P_2_W_1 */
+  /* EVEX_LEN_0F3A19_W_1 */
   {
     { Bad_Opcode },
-    { "vextractf64x2", { EXxmm, XM, Ib }, 0 },
-    { "vextractf64x2", { EXxmm, XM, Ib }, 0 },
+    { "vextractf64x2", { EXxmm, XM, Ib }, PREFIX_DATA },
+    { "vextractf64x2", { EXxmm, XM, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A1A_P_2_W_0 */
+  /* EVEX_LEN_0F3A1A_W_0 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vinsertf32x8", { XM, Vex, EXymm, Ib }, 0 },
+    { "vinsertf32x8", { XM, Vex, EXymm, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A1A_P_2_W_1 */
+  /* EVEX_LEN_0F3A1A_W_1 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vinsertf64x4", { XM, Vex, EXymm, Ib }, 0 },
+    { "vinsertf64x4", { XM, Vex, EXymm, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A1B_P_2_W_0 */
+  /* EVEX_LEN_0F3A1B_W_0 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vextractf32x8", { EXymm, XM, Ib }, 0 },
+    { "vextractf32x8", { EXymm, XM, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A1B_P_2_W_1 */
+  /* EVEX_LEN_0F3A1B_W_1 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vextractf64x4", { EXymm, XM, Ib }, 0 },
+    { "vextractf64x4", { EXymm, XM, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A20_P_2 */
+  /* EVEX_LEN_0F3A20 */
   {
-    { "vpinsrb", { XM, Vex, Edqb, Ib }, 0 },
+    { "vpinsrb", { XM, Vex, Edqb, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A21_P_2_W_0 */
+  /* EVEX_LEN_0F3A21_W_0 */
   {
-    { "vinsertps", { XMM, Vex, EXxmm_md, Ib }, 0 },
+    { "vinsertps", { XMM, Vex, EXxmm_md, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A22_P_2 */
+  /* EVEX_LEN_0F3A22 */
   {
-    { "vpinsrK", { XM, Vex, Edq, Ib }, 0 },
+    { "vpinsrK", { XM, Vex, Edq, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A23_P_2_W_0 */
+  /* EVEX_LEN_0F3A23_W_0 */
   {
     { Bad_Opcode },
-    { "vshuff32x4", { XM, Vex, EXx, Ib }, 0 },
-    { "vshuff32x4", { XM, Vex, EXx, Ib }, 0 },
+    { "vshuff32x4", { XM, Vex, EXx, Ib }, PREFIX_DATA },
+    { "vshuff32x4", { XM, Vex, EXx, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A23_P_2_W_1 */
+  /* EVEX_LEN_0F3A23_W_1 */
   {
     { Bad_Opcode },
-    { "vshuff64x2", { XM, Vex, EXx, Ib }, 0 },
-    { "vshuff64x2", { XM, Vex, EXx, Ib }, 0 },
+    { "vshuff64x2", { XM, Vex, EXx, Ib }, PREFIX_DATA },
+    { "vshuff64x2", { XM, Vex, EXx, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A38_P_2_W_0 */
+  /* EVEX_LEN_0F3A38_W_0 */
   {
     { Bad_Opcode },
-    { "vinserti32x4", { XM, Vex, EXxmm, Ib }, 0 },
-    { "vinserti32x4", { XM, Vex, EXxmm, Ib }, 0 },
+    { "vinserti32x4", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
+    { "vinserti32x4", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A38_P_2_W_1 */
+  /* EVEX_LEN_0F3A38_W_1 */
   {
     { Bad_Opcode },
-    { "vinserti64x2", { XM, Vex, EXxmm, Ib }, 0 },
-    { "vinserti64x2", { XM, Vex, EXxmm, Ib }, 0 },
+    { "vinserti64x2", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
+    { "vinserti64x2", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A39_P_2_W_0 */
+  /* EVEX_LEN_0F3A39_W_0 */
   {
     { Bad_Opcode },
-    { "vextracti32x4", { EXxmm, XM, Ib }, 0 },
-    { "vextracti32x4", { EXxmm, XM, Ib }, 0 },
+    { "vextracti32x4", { EXxmm, XM, Ib }, PREFIX_DATA },
+    { "vextracti32x4", { EXxmm, XM, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A39_P_2_W_1 */
+  /* EVEX_LEN_0F3A39_W_1 */
   {
     { Bad_Opcode },
-    { "vextracti64x2", { EXxmm, XM, Ib }, 0 },
-    { "vextracti64x2", { EXxmm, XM, Ib }, 0 },
+    { "vextracti64x2", { EXxmm, XM, Ib }, PREFIX_DATA },
+    { "vextracti64x2", { EXxmm, XM, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A3A_P_2_W_0 */
+  /* EVEX_LEN_0F3A3A_W_0 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vinserti32x8", { XM, Vex, EXymm, Ib }, 0 },
+    { "vinserti32x8", { XM, Vex, EXymm, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A3A_P_2_W_1 */
+  /* EVEX_LEN_0F3A3A_W_1 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vinserti64x4", { XM, Vex, EXymm, Ib }, 0 },
+    { "vinserti64x4", { XM, Vex, EXymm, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A3B_P_2_W_0 */
+  /* EVEX_LEN_0F3A3B_W_0 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vextracti32x8", { EXymm, XM, Ib }, 0 },
+    { "vextracti32x8", { EXymm, XM, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A3B_P_2_W_1 */
+  /* EVEX_LEN_0F3A3B_W_1 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vextracti64x4", { EXymm, XM, Ib }, 0 },
+    { "vextracti64x4", { EXymm, XM, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A43_P_2_W_0 */
+  /* EVEX_LEN_0F3A43_W_0 */
   {
     { Bad_Opcode },
-    { "vshufi32x4", { XM, Vex, EXx, Ib }, 0 },
-    { "vshufi32x4", { XM, Vex, EXx, Ib }, 0 },
+    { "vshufi32x4", { XM, Vex, EXx, Ib }, PREFIX_DATA },
+    { "vshufi32x4", { XM, Vex, EXx, Ib }, PREFIX_DATA },
   },
 
-  /* EVEX_LEN_0F3A43_P_2_W_1 */
+  /* EVEX_LEN_0F3A43_W_1 */
   {
     { Bad_Opcode },
-    { "vshufi64x2", { XM, Vex, EXx, Ib }, 0 },
-    { "vshufi64x2", { XM, Vex, EXx, Ib }, 0 },
+    { "vshufi64x2", { XM, Vex, EXx, Ib }, PREFIX_DATA },
+    { "vshufi64x2", { XM, Vex, EXx, Ib }, PREFIX_DATA },
   },
 };
--- a/opcodes/i386-dis-evex-mod.h
+++ b/opcodes/i386-dis-evex-mod.h
@@ -28,67 +28,67 @@
     /* MOD_EVEX_0F2B */
     { "vmovntpX", { EXx, XM }, PREFIX_OPCODE },
   },
-  /* MOD_EVEX_0F381A_P_2_W_0 */
+  /* MOD_EVEX_0F381A_W_0 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F381A_P_2_W_0_M_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F381A_W_0_M_0) },
   },
-  /* MOD_EVEX_0F381A_P_2_W_1 */
+  /* MOD_EVEX_0F381A_W_1 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F381A_P_2_W_1_M_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F381A_W_1_M_0) },
   },
-  /* MOD_EVEX_0F381B_P_2_W_0 */
+  /* MOD_EVEX_0F381B_W_0 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F381B_P_2_W_0_M_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F381B_W_0_M_0) },
   },
-  /* MOD_EVEX_0F381B_P_2_W_1 */
+  /* MOD_EVEX_0F381B_W_1 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F381B_P_2_W_1_M_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F381B_W_1_M_0) },
   },
-  /* MOD_EVEX_0F385A_P_2_W_0 */
+  /* MOD_EVEX_0F385A_W_0 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F385A_P_2_W_0_M_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F385A_W_0_M_0) },
   },
-  /* MOD_EVEX_0F385A_P_2_W_1 */
+  /* MOD_EVEX_0F385A_W_1 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F385A_P_2_W_1_M_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F385A_W_1_M_0) },
   },
-  /* MOD_EVEX_0F385B_P_2_W_0 */
+  /* MOD_EVEX_0F385B_W_0 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F385B_P_2_W_0_M_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F385B_W_0_M_0) },
   },
-  /* MOD_EVEX_0F385B_P_2_W_1 */
+  /* MOD_EVEX_0F385B_W_1 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F385B_P_2_W_1_M_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F385B_W_1_M_0) },
   },
   {
     /* MOD_EVEX_0F38C6_REG_1 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F38C6_REG_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_R_1_M_0) },
   },
   {
     /* MOD_EVEX_0F38C6_REG_2 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F38C6_REG_2) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_R_2_M_0) },
   },
   {
     /* MOD_EVEX_0F38C6_REG_5 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F38C6_REG_5) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_R_5_M_0) },
   },
   {
     /* MOD_EVEX_0F38C6_REG_6 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F38C6_REG_6) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_R_6_M_0) },
   },
   {
     /* MOD_EVEX_0F38C7_REG_1 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F38C7_REG_1) },
+    { VEX_W_TABLE (EVEX_W_0F38C7_R_1_M_0) },
   },
   {
     /* MOD_EVEX_0F38C7_REG_2 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F38C7_REG_2) },
+    { VEX_W_TABLE (EVEX_W_0F38C7_R_2_M_0) },
   },
   {
     /* MOD_EVEX_0F38C7_REG_5 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F38C7_REG_5) },
+    { VEX_W_TABLE (EVEX_W_0F38C7_R_5_M_0) },
   },
   {
     /* MOD_EVEX_0F38C7_REG_6 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F38C7_REG_6) },
+    { VEX_W_TABLE (EVEX_W_0F38C7_R_6_M_0) },
   },
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -94,30 +94,6 @@
     { "vmaxpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
     { VEX_W_TABLE (EVEX_W_0F5F_P_3) },
   },
-  /* PREFIX_EVEX_0F64 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcmpgtb", { XMask, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F65 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcmpgtw", { XMask, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F66 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F66_P_2) },
-  },
-  /* PREFIX_EVEX_0F6E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F6E_P_2) },
-  },
   /* PREFIX_EVEX_0F6F */
   {
     { Bad_Opcode },
@@ -132,96 +108,6 @@
     { VEX_W_TABLE (EVEX_W_0F70_P_2) },
     { "vpshuflw", { XM, EXx, Ib }, 0 },
   },
-  /* PREFIX_EVEX_0F71_REG_2 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsrlw", { Vex, EXx, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F71_REG_4 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsraw", { Vex, EXx, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F71_REG_6 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsllw", { Vex, EXx, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F72_REG_0 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpror%DQ", { Vex, EXx, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F72_REG_1 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vprol%DQ", { Vex, EXx, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F72_REG_2 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F72_R_2_P_2) },
-  },
-  /* PREFIX_EVEX_0F72_REG_4 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsra%DQ", { Vex, EXx, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F72_REG_6 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F72_R_6_P_2) },
-  },
-  /* PREFIX_EVEX_0F73_REG_2 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F73_R_2_P_2) },
-  },
-  /* PREFIX_EVEX_0F73_REG_3 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsrldq", { Vex, EXx, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F73_REG_6 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F73_R_6_P_2) },
-  },
-  /* PREFIX_EVEX_0F73_REG_7 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpslldq", { Vex, EXx, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F74 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcmpeqb", { XMask, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F75 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcmpeqw", { XMask, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F76 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F76_P_2) },
-  },
   /* PREFIX_EVEX_0F78 */
   {
     { VEX_W_TABLE (EVEX_W_0F78_P_0) },
@@ -270,42 +156,6 @@
     { "vcmppX", { XMask, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
     { VEX_W_TABLE (EVEX_W_0FC2_P_3) },
   },
-  /* PREFIX_EVEX_0FC4 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0FC4_P_2) },
-  },
-  /* PREFIX_EVEX_0FC5 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0FC5_P_2) },
-  },
-  /* PREFIX_EVEX_0FD6 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0FD6_P_2) },
-  },
-  /* PREFIX_EVEX_0FDB */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpand%DQ", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0FDF */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpandn%DQ", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0FE2 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsra%DQ", { XM, Vex, EXxmm }, 0 },
-  },
   /* PREFIX_EVEX_0FE6 */
   {
     { Bad_Opcode },
@@ -313,30 +163,6 @@
     { VEX_W_TABLE (EVEX_W_0FE6_P_2) },
     { VEX_W_TABLE (EVEX_W_0FE6_P_3) },
   },
-  /* PREFIX_EVEX_0FE7 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0FE7_P_2) },
-  },
-  /* PREFIX_EVEX_0FEB */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpor%DQ", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0FEF */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpxor%DQ", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F380D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F380D_P_2) },
-  },
   /* PREFIX_EVEX_0F3810 */
   {
     { Bad_Opcode },
@@ -373,42 +199,6 @@
     { VEX_W_TABLE (EVEX_W_0F3815_P_1) },
     { "vprolv%DQ", { XM, Vex, EXx }, 0 },
   },
-  /* PREFIX_EVEX_0F3816 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3816_P_2) },
-  },
-  /* PREFIX_EVEX_0F3819 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3819_P_2) },
-  },
-  /* PREFIX_EVEX_0F381A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F381A_P_2) },
-  },
-  /* PREFIX_EVEX_0F381B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F381B_P_2) },
-  },
-  /* PREFIX_EVEX_0F381E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F381E_P_2) },
-  },
-  /* PREFIX_EVEX_0F381F */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F381F_P_2) },
-  },
   /* PREFIX_EVEX_0F3820 */
   {
     { Bad_Opcode },
@@ -475,18 +265,6 @@
     { VEX_W_TABLE (EVEX_W_0F382A_P_1) },
     { VEX_W_TABLE (EVEX_W_0F382A_P_2) },
   },
-  /* PREFIX_EVEX_0F382C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vscalefp%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-  },
-  /* PREFIX_EVEX_0F382D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vscalefs%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
-  },
   /* PREFIX_EVEX_0F3830 */
   {
     { Bad_Opcode },
@@ -523,18 +301,6 @@
     { VEX_W_TABLE (EVEX_W_0F3835_P_1) },
     { VEX_W_TABLE (EVEX_W_0F3835_P_2) },
   },
-  /* PREFIX_EVEX_0F3836 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3836_P_2) },
-  },
-  /* PREFIX_EVEX_0F3837 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3837_P_2) },
-  },
   /* PREFIX_EVEX_0F3838 */
   {
     { Bad_Opcode },
@@ -553,102 +319,6 @@
     { VEX_W_TABLE (EVEX_W_0F383A_P_1) },
     { "vpminuw", { XM, Vex, EXx }, 0 },
   },
-  /* PREFIX_EVEX_0F383B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpminu%DQ", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F383D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmaxs%DQ", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F383F */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmaxu%DQ", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F3840 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmull%DQ", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F3842 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vgetexpp%XW", { XM, EXx, EXxEVexS }, 0 },
-  },
-  /* PREFIX_EVEX_0F3843 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vgetexps%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS }, 0 },
-  },
-  /* PREFIX_EVEX_0F3844 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vplzcnt%DQ", { XM, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F3845 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsrlv%DQ", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F3846 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsrav%DQ", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F3847 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsllv%DQ", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F384C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vrcp14p%XW", { XM, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F384D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vrcp14s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, 0 },
-  },
-  /* PREFIX_EVEX_0F384E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vrsqrt14p%XW", { XM, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F384F */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vrsqrt14s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, 0 },
-  },
-  /* PREFIX_EVEX_0F3850 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpdpbusd", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F3851 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpdpbusds", { XM, Vex, EXx }, 0 },
-  },
   /* PREFIX_EVEX_0F3852 */
   {
     { Bad_Opcode },
@@ -663,66 +333,6 @@
     { "vpdpwssds", { XM, Vex, EXx }, 0 },
     { "vp4dpwssds", { XM, Vex, EXxmm }, 0 },
   },
-  /* PREFIX_EVEX_0F3854 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpopcnt%BW", { XM, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F3855 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpopcnt%DQ", { XM, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F3859 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3859_P_2) },
-  },
-  /* PREFIX_EVEX_0F385A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F385A_P_2) },
-  },
-  /* PREFIX_EVEX_0F385B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F385B_P_2) },
-  },
-  /* PREFIX_EVEX_0F3862 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpexpand%BW", { XM, EXbwUnit }, 0 },
-  },
-  /* PREFIX_EVEX_0F3863 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcompress%BW",   { EXbwUnit, XM }, 0 },
-  },
-  /* PREFIX_EVEX_0F3864 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpblendm%DQ", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F3865 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vblendmp%XW", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F3866 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpblendm%BW", { XM, Vex, EXx }, 0 },
-  },
   /* PREFIX_EVEX_0F3868 */
   {
     { Bad_Opcode },
@@ -730,18 +340,6 @@
     { Bad_Opcode },
     { "vp2intersect%DQ", { XMask, Vex, EXx, EXxEVexS }, 0 },
   },
-  /* PREFIX_EVEX_0F3870 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3870_P_2) },
-  },
-  /* PREFIX_EVEX_0F3871 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpshldv%DQ",  { XM, Vex, EXx }, 0 },
-  },
   /* PREFIX_EVEX_0F3872 */
   {
     { Bad_Opcode },
@@ -749,132 +347,6 @@
     { VEX_W_TABLE (EVEX_W_0F3872_P_2) },
     { VEX_W_TABLE (EVEX_W_0F3872_P_3) },
   },
-  /* PREFIX_EVEX_0F3873 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpshrdv%DQ",  { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F3875 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpermi2%BW", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F3876 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpermi2%DQ", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F3877 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpermi2p%XW", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F387A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F387A_P_2) },
-  },
-  /* PREFIX_EVEX_0F387B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F387B_P_2) },
-  },
-  /* PREFIX_EVEX_0F387C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpbroadcastK", { XM, Rdq }, 0 },
-  },
-  /* PREFIX_EVEX_0F387D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpermt2%BW", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F387E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpermt2%DQ", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F387F */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpermt2p%XW", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F3883 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3883_P_2) },
-  },
-  /* PREFIX_EVEX_0F3888 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vexpandp%XW", { XM, EXEvexXGscat }, 0 },
-  },
-  /* PREFIX_EVEX_0F3889 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpexpand%DQ", { XM, EXEvexXGscat }, 0 },
-  },
-  /* PREFIX_EVEX_0F388A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vcompressp%XW", { EXEvexXGscat, XM }, 0 },
-  },
-  /* PREFIX_EVEX_0F388B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcompress%DQ", { EXEvexXGscat, XM }, 0 },
-  },
-  /* PREFIX_EVEX_0F388D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vperm%BW", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F388F */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpshufbitqmb",  { XMask, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F3890 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpgatherd%DQ", { XM, MVexVSIBDWpX }, 0 },
-  },
-  /* PREFIX_EVEX_0F3891 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3891_P_2) },
-  },
-  /* PREFIX_EVEX_0F3892 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vgatherdp%XW", { XM, MVexVSIBDWpX}, 0 },
-  },
-  /* PREFIX_EVEX_0F3893 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3893_P_2) },
-  },
   /* PREFIX_EVEX_0F389A */
   {
     { Bad_Opcode },
@@ -889,30 +361,6 @@
     { "vfmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
     { "v4fmaddss", { XMScalar, VexScalar, Mxmm }, 0 },
   },
-  /* PREFIX_EVEX_0F38A0 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpscatterd%DQ", { MVexVSIBDWpX, XM }, 0 },
-  },
-  /* PREFIX_EVEX_0F38A1 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F38A1_P_2) },
-  },
-  /* PREFIX_EVEX_0F38A2 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vscatterdp%XW", { MVexVSIBDWpX, XM }, 0 },
-  },
-  /* PREFIX_EVEX_0F38A3 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F38A3_P_2) },
-  },
   /* PREFIX_EVEX_0F38AA */
   {
     { Bad_Opcode },
@@ -927,369 +375,3 @@
     { "vfmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
     { "v4fnmaddss", { XMScalar, VexScalar, Mxmm }, 0 },
   },
-  /* PREFIX_EVEX_0F38B4 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmadd52luq", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F38B5 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmadd52huq", { XM, Vex, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F38C4 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpconflict%DQ", { XM, EXx }, 0 },
-  },
-  /* PREFIX_EVEX_0F38C6_REG_1 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_REG_1_PREFIX_2) },
-  },
-  /* PREFIX_EVEX_0F38C6_REG_2 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_REG_2_PREFIX_2) },
-  },
-  /* PREFIX_EVEX_0F38C6_REG_5 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_REG_5_PREFIX_2) },
-  },
-  /* PREFIX_EVEX_0F38C6_REG_6 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_REG_6_PREFIX_2) },
-  },
-  /* PREFIX_EVEX_0F38C7_REG_1 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F38C7_R_1_P_2) },
-  },
-  /* PREFIX_EVEX_0F38C7_REG_2 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F38C7_R_2_P_2) },
-  },
-  /* PREFIX_EVEX_0F38C7_REG_5 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F38C7_R_5_P_2) },
-  },
-  /* PREFIX_EVEX_0F38C7_REG_6 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F38C7_R_6_P_2) },
-  },
-  /* PREFIX_EVEX_0F38C8 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vexp2p%XW",        { XM, EXx, EXxEVexS }, 0 },
-  },
-  /* PREFIX_EVEX_0F38CA */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vrcp28p%XW",       { XM, EXx, EXxEVexS }, 0 },
-  },
-  /* PREFIX_EVEX_0F38CB */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vrcp28s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS }, 0 },
-  },
-  /* PREFIX_EVEX_0F38CC */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vrsqrt28p%XW",     { XM, EXx, EXxEVexS }, 0 },
-  },
-  /* PREFIX_EVEX_0F38CD */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vrsqrt28s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A00 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A00_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A01 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A01_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A03 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "valign%DQ", { XM, Vex, EXx, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A05 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A05_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A08 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A08_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A09 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A09_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A0A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A0A_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A0B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A0B_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A14 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A14_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A15 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A15_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A16 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A16_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A17 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A17_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A18 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A18_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A19 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A19_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A1A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A1A_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A1B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A1B_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A1E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcmpu%DQ", { XMask, Vex, EXx, VPCMP }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A1F */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcmp%DQ", { XMask, Vex, EXx, VPCMP }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A20 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A20_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A21 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A21_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A22 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A22_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A23 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A23_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A25 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpternlog%DQ", { XM, Vex, EXx, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A26 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vgetmantp%XW", { XM, EXx, EXxEVexS, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A27 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vgetmants%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A38 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A38_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A39 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A39_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A3A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A3A_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A3B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A3B_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A3E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcmpu%BW", { XMask, Vex, EXx, VPCMP }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A3F */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcmp%BW", { XMask, Vex, EXx, VPCMP }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A42 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A42_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A43 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A43_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A50 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vrangep%XW", { XM, Vex, EXx, EXxEVexS, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A51 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vranges%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A54 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfixupimmp%XW", { XM, Vex, EXx, EXxEVexS, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A55 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfixupimms%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A56 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vreducep%XW", { XM, EXx, EXxEVexS, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A57 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vreduces%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A66 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfpclassp%XW%XZ", { XMask, EXx, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A67 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfpclasss%XW", { XMask, EXVexWdqScalar, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A70 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A70_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A71 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpshld%DQ",   { XM, Vex, EXx, Ib }, 0 },
-  },
-  /* PREFIX_EVEX_0F3A72 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F3A72_P_2) },
-  },
-  /* PREFIX_EVEX_0F3A73 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpshrd%DQ",   { XM, Vex, EXx, Ib }, 0 },
-  },
--- a/opcodes/i386-dis-evex-reg.h
+++ b/opcodes/i386-dis-evex-reg.h
@@ -2,32 +2,32 @@
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F71_REG_2) },
+    { "vpsrlw", { Vex, EXx, Ib }, PREFIX_DATA },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F71_REG_4) },
+    { "vpsraw", { Vex, EXx, Ib }, PREFIX_DATA },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F71_REG_6) },
+    { "vpsllw", { Vex, EXx, Ib }, PREFIX_DATA },
   },
   /* REG_EVEX_0F72 */
   {
-    { PREFIX_TABLE (PREFIX_EVEX_0F72_REG_0) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F72_REG_1) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F72_REG_2) },
+    { "vpror%DQ", { Vex, EXx, Ib }, PREFIX_DATA },
+    { "vprol%DQ", { Vex, EXx, Ib }, PREFIX_DATA },
+    { VEX_W_TABLE (EVEX_W_0F72_R_2) },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F72_REG_4) },
+    { "vpsra%DQ", { Vex, EXx, Ib }, PREFIX_DATA },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F72_REG_6) },
+    { VEX_W_TABLE (EVEX_W_0F72_R_6) },
   },
   /* REG_EVEX_0F73 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F73_REG_2) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F73_REG_3) },
+    { VEX_W_TABLE (EVEX_W_0F73_R_2) },
+    { "vpsrldq", { Vex, EXx, Ib }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F73_REG_6) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F73_REG_7) },
+    { VEX_W_TABLE (EVEX_W_0F73_R_6) },
+    { "vpslldq", { Vex, EXx, Ib }, PREFIX_DATA },
   },
   /* REG_EVEX_0F38C6 */
   {
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -138,29 +138,29 @@
   },
   /* EVEX_W_0F62 */
   {
-    { PREFIX_TABLE (PREFIX_VEX_0F62) },
+    { "vpunpckldq", { XM, Vex, EXx }, PREFIX_DATA },
   },
-  /* EVEX_W_0F66_P_2 */
+  /* EVEX_W_0F66 */
   {
-    { "vpcmpgtd", { XMask, Vex, EXx }, 0 },
+    { "vpcmpgtd", { XMask, Vex, EXx }, PREFIX_DATA },
   },
   /* EVEX_W_0F6A */
   {
-    { PREFIX_TABLE (PREFIX_VEX_0F6A) },
+    { "vpunpckhdq", { XM, Vex, EXx }, PREFIX_DATA },
   },
   /* EVEX_W_0F6B */
   {
-    { PREFIX_TABLE (PREFIX_VEX_0F6B) },
+    { "vpackssdw", { XM, Vex, EXx }, PREFIX_DATA },
   },
   /* EVEX_W_0F6C */
   {
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F6C) },
+    { "vpunpcklqdq", { XM, Vex, EXx }, PREFIX_DATA },
   },
   /* EVEX_W_0F6D */
   {
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F6D) },
+    { "vpunpckhqdq", { XM, Vex, EXx }, PREFIX_DATA },
   },
   /* EVEX_W_0F6F_P_1 */
   {
@@ -181,27 +181,27 @@
   {
     { "vpshufd", { XM, EXx, Ib }, 0 },
   },
-  /* EVEX_W_0F72_R_2_P_2 */
+  /* EVEX_W_0F72_R_2 */
   {
-    { "vpsrld", { Vex, EXx, Ib }, 0 },
+    { "vpsrld", { Vex, EXx, Ib }, PREFIX_DATA },
   },
-  /* EVEX_W_0F72_R_6_P_2 */
+  /* EVEX_W_0F72_R_6 */
   {
-    { "vpslld", { Vex, EXx, Ib }, 0 },
+    { "vpslld", { Vex, EXx, Ib }, PREFIX_DATA },
   },
-  /* EVEX_W_0F73_R_2_P_2 */
+  /* EVEX_W_0F73_R_2 */
   {
     { Bad_Opcode },
-    { "vpsrlq", { Vex, EXx, Ib }, 0 },
+    { "vpsrlq", { Vex, EXx, Ib }, PREFIX_DATA },
   },
-  /* EVEX_W_0F73_R_6_P_2 */
+  /* EVEX_W_0F73_R_6 */
   {
     { Bad_Opcode },
-    { "vpsllq", { Vex, EXx, Ib }, 0 },
+    { "vpsllq", { Vex, EXx, Ib }, PREFIX_DATA },
   },
-  /* EVEX_W_0F76_P_2 */
+  /* EVEX_W_0F76 */
   {
-    { "vpcmpeqd", { XMask, Vex, EXx }, 0 },
+    { "vpcmpeqd", { XMask, Vex, EXx }, PREFIX_DATA },
   },
   /* EVEX_W_0F78_P_0 */
   {
@@ -279,22 +279,22 @@
   },
   /* EVEX_W_0FD2 */
   {
-    { PREFIX_TABLE (PREFIX_VEX_0FD2) },
+    { "vpsrld", { XM, Vex, EXxmm }, PREFIX_DATA },
   },
   /* EVEX_W_0FD3 */
   {
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0FD3) },
+    { "vpsrlq", { XM, Vex, EXxmm }, PREFIX_DATA },
   },
   /* EVEX_W_0FD4 */
   {
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0FD4) },
+    { "vpaddq", { XM, Vex, EXx }, PREFIX_DATA },
   },
-  /* EVEX_W_0FD6_P_2 */
+  /* EVEX_W_0FD6_L_0 */
   {
     { Bad_Opcode },
-    { "vmovq", { EXqS, XMScalar }, 0 },
+    { "vmovq", { EXqS, XMScalar }, PREFIX_DATA },
   },
   /* EVEX_W_0FE6_P_1 */
   {
@@ -311,41 +311,41 @@
     { Bad_Opcode },
     { "vcvtpd2dq%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
   },
-  /* EVEX_W_0FE7_P_2 */
+  /* EVEX_W_0FE7 */
   {
-    { "vmovntdq", { EXEvexXNoBcst, XM }, 0 },
+    { "vmovntdq", { EXEvexXNoBcst, XM }, PREFIX_DATA },
   },
   /* EVEX_W_0FF2 */
   {
-    { PREFIX_TABLE (PREFIX_VEX_0FF2) },
+    { "vpslld", { XM, Vex, EXxmm }, PREFIX_DATA },
   },
   /* EVEX_W_0FF3 */
   {
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0FF3) },
+    { "vpsllq", { XM, Vex, EXxmm }, PREFIX_DATA },
   },
   /* EVEX_W_0FF4 */
   {
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0FF4) },
+    { "vpmuludq", { XM, Vex, EXx }, PREFIX_DATA },
   },
   /* EVEX_W_0FFA */
   {
-    { PREFIX_TABLE (PREFIX_VEX_0FFA) },
+    { "vpsubd", { XM, Vex, EXx }, PREFIX_DATA },
   },
   /* EVEX_W_0FFB */
   {
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0FFB) },
+    { "vpsubq", { XM, Vex, EXx }, PREFIX_DATA },
   },
   /* EVEX_W_0FFE */
   {
-    { PREFIX_TABLE (PREFIX_VEX_0FFE) },
+    { "vpaddd", { XM, Vex, EXx }, PREFIX_DATA },
   },
-  /* EVEX_W_0F380D_P_2 */
+  /* EVEX_W_0F380D */
   {
     { Bad_Opcode },
-    { "vpermilpd", { XM, Vex, EXx }, 0 },
+    { "vpermilpd", { XM, Vex, EXx }, PREFIX_DATA },
   },
   /* EVEX_W_0F3810_P_1 */
   {
@@ -390,29 +390,29 @@
   {
     { "vpmovusqd", { EXxmmq, XM }, 0 },
   },
-  /* EVEX_W_0F3819_P_2 */
+  /* EVEX_W_0F3819 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3819_P_2_W_0) },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3819_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3819_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3819_W_1) },
   },
-  /* EVEX_W_0F381A_P_2 */
+  /* EVEX_W_0F381A */
   {
-    { MOD_TABLE (MOD_EVEX_0F381A_P_2_W_0) },
-    { MOD_TABLE (MOD_EVEX_0F381A_P_2_W_1) },
+    { MOD_TABLE (MOD_EVEX_0F381A_W_0) },
+    { MOD_TABLE (MOD_EVEX_0F381A_W_1) },
   },
-  /* EVEX_W_0F381B_P_2 */
+  /* EVEX_W_0F381B */
   {
-    { MOD_TABLE (MOD_EVEX_0F381B_P_2_W_0) },
-    { MOD_TABLE (MOD_EVEX_0F381B_P_2_W_1) },
+    { MOD_TABLE (MOD_EVEX_0F381B_W_0) },
+    { MOD_TABLE (MOD_EVEX_0F381B_W_1) },
   },
-  /* EVEX_W_0F381E_P_2 */
+  /* EVEX_W_0F381E */
   {
-    { "vpabsd", { XM, EXx }, 0 },
+    { "vpabsd", { XM, EXx }, PREFIX_DATA },
   },
-  /* EVEX_W_0F381F_P_2 */
+  /* EVEX_W_0F381F */
   {
     { Bad_Opcode },
-    { "vpabsq", { XM, EXx }, 0 },
+    { "vpabsq", { XM, EXx }, PREFIX_DATA },
   },
   /* EVEX_W_0F3820_P_1 */
   {
@@ -463,7 +463,7 @@
   },
   /* EVEX_W_0F382B */
   {
-    { PREFIX_TABLE (PREFIX_VEX_0F382B) },
+    { "vpackusdw", { XM, Vex, EXx }, PREFIX_DATA },
   },
   /* EVEX_W_0F3830_P_1 */
   {
@@ -493,10 +493,10 @@
   {
     { "vpmovzxdq", { XM, EXxmmq }, 0 },
   },
-  /* EVEX_W_0F3837_P_2 */
+  /* EVEX_W_0F3837 */
   {
     { Bad_Opcode },
-    { "vpcmpgtq", { XMask, Vex, EXx }, 0 },
+    { "vpcmpgtq", { XMask, Vex, EXx }, PREFIX_DATA },
   },
   /* EVEX_W_0F383A_P_1 */
   {
@@ -507,25 +507,25 @@
     { "vdpbf16ps", { XM, Vex, EXx }, 0 },
     { Bad_Opcode },
   },
-  /* EVEX_W_0F3859_P_2 */
+  /* EVEX_W_0F3859 */
   {
-    { "vbroadcasti32x2", { XM, EXxmm_mq }, 0 },
-    { "vpbroadcastq", { XM, EXxmm_mq }, 0 },
+    { "vbroadcasti32x2", { XM, EXxmm_mq }, PREFIX_DATA },
+    { "vpbroadcastq", { XM, EXxmm_mq }, PREFIX_DATA },
   },
-  /* EVEX_W_0F385A_P_2 */
+  /* EVEX_W_0F385A */
   {
-    { MOD_TABLE (MOD_EVEX_0F385A_P_2_W_0) },
-    { MOD_TABLE (MOD_EVEX_0F385A_P_2_W_1) },
+    { MOD_TABLE (MOD_EVEX_0F385A_W_0) },
+    { MOD_TABLE (MOD_EVEX_0F385A_W_1) },
   },
-  /* EVEX_W_0F385B_P_2 */
+  /* EVEX_W_0F385B */
   {
-    { MOD_TABLE (MOD_EVEX_0F385B_P_2_W_0) },
-    { MOD_TABLE (MOD_EVEX_0F385B_P_2_W_1) },
+    { MOD_TABLE (MOD_EVEX_0F385B_W_0) },
+    { MOD_TABLE (MOD_EVEX_0F385B_W_1) },
   },
-  /* EVEX_W_0F3870_P_2 */
+  /* EVEX_W_0F3870 */
   {
     { Bad_Opcode },
-    { "vpshldvw",  { XM, Vex, EXx }, 0 },
+    { "vpshldvw",  { XM, Vex, EXx }, PREFIX_DATA },
   },
   /* EVEX_W_0F3872_P_1 */
   {
@@ -542,156 +542,156 @@
     { "vcvtne2ps2bf16", { XM, Vex, EXx}, 0 },
     { Bad_Opcode },
   },
-  /* EVEX_W_0F387A_P_2 */
+  /* EVEX_W_0F387A */
   {
-    { "vpbroadcastb", { XM, Rd }, 0 },
+    { "vpbroadcastb", { XM, Rd }, PREFIX_DATA },
   },
-  /* EVEX_W_0F387B_P_2 */
+  /* EVEX_W_0F387B */
   {
-    { "vpbroadcastw", { XM, Rd }, 0 },
+    { "vpbroadcastw", { XM, Rd }, PREFIX_DATA },
   },
-  /* EVEX_W_0F3883_P_2 */
+  /* EVEX_W_0F3883 */
   {
     { Bad_Opcode },
-    { "vpmultishiftqb", { XM, Vex, EXx }, 0 },
+    { "vpmultishiftqb", { XM, Vex, EXx }, PREFIX_DATA },
   },
-  /* EVEX_W_0F3891_P_2 */
+  /* EVEX_W_0F3891 */
   {
-    { "vpgatherqd", { XMxmmq, MVexVSIBQDWpX }, 0 },
+    { "vpgatherqd", { XMxmmq, MVexVSIBQDWpX }, PREFIX_DATA },
     { "vpgatherqq", { XM, MVexVSIBQWpX }, 0 },
   },
-  /* EVEX_W_0F3893_P_2 */
+  /* EVEX_W_0F3893 */
   {
-    { "vgatherqps", { XMxmmq, MVexVSIBQDWpX }, 0 },
+    { "vgatherqps", { XMxmmq, MVexVSIBQDWpX }, PREFIX_DATA },
     { "vgatherqpd", { XM, MVexVSIBQWpX }, 0 },
   },
-  /* EVEX_W_0F38A1_P_2 */
+  /* EVEX_W_0F38A1 */
   {
-    { "vpscatterqd", { MVexVSIBQDWpX, XMxmmq }, 0 },
+    { "vpscatterqd", { MVexVSIBQDWpX, XMxmmq }, PREFIX_DATA },
     { "vpscatterqq", { MVexVSIBQWpX, XM }, 0 },
   },
-  /* EVEX_W_0F38A3_P_2 */
+  /* EVEX_W_0F38A3 */
   {
-    { "vscatterqps", { MVexVSIBQDWpX, XMxmmq }, 0 },
+    { "vscatterqps", { MVexVSIBQDWpX, XMxmmq }, PREFIX_DATA },
     { "vscatterqpd", { MVexVSIBQWpX, XM }, 0 },
   },
-  /* EVEX_W_0F38C7_R_1_P_2 */
+  /* EVEX_W_0F38C7_R_1_M_0 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_1_P_2_W_0) },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_1_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_1_M_0_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_1_M_0_W_1) },
   },
-  /* EVEX_W_0F38C7_R_2_P_2 */
+  /* EVEX_W_0F38C7_R_2_M_0 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_2_P_2_W_0) },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_2_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_2_M_0_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_2_M_0_W_1) },
   },
-  /* EVEX_W_0F38C7_R_5_P_2 */
+  /* EVEX_W_0F38C7_R_5_M_0 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_5_P_2_W_0) },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_5_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_5_M_0_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_5_M_0_W_1) },
   },
-  /* EVEX_W_0F38C7_R_6_P_2 */
+  /* EVEX_W_0F38C7_R_6_M_0 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_6_P_2_W_0) },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_6_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_6_M_0_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_6_M_0_W_1) },
   },
-  /* EVEX_W_0F3A00_P_2 */
+  /* EVEX_W_0F3A00 */
   {
     { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A00_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A00_W_1) },
   },
-  /* EVEX_W_0F3A01_P_2 */
+  /* EVEX_W_0F3A01 */
   {
     { Bad_Opcode },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A01_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A01_W_1) },
   },
-  /* EVEX_W_0F3A05_P_2 */
+  /* EVEX_W_0F3A05 */
   {
     { Bad_Opcode },
-    { "vpermilpd", { XM, EXx, Ib }, 0 },
+    { "vpermilpd", { XM, EXx, Ib }, PREFIX_DATA },
   },
-  /* EVEX_W_0F3A08_P_2 */
+  /* EVEX_W_0F3A08 */
   {
-    { "vrndscaleps", { XM, EXx, EXxEVexS, Ib }, 0 },
+    { "vrndscaleps", { XM, EXx, EXxEVexS, Ib }, PREFIX_DATA },
   },
-  /* EVEX_W_0F3A09_P_2 */
+  /* EVEX_W_0F3A09 */
   {
     { Bad_Opcode },
-    { "vrndscalepd", { XM, EXx, EXxEVexS, Ib }, 0 },
+    { "vrndscalepd", { XM, EXx, EXxEVexS, Ib }, PREFIX_DATA },
   },
-  /* EVEX_W_0F3A0A_P_2 */
+  /* EVEX_W_0F3A0A */
   {
-    { "vrndscaless", { XMScalar, VexScalar, EXxmm_md, EXxEVexS, Ib }, 0 },
+    { "vrndscaless", { XMScalar, VexScalar, EXxmm_md, EXxEVexS, Ib }, PREFIX_DATA },
   },
-  /* EVEX_W_0F3A0B_P_2 */
+  /* EVEX_W_0F3A0B */
   {
     { Bad_Opcode },
-    { "vrndscalesd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS, Ib }, 0 },
+    { "vrndscalesd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS, Ib }, PREFIX_DATA },
   },
-  /* EVEX_W_0F3A18_P_2 */
+  /* EVEX_W_0F3A18 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A18_P_2_W_0) },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A18_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A18_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A18_W_1) },
   },
-  /* EVEX_W_0F3A19_P_2 */
+  /* EVEX_W_0F3A19 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A19_P_2_W_0) },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A19_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A19_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A19_W_1) },
   },
-  /* EVEX_W_0F3A1A_P_2 */
+  /* EVEX_W_0F3A1A */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A1A_P_2_W_0) },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A1A_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A1A_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A1A_W_1) },
   },
-  /* EVEX_W_0F3A1B_P_2 */
+  /* EVEX_W_0F3A1B */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A1B_P_2_W_0) },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A1B_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A1B_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A1B_W_1) },
   },
-  /* EVEX_W_0F3A21_P_2 */
+  /* EVEX_W_0F3A21 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A21_P_2_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A21_W_0) },
   },
-  /* EVEX_W_0F3A23_P_2 */
+  /* EVEX_W_0F3A23 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A23_P_2_W_0) },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A23_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A23_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A23_W_1) },
   },
-  /* EVEX_W_0F3A38_P_2 */
+  /* EVEX_W_0F3A38 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A38_P_2_W_0) },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A38_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A38_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A38_W_1) },
   },
-  /* EVEX_W_0F3A39_P_2 */
+  /* EVEX_W_0F3A39 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A39_P_2_W_0) },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A39_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A39_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A39_W_1) },
   },
-  /* EVEX_W_0F3A3A_P_2 */
+  /* EVEX_W_0F3A3A */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A3A_P_2_W_0) },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A3A_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A3A_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A3A_W_1) },
   },
-  /* EVEX_W_0F3A3B_P_2 */
+  /* EVEX_W_0F3A3B */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A3B_P_2_W_0) },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A3B_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A3B_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A3B_W_1) },
   },
-  /* EVEX_W_0F3A42_P_2 */
+  /* EVEX_W_0F3A42 */
   {
     { "vdbpsadbw", { XM, Vex, EXx, Ib }, 0 },
   },
-  /* EVEX_W_0F3A43_P_2 */
+  /* EVEX_W_0F3A43 */
   {
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A43_P_2_W_0) },
-    { EVEX_LEN_TABLE (EVEX_LEN_0F3A43_P_2_W_1) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A43_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A43_W_1) },
   },
-  /* EVEX_W_0F3A70_P_2 */
+  /* EVEX_W_0F3A70 */
   {
     { Bad_Opcode },
     { "vpshldw",   { XM, Vex, EXx, Ib }, 0 },
   },
-  /* EVEX_W_0F3A72_P_2 */
+  /* EVEX_W_0F3A72 */
   {
     { Bad_Opcode },
     { "vpshrdw",   { XM, Vex, EXx, Ib }, 0 },
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -110,31 +110,31 @@ static const struct dis386 evex_table[][
     { PREFIX_TABLE (PREFIX_EVEX_0F5E) },
     { PREFIX_TABLE (PREFIX_EVEX_0F5F) },
     /* 60 */
-    { PREFIX_TABLE (PREFIX_VEX_0F60) },
-    { PREFIX_TABLE (PREFIX_VEX_0F61) },
+    { "vpunpcklbw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpunpcklwd", { XM, Vex, EXx }, PREFIX_DATA },
     { VEX_W_TABLE (EVEX_W_0F62) },
-    { PREFIX_TABLE (PREFIX_VEX_0F63) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F64) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F65) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F66) },
-    { PREFIX_TABLE (PREFIX_VEX_0F67) },
+    { "vpacksswb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpcmpgtb", { XMask, Vex, EXx }, PREFIX_DATA },
+    { "vpcmpgtw", { XMask, Vex, EXx }, PREFIX_DATA },
+    { VEX_W_TABLE (EVEX_W_0F66) },
+    { "vpackuswb", { XM, Vex, EXx }, PREFIX_DATA },
     /* 68 */
-    { PREFIX_TABLE (PREFIX_VEX_0F68) },
-    { PREFIX_TABLE (PREFIX_VEX_0F69) },
+    { "vpunpckhbw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpunpckhwd", { XM, Vex, EXx }, PREFIX_DATA },
     { VEX_W_TABLE (EVEX_W_0F6A) },
     { VEX_W_TABLE (EVEX_W_0F6B) },
     { VEX_W_TABLE (EVEX_W_0F6C) },
     { VEX_W_TABLE (EVEX_W_0F6D) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F6E) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F6E) },
     { PREFIX_TABLE (PREFIX_EVEX_0F6F) },
     /* 70 */
     { PREFIX_TABLE (PREFIX_EVEX_0F70) },
     { REG_TABLE (REG_EVEX_0F71) },
     { REG_TABLE (REG_EVEX_0F72) },
     { REG_TABLE (REG_EVEX_0F73) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F74) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F75) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F76) },
+    { "vpcmpeqb", { XMask, Vex, EXx }, PREFIX_DATA },
+    { "vpcmpeqw", { XMask, Vex, EXx }, PREFIX_DATA },
+    { VEX_W_TABLE (EVEX_W_0F76) },
     { Bad_Opcode },
     /* 78 */
     { PREFIX_TABLE (PREFIX_EVEX_0F78) },
@@ -222,8 +222,8 @@ static const struct dis386 evex_table[][
     { Bad_Opcode },
     { PREFIX_TABLE (PREFIX_EVEX_0FC2) },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0FC4) },
-    { PREFIX_TABLE (PREFIX_EVEX_0FC5) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0FC4) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0FC5) },
     { "vshufpX", { XM, Vex, EXx, Ib }, PREFIX_OPCODE },
     { Bad_Opcode },
     /* C8 */
@@ -237,67 +237,67 @@ static const struct dis386 evex_table[][
     { Bad_Opcode },
     /* D0 */
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0FD1) },
+    { "vpsrlw", { XM, Vex, EXxmm }, PREFIX_DATA },
     { VEX_W_TABLE (EVEX_W_0FD2) },
     { VEX_W_TABLE (EVEX_W_0FD3) },
     { VEX_W_TABLE (EVEX_W_0FD4) },
-    { PREFIX_TABLE (PREFIX_VEX_0FD5) },
-    { PREFIX_TABLE (PREFIX_EVEX_0FD6) },
+    { "vpmullw", { XM, Vex, EXx }, PREFIX_DATA },
+    { EVEX_LEN_TABLE (EVEX_LEN_0FD6) },
     { Bad_Opcode },
     /* D8 */
-    { PREFIX_TABLE (PREFIX_VEX_0FD8) },
-    { PREFIX_TABLE (PREFIX_VEX_0FD9) },
-    { PREFIX_TABLE (PREFIX_VEX_0FDA) },
-    { PREFIX_TABLE (PREFIX_EVEX_0FDB) },
-    { PREFIX_TABLE (PREFIX_VEX_0FDC) },
-    { PREFIX_TABLE (PREFIX_VEX_0FDD) },
-    { PREFIX_TABLE (PREFIX_VEX_0FDE) },
-    { PREFIX_TABLE (PREFIX_EVEX_0FDF) },
+    { "vpsubusb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpsubusw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpminub", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpand%DQ", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpaddusb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpaddusw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmaxub", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpandn%DQ", { XM, Vex, EXx }, PREFIX_DATA },
     /* E0 */
-    { PREFIX_TABLE (PREFIX_VEX_0FE0) },
-    { PREFIX_TABLE (PREFIX_VEX_0FE1) },
-    { PREFIX_TABLE (PREFIX_EVEX_0FE2) },
-    { PREFIX_TABLE (PREFIX_VEX_0FE3) },
-    { PREFIX_TABLE (PREFIX_VEX_0FE4) },
-    { PREFIX_TABLE (PREFIX_VEX_0FE5) },
+    { "vpavgb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpsraw", { XM, Vex, EXxmm }, PREFIX_DATA },
+    { "vpsra%DQ", { XM, Vex, EXxmm }, PREFIX_DATA },
+    { "vpavgw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmulhuw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmulhw", { XM, Vex, EXx }, PREFIX_DATA },
     { PREFIX_TABLE (PREFIX_EVEX_0FE6) },
-    { PREFIX_TABLE (PREFIX_EVEX_0FE7) },
+    { VEX_W_TABLE (EVEX_W_0FE7) },
     /* E8 */
-    { PREFIX_TABLE (PREFIX_VEX_0FE8) },
-    { PREFIX_TABLE (PREFIX_VEX_0FE9) },
-    { PREFIX_TABLE (PREFIX_VEX_0FEA) },
-    { PREFIX_TABLE (PREFIX_EVEX_0FEB) },
-    { PREFIX_TABLE (PREFIX_VEX_0FEC) },
-    { PREFIX_TABLE (PREFIX_VEX_0FED) },
-    { PREFIX_TABLE (PREFIX_VEX_0FEE) },
-    { PREFIX_TABLE (PREFIX_EVEX_0FEF) },
+    { "vpsubsb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpsubsw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpminsw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpor%DQ", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpaddsb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpaddsw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmaxsw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpxor%DQ", { XM, Vex, EXx }, PREFIX_DATA },
     /* F0 */
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0FF1) },
+    { "vpsllw", { XM, Vex, EXxmm }, PREFIX_DATA },
     { VEX_W_TABLE (EVEX_W_0FF2) },
     { VEX_W_TABLE (EVEX_W_0FF3) },
     { VEX_W_TABLE (EVEX_W_0FF4) },
-    { PREFIX_TABLE (PREFIX_VEX_0FF5) },
-    { PREFIX_TABLE (PREFIX_VEX_0FF6) },
+    { "vpmaddwd", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpsadbw", { XM, Vex, EXx }, PREFIX_DATA },
     { Bad_Opcode },
     /* F8 */
-    { PREFIX_TABLE (PREFIX_VEX_0FF8) },
-    { PREFIX_TABLE (PREFIX_VEX_0FF9) },
+    { "vpsubb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpsubw", { XM, Vex, EXx }, PREFIX_DATA },
     { VEX_W_TABLE (EVEX_W_0FFA) },
     { VEX_W_TABLE (EVEX_W_0FFB) },
-    { PREFIX_TABLE (PREFIX_VEX_0FFC) },
-    { PREFIX_TABLE (PREFIX_VEX_0FFD) },
+    { "vpaddb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpaddw", { XM, Vex, EXx }, PREFIX_DATA },
     { VEX_W_TABLE (EVEX_W_0FFE) },
     { Bad_Opcode },
   },
   /* EVEX_0F38 */
   {
     /* 00 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3800) },
+    { "vpshufb", { XM, Vex, EXx }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F3804) },
+    { "vpmaddubsw", { XM, Vex, EXx }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -305,9 +305,9 @@ static const struct dis386 evex_table[][
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F380B) },
-    { PREFIX_TABLE (PREFIX_VEX_0F380C) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F380D) },
+    { "vpmulhrsw", { XM, Vex, EXx }, PREFIX_DATA },
+    { VEX_W_TABLE (VEX_W_0F380C) },
+    { VEX_W_TABLE (EVEX_W_0F380D) },
     { Bad_Opcode },
     { Bad_Opcode },
     /* 10 */
@@ -317,17 +317,17 @@ static const struct dis386 evex_table[][
     { PREFIX_TABLE (PREFIX_EVEX_0F3813) },
     { PREFIX_TABLE (PREFIX_EVEX_0F3814) },
     { PREFIX_TABLE (PREFIX_EVEX_0F3815) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3816) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3816) },
     { Bad_Opcode },
     /* 18 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3818) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3819) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F381A) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F381B) },
-    { PREFIX_TABLE (PREFIX_VEX_0F381C) },
-    { PREFIX_TABLE (PREFIX_VEX_0F381D) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F381E) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F381F) },
+    { VEX_W_TABLE (VEX_W_0F3818) },
+    { VEX_W_TABLE (EVEX_W_0F3819) },
+    { VEX_W_TABLE (EVEX_W_0F381A) },
+    { VEX_W_TABLE (EVEX_W_0F381B) },
+    { "vpabsb", { XM, EXx }, PREFIX_DATA },
+    { "vpabsw", { XM, EXx }, PREFIX_DATA },
+    { VEX_W_TABLE (EVEX_W_0F381E) },
+    { VEX_W_TABLE (EVEX_W_0F381F) },
     /* 20 */
     { PREFIX_TABLE (PREFIX_EVEX_0F3820) },
     { PREFIX_TABLE (PREFIX_EVEX_0F3821) },
@@ -342,8 +342,8 @@ static const struct dis386 evex_table[][
     { PREFIX_TABLE (PREFIX_EVEX_0F3829) },
     { PREFIX_TABLE (PREFIX_EVEX_0F382A) },
     { VEX_W_TABLE (EVEX_W_0F382B) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F382C) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F382D) },
+    { "vscalefp%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+    { "vscalefs%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     /* 30 */
@@ -353,49 +353,49 @@ static const struct dis386 evex_table[][
     { PREFIX_TABLE (PREFIX_EVEX_0F3833) },
     { PREFIX_TABLE (PREFIX_EVEX_0F3834) },
     { PREFIX_TABLE (PREFIX_EVEX_0F3835) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3836) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3837) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3836) },
+    { VEX_W_TABLE (EVEX_W_0F3837) },
     /* 38 */
     { PREFIX_TABLE (PREFIX_EVEX_0F3838) },
     { PREFIX_TABLE (PREFIX_EVEX_0F3839) },
     { PREFIX_TABLE (PREFIX_EVEX_0F383A) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F383B) },
-    { PREFIX_TABLE (PREFIX_VEX_0F383C) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F383D) },
-    { PREFIX_TABLE (PREFIX_VEX_0F383E) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F383F) },
+    { "vpminu%DQ", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmaxsb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmaxs%DQ", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmaxuw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmaxu%DQ", { XM, Vex, EXx }, PREFIX_DATA },
     /* 40 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F3840) },
+    { "vpmull%DQ", { XM, Vex, EXx }, PREFIX_DATA },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3842) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3843) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3844) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3845) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3846) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3847) },
+    { "vgetexpp%XW", { XM, EXx, EXxEVexS }, PREFIX_DATA },
+    { "vgetexps%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS }, PREFIX_DATA },
+    { "vplzcnt%DQ", { XM, EXx }, PREFIX_DATA },
+    { "vpsrlv%DQ", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpsrav%DQ", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpsllv%DQ", { XM, Vex, EXx }, PREFIX_DATA },
     /* 48 */
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F384C) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F384D) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F384E) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F384F) },
+    { "vrcp14p%XW", { XM, EXx }, PREFIX_DATA },
+    { "vrcp14s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+    { "vrsqrt14p%XW", { XM, EXx }, 0 },
+    { "vrsqrt14s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
     /* 50 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F3850) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3851) },
+    { "vpdpbusd", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpdpbusds", { XM, Vex, EXx }, PREFIX_DATA },
     { PREFIX_TABLE (PREFIX_EVEX_0F3852) },
     { PREFIX_TABLE (PREFIX_EVEX_0F3853) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3854) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3855) },
+    { "vpopcnt%BW", { XM, EXx }, PREFIX_DATA },
+    { "vpopcnt%DQ", { XM, EXx }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     /* 58 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3858) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3859) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F385A) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F385B) },
+    { VEX_W_TABLE (VEX_W_0F3858) },
+    { VEX_W_TABLE (EVEX_W_0F3859) },
+    { VEX_W_TABLE (EVEX_W_0F385A) },
+    { VEX_W_TABLE (EVEX_W_0F385B) },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -403,11 +403,11 @@ static const struct dis386 evex_table[][
     /* 60 */
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3862) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3863) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3864) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3865) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3866) },
+    { "vpexpand%BW", { XM, EXbwUnit }, PREFIX_DATA },
+    { "vpcompress%BW",   { EXbwUnit, XM }, PREFIX_DATA },
+    { "vpblendm%DQ", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vblendmp%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpblendm%BW", { XM, Vex, EXx }, PREFIX_DATA },
     { Bad_Opcode },
     /* 68 */
     { PREFIX_TABLE (PREFIX_EVEX_0F3868) },
@@ -419,113 +419,113 @@ static const struct dis386 evex_table[][
     { Bad_Opcode },
     { Bad_Opcode },
     /* 70 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F3870) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3871) },
+    { VEX_W_TABLE (EVEX_W_0F3870) },
+    { "vpshldv%DQ",  { XM, Vex, EXx }, PREFIX_DATA },
     { PREFIX_TABLE (PREFIX_EVEX_0F3872) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3873) },
+    { "vpshrdv%DQ",  { XM, Vex, EXx }, PREFIX_DATA },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3875) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3876) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3877) },
+    { "vpermi2%BW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpermi2%DQ", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpermi2p%XW", { XM, Vex, EXx }, PREFIX_DATA },
     /* 78 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3878) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3879) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F387A) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F387B) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F387C) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F387D) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F387E) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F387F) },
+    { VEX_W_TABLE (VEX_W_0F3878) },
+    { VEX_W_TABLE (VEX_W_0F3879) },
+    { VEX_W_TABLE (EVEX_W_0F387A) },
+    { VEX_W_TABLE (EVEX_W_0F387B) },
+    { "vpbroadcastK", { XM, Rdq }, PREFIX_DATA },
+    { "vpermt2%BW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpermt2%DQ", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpermt2p%XW", { XM, Vex, EXx }, PREFIX_DATA },
     /* 80 */
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3883) },
+    { VEX_W_TABLE (EVEX_W_0F3883) },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
     /* 88 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F3888) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3889) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F388A) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F388B) },
+    { "vexpandp%XW", { XM, EXEvexXGscat }, PREFIX_DATA },
+    { "vpexpand%DQ", { XM, EXEvexXGscat }, PREFIX_DATA },
+    { "vcompressp%XW", { EXEvexXGscat, XM }, PREFIX_DATA },
+    { "vpcompress%DQ", { EXEvexXGscat, XM }, PREFIX_DATA },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F388D) },
+    { "vperm%BW", { XM, Vex, EXx }, PREFIX_DATA },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F388F) },
+    { "vpshufbitqmb",  { XMask, Vex, EXx }, PREFIX_DATA },
     /* 90 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F3890) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3891) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3892) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3893) },
+    { "vpgatherd%DQ", { XM, MVexVSIBDWpX }, PREFIX_DATA },
+    { VEX_W_TABLE (EVEX_W_0F3891) },
+    { "vgatherdp%XW", { XM, MVexVSIBDWpX}, PREFIX_DATA },
+    { VEX_W_TABLE (EVEX_W_0F3893) },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F3896) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3897) },
+    { "vfmaddsub132p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+    { "vfmsubadd132p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
     /* 98 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3898) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3899) },
+    { "vfmadd132p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+    { "vfmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
     { PREFIX_TABLE (PREFIX_EVEX_0F389A) },
     { PREFIX_TABLE (PREFIX_EVEX_0F389B) },
-    { PREFIX_TABLE (PREFIX_VEX_0F389C) },
-    { PREFIX_TABLE (PREFIX_VEX_0F389D) },
-    { PREFIX_TABLE (PREFIX_VEX_0F389E) },
-    { PREFIX_TABLE (PREFIX_VEX_0F389F) },
+    { "vfnmadd132p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+    { "vfnmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
+    { "vfnmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+    { "vfnmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
     /* A0 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F38A0) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F38A1) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F38A2) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F38A3) },
+    { "vpscatterd%DQ", { MVexVSIBDWpX, XM }, PREFIX_DATA },
+    { VEX_W_TABLE (EVEX_W_0F38A1) },
+    { "vscatterdp%XW", { MVexVSIBDWpX, XM }, PREFIX_DATA },
+    { VEX_W_TABLE (EVEX_W_0F38A3) },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F38A6) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38A7) },
+    { "vfmaddsub213p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+    { "vfmsubadd213p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
     /* A8 */
-    { PREFIX_TABLE (PREFIX_VEX_0F38A8) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38A9) },
+    { "vfmadd213p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+    { "vfmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
     { PREFIX_TABLE (PREFIX_EVEX_0F38AA) },
     { PREFIX_TABLE (PREFIX_EVEX_0F38AB) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38AC) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38AD) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38AE) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38AF) },
+    { "vfnmadd213p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+    { "vfnmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
+    { "vfnmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+    { "vfnmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
     /* B0 */
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F38B4) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F38B5) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38B6) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38B7) },
+    { "vpmadd52luq", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmadd52huq", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vfmaddsub231p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+    { "vfmsubadd231p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
     /* B8 */
-    { PREFIX_TABLE (PREFIX_VEX_0F38B8) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38B9) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38BA) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38BB) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38BC) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38BD) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38BE) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38BF) },
+    { "vfmadd231p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+    { "vfmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
+    { "vfmsub231p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+    { "vfmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
+    { "vfnmadd231p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+    { "vfnmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
+    { "vfnmsub231p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
+    { "vfnmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
     /* C0 */
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F38C4) },
+    { "vpconflict%DQ", { XM, EXx }, PREFIX_DATA },
     { Bad_Opcode },
     { REG_TABLE (REG_EVEX_0F38C6) },
     { REG_TABLE (REG_EVEX_0F38C7) },
     /* C8 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F38C8) },
+    { "vexp2p%XW",        { XM, EXx, EXxEVexS }, PREFIX_DATA },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F38CA) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F38CB) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F38CC) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F38CD) },
+    { "vrcp28p%XW",       { XM, EXx, EXxEVexS }, PREFIX_DATA },
+    { "vrcp28s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS }, PREFIX_DATA },
+    { "vrsqrt28p%XW",     { XM, EXx, EXxEVexS }, PREFIX_DATA },
+    { "vrsqrt28s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS }, PREFIX_DATA },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F38CF) },
+    { VEX_W_TABLE (VEX_W_0F38CF) },
     /* D0 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -540,10 +540,10 @@ static const struct dis386 evex_table[][
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F38DC) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38DD) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38DE) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38DF) },
+    { "vaesenc", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vaesenclast", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vaesdec", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vaesdeclast", { XM, Vex, EXx }, PREFIX_DATA },
     /* E0 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -584,50 +584,50 @@ static const struct dis386 evex_table[][
   /* EVEX_0F3A */
   {
     /* 00 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A00) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A01) },
+    { VEX_W_TABLE (EVEX_W_0F3A00) },
+    { VEX_W_TABLE (EVEX_W_0F3A01) },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A03) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A04) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A05) },
+    { "valign%DQ", { XM, Vex, EXx, Ib }, PREFIX_DATA },
+    { VEX_W_TABLE (VEX_W_0F3A04) },
+    { VEX_W_TABLE (EVEX_W_0F3A05) },
     { Bad_Opcode },
     { Bad_Opcode },
     /* 08 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A08) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A09) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A0A) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A0B) },
+    { VEX_W_TABLE (EVEX_W_0F3A08) },
+    { VEX_W_TABLE (EVEX_W_0F3A09) },
+    { VEX_W_TABLE (EVEX_W_0F3A0A) },
+    { VEX_W_TABLE (EVEX_W_0F3A0B) },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A0F) },
+    { "vpalignr", { XM, Vex, EXx, Ib }, PREFIX_DATA },
     /* 10 */
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A14) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A15) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A16) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A17) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A14) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A15) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A16) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A17) },
     /* 18 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A18) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A19) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A1A) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A1B) },
+    { VEX_W_TABLE (EVEX_W_0F3A18) },
+    { VEX_W_TABLE (EVEX_W_0F3A19) },
+    { VEX_W_TABLE (EVEX_W_0F3A1A) },
+    { VEX_W_TABLE (EVEX_W_0F3A1B) },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A1D) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A1E) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A1F) },
+    { VEX_W_TABLE (VEX_W_0F3A1D) },
+    { "vpcmpu%DQ", { XMask, Vex, EXx, VPCMP }, PREFIX_DATA },
+    { "vpcmp%DQ", { XMask, Vex, EXx, VPCMP }, PREFIX_DATA },
     /* 20 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A20) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A21) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A22) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A23) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A20) },
+    { VEX_W_TABLE (EVEX_W_0F3A21) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A22) },
+    { VEX_W_TABLE (EVEX_W_0F3A23) },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A25) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A26) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A27) },
+    { "vpternlog%DQ", { XM, Vex, EXx, Ib }, PREFIX_DATA },
+    { "vgetmantp%XW", { XM, EXx, EXxEVexS, Ib }, PREFIX_DATA },
+    { "vgetmants%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, PREFIX_DATA },
     /* 28 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -647,20 +647,20 @@ static const struct dis386 evex_table[][
     { Bad_Opcode },
     { Bad_Opcode },
     /* 38 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A38) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A39) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A3A) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A3B) },
+    { VEX_W_TABLE (EVEX_W_0F3A38) },
+    { VEX_W_TABLE (EVEX_W_0F3A39) },
+    { VEX_W_TABLE (EVEX_W_0F3A3A) },
+    { VEX_W_TABLE (EVEX_W_0F3A3B) },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A3E) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A3F) },
+    { "vpcmpu%BW", { XMask, Vex, EXx, VPCMP }, PREFIX_DATA },
+    { "vpcmp%BW", { XMask, Vex, EXx, VPCMP }, PREFIX_DATA },
     /* 40 */
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A42) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A43) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A44) },
+    { VEX_W_TABLE (EVEX_W_0F3A42) },
+    { VEX_W_TABLE (EVEX_W_0F3A43) },
+    { "vpclmulqdq", { XM, Vex, EXx, PCLMUL }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -674,14 +674,14 @@ static const struct dis386 evex_table[][
     { Bad_Opcode },
     { Bad_Opcode },
     /* 50 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A50) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A51) },
+    { "vrangep%XW", { XM, Vex, EXx, EXxEVexS, Ib }, PREFIX_DATA },
+    { "vranges%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A54) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A55) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A56) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A57) },
+    { "vfixupimmp%XW", { XM, Vex, EXx, EXxEVexS, Ib }, PREFIX_DATA },
+    { "vfixupimms%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, PREFIX_DATA },
+    { "vreducep%XW", { XM, EXx, EXxEVexS, Ib }, PREFIX_DATA },
+    { "vreduces%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, PREFIX_DATA },
     /* 58 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -698,8 +698,8 @@ static const struct dis386 evex_table[][
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A66) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A67) },
+    { "vfpclassp%XW%XZ", { XMask, EXx, Ib }, PREFIX_DATA },
+    { "vfpclasss%XW", { XMask, EXVexWdqScalar, Ib }, PREFIX_DATA },
     /* 68 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -710,10 +710,10 @@ static const struct dis386 evex_table[][
     { Bad_Opcode },
     { Bad_Opcode },
     /* 70 */
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A70) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A71) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A72) },
-    { PREFIX_TABLE (PREFIX_EVEX_0F3A73) },
+    { VEX_W_TABLE (EVEX_W_0F3A70) },
+    { "vpshld%DQ",   { XM, Vex, EXx, Ib }, PREFIX_DATA },
+    { VEX_W_TABLE (EVEX_W_0F3A72) },
+    { "vpshrd%DQ",   { XM, Vex, EXx, Ib }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -815,8 +815,8 @@ static const struct dis386 evex_table[][
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F3ACE) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3ACF) },
+    { VEX_W_TABLE (VEX_W_0F3ACE) },
+    { VEX_W_TABLE (VEX_W_0F3ACF) },
     /* D0 */
     { Bad_Opcode },
     { Bad_Opcode },
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -792,7 +792,7 @@ enum
   MOD_0FD7,
   MOD_0FE7_PREFIX_2,
   MOD_0FF0_PREFIX_3,
-  MOD_0F382A_PREFIX_2,
+  MOD_0F382A,
   MOD_VEX_0F3849_X86_64_P_0_W_0,
   MOD_VEX_0F3849_X86_64_P_2_W_0,
   MOD_VEX_0F3849_X86_64_P_3_W_0,
@@ -804,7 +804,7 @@ enum
   MOD_VEX_0F385E_X86_64_P_1_W_0,
   MOD_VEX_0F385E_X86_64_P_2_W_0,
   MOD_VEX_0F385E_X86_64_P_3_W_0,
-  MOD_0F38F5_PREFIX_2,
+  MOD_0F38F5,
   MOD_0F38F6_PREFIX_0,
   MOD_0F38F8_PREFIX_1,
   MOD_0F38F8_PREFIX_2,
@@ -882,26 +882,26 @@ enum
   MOD_VEX_W_1_0F99_P_2_LEN_0,
   MOD_VEX_0FAE_REG_2,
   MOD_VEX_0FAE_REG_3,
-  MOD_VEX_0FD7_PREFIX_2,
-  MOD_VEX_0FE7_PREFIX_2,
+  MOD_VEX_0FD7,
+  MOD_VEX_0FE7,
   MOD_VEX_0FF0_PREFIX_3,
-  MOD_VEX_0F381A_PREFIX_2,
-  MOD_VEX_0F382A_PREFIX_2,
-  MOD_VEX_0F382C_PREFIX_2,
-  MOD_VEX_0F382D_PREFIX_2,
-  MOD_VEX_0F382E_PREFIX_2,
-  MOD_VEX_0F382F_PREFIX_2,
-  MOD_VEX_0F385A_PREFIX_2,
-  MOD_VEX_0F388C_PREFIX_2,
-  MOD_VEX_0F388E_PREFIX_2,
-  MOD_VEX_W_0_0F3A30_P_2_LEN_0,
-  MOD_VEX_W_1_0F3A30_P_2_LEN_0,
-  MOD_VEX_W_0_0F3A31_P_2_LEN_0,
-  MOD_VEX_W_1_0F3A31_P_2_LEN_0,
-  MOD_VEX_W_0_0F3A32_P_2_LEN_0,
-  MOD_VEX_W_1_0F3A32_P_2_LEN_0,
-  MOD_VEX_W_0_0F3A33_P_2_LEN_0,
-  MOD_VEX_W_1_0F3A33_P_2_LEN_0,
+  MOD_VEX_0F381A,
+  MOD_VEX_0F382A,
+  MOD_VEX_0F382C,
+  MOD_VEX_0F382D,
+  MOD_VEX_0F382E,
+  MOD_VEX_0F382F,
+  MOD_VEX_0F385A,
+  MOD_VEX_0F388C,
+  MOD_VEX_0F388E,
+  MOD_VEX_0F3A30_L_0_W_0,
+  MOD_VEX_0F3A30_L_0_W_1,
+  MOD_VEX_0F3A31_L_0_W_0,
+  MOD_VEX_0F3A31_L_0_W_1,
+  MOD_VEX_0F3A32_L_0_W_0,
+  MOD_VEX_0F3A32_L_0_W_1,
+  MOD_VEX_0F3A33_L_0_W_0,
+  MOD_VEX_0F3A33_L_0_W_1,
 
   MOD_VEX_0FXOP_09_12,
 
@@ -912,14 +912,14 @@ enum
   MOD_EVEX_0F16_PREFIX_2,
   MOD_EVEX_0F17,
   MOD_EVEX_0F2B,
-  MOD_EVEX_0F381A_P_2_W_0,
-  MOD_EVEX_0F381A_P_2_W_1,
-  MOD_EVEX_0F381B_P_2_W_0,
-  MOD_EVEX_0F381B_P_2_W_1,
-  MOD_EVEX_0F385A_P_2_W_0,
-  MOD_EVEX_0F385A_P_2_W_1,
-  MOD_EVEX_0F385B_P_2_W_0,
-  MOD_EVEX_0F385B_P_2_W_1,
+  MOD_EVEX_0F381A_W_0,
+  MOD_EVEX_0F381A_W_1,
+  MOD_EVEX_0F381B_W_0,
+  MOD_EVEX_0F381B_W_1,
+  MOD_EVEX_0F385A_W_0,
+  MOD_EVEX_0F385A_W_1,
+  MOD_EVEX_0F385B_W_0,
+  MOD_EVEX_0F385B_W_1,
   MOD_EVEX_0F38C6_REG_1,
   MOD_EVEX_0F38C6_REG_2,
   MOD_EVEX_0F38C6_REG_5,
@@ -985,12 +985,8 @@ enum
   PREFIX_0F60,
   PREFIX_0F61,
   PREFIX_0F62,
-  PREFIX_0F6C,
-  PREFIX_0F6D,
   PREFIX_0F6F,
   PREFIX_0F70,
-  PREFIX_0F73_REG_3,
-  PREFIX_0F73_REG_7,
   PREFIX_0F78,
   PREFIX_0F79,
   PREFIX_0F7C,
@@ -1022,84 +1018,18 @@ enum
   PREFIX_0FE7,
   PREFIX_0FF0,
   PREFIX_0FF7,
-  PREFIX_0F3810,
-  PREFIX_0F3814,
-  PREFIX_0F3815,
-  PREFIX_0F3817,
-  PREFIX_0F3820,
-  PREFIX_0F3821,
-  PREFIX_0F3822,
-  PREFIX_0F3823,
-  PREFIX_0F3824,
-  PREFIX_0F3825,
-  PREFIX_0F3828,
-  PREFIX_0F3829,
-  PREFIX_0F382A,
-  PREFIX_0F382B,
-  PREFIX_0F3830,
-  PREFIX_0F3831,
-  PREFIX_0F3832,
-  PREFIX_0F3833,
-  PREFIX_0F3834,
-  PREFIX_0F3835,
-  PREFIX_0F3837,
-  PREFIX_0F3838,
-  PREFIX_0F3839,
-  PREFIX_0F383A,
-  PREFIX_0F383B,
-  PREFIX_0F383C,
-  PREFIX_0F383D,
-  PREFIX_0F383E,
-  PREFIX_0F383F,
-  PREFIX_0F3840,
-  PREFIX_0F3841,
-  PREFIX_0F3880,
-  PREFIX_0F3881,
-  PREFIX_0F3882,
   PREFIX_0F38C8,
   PREFIX_0F38C9,
   PREFIX_0F38CA,
   PREFIX_0F38CB,
   PREFIX_0F38CC,
   PREFIX_0F38CD,
-  PREFIX_0F38CF,
-  PREFIX_0F38DB,
-  PREFIX_0F38DC,
-  PREFIX_0F38DD,
-  PREFIX_0F38DE,
-  PREFIX_0F38DF,
   PREFIX_0F38F0,
   PREFIX_0F38F1,
-  PREFIX_0F38F5,
   PREFIX_0F38F6,
   PREFIX_0F38F8,
   PREFIX_0F38F9,
-  PREFIX_0F3A08,
-  PREFIX_0F3A09,
-  PREFIX_0F3A0A,
-  PREFIX_0F3A0B,
-  PREFIX_0F3A0C,
-  PREFIX_0F3A0D,
-  PREFIX_0F3A0E,
-  PREFIX_0F3A14,
-  PREFIX_0F3A15,
-  PREFIX_0F3A16,
-  PREFIX_0F3A17,
-  PREFIX_0F3A20,
-  PREFIX_0F3A21,
-  PREFIX_0F3A22,
-  PREFIX_0F3A40,
-  PREFIX_0F3A41,
-  PREFIX_0F3A42,
-  PREFIX_0F3A44,
-  PREFIX_0F3A60,
-  PREFIX_0F3A61,
-  PREFIX_0F3A62,
-  PREFIX_0F3A63,
   PREFIX_0F3ACC,
-  PREFIX_0F3ACE,
-  PREFIX_0F3ACF,
-  PREFIX_0F3ADF,
   PREFIX_VEX_0F10,
   PREFIX_VEX_0F11,
   PREFIX_VEX_0F12,
@@ -1128,36 +1058,8 @@ enum
   PREFIX_VEX_0F5D,
   PREFIX_VEX_0F5E,
   PREFIX_VEX_0F5F,
-  PREFIX_VEX_0F60,
-  PREFIX_VEX_0F61,
-  PREFIX_VEX_0F62,
-  PREFIX_VEX_0F63,
-  PREFIX_VEX_0F64,
-  PREFIX_VEX_0F65,
-  PREFIX_VEX_0F66,
-  PREFIX_VEX_0F67,
-  PREFIX_VEX_0F68,
-  PREFIX_VEX_0F69,
-  PREFIX_VEX_0F6A,
-  PREFIX_VEX_0F6B,
-  PREFIX_VEX_0F6C,
-  PREFIX_VEX_0F6D,
-  PREFIX_VEX_0F6E,
   PREFIX_VEX_0F6F,
   PREFIX_VEX_0F70,
-  PREFIX_VEX_0F71_REG_2,
-  PREFIX_VEX_0F71_REG_4,
-  PREFIX_VEX_0F71_REG_6,
-  PREFIX_VEX_0F72_REG_2,
-  PREFIX_VEX_0F72_REG_4,
-  PREFIX_VEX_0F72_REG_6,
-  PREFIX_VEX_0F73_REG_2,
-  PREFIX_VEX_0F73_REG_3,
-  PREFIX_VEX_0F73_REG_6,
-  PREFIX_VEX_0F73_REG_7,
-  PREFIX_VEX_0F74,
-  PREFIX_VEX_0F75,
-  PREFIX_VEX_0F76,
   PREFIX_VEX_0F77,
   PREFIX_VEX_0F7C,
   PREFIX_VEX_0F7D,
@@ -1170,166 +1072,13 @@ enum
   PREFIX_VEX_0F98,
   PREFIX_VEX_0F99,
   PREFIX_VEX_0FC2,
-  PREFIX_VEX_0FC4,
-  PREFIX_VEX_0FC5,
   PREFIX_VEX_0FD0,
-  PREFIX_VEX_0FD1,
-  PREFIX_VEX_0FD2,
-  PREFIX_VEX_0FD3,
-  PREFIX_VEX_0FD4,
-  PREFIX_VEX_0FD5,
-  PREFIX_VEX_0FD6,
-  PREFIX_VEX_0FD7,
-  PREFIX_VEX_0FD8,
-  PREFIX_VEX_0FD9,
-  PREFIX_VEX_0FDA,
-  PREFIX_VEX_0FDB,
-  PREFIX_VEX_0FDC,
-  PREFIX_VEX_0FDD,
-  PREFIX_VEX_0FDE,
-  PREFIX_VEX_0FDF,
-  PREFIX_VEX_0FE0,
-  PREFIX_VEX_0FE1,
-  PREFIX_VEX_0FE2,
-  PREFIX_VEX_0FE3,
-  PREFIX_VEX_0FE4,
-  PREFIX_VEX_0FE5,
   PREFIX_VEX_0FE6,
-  PREFIX_VEX_0FE7,
-  PREFIX_VEX_0FE8,
-  PREFIX_VEX_0FE9,
-  PREFIX_VEX_0FEA,
-  PREFIX_VEX_0FEB,
-  PREFIX_VEX_0FEC,
-  PREFIX_VEX_0FED,
-  PREFIX_VEX_0FEE,
-  PREFIX_VEX_0FEF,
   PREFIX_VEX_0FF0,
-  PREFIX_VEX_0FF1,
-  PREFIX_VEX_0FF2,
-  PREFIX_VEX_0FF3,
-  PREFIX_VEX_0FF4,
-  PREFIX_VEX_0FF5,
-  PREFIX_VEX_0FF6,
-  PREFIX_VEX_0FF7,
-  PREFIX_VEX_0FF8,
-  PREFIX_VEX_0FF9,
-  PREFIX_VEX_0FFA,
-  PREFIX_VEX_0FFB,
-  PREFIX_VEX_0FFC,
-  PREFIX_VEX_0FFD,
-  PREFIX_VEX_0FFE,
-  PREFIX_VEX_0F3800,
-  PREFIX_VEX_0F3801,
-  PREFIX_VEX_0F3802,
-  PREFIX_VEX_0F3803,
-  PREFIX_VEX_0F3804,
-  PREFIX_VEX_0F3805,
-  PREFIX_VEX_0F3806,
-  PREFIX_VEX_0F3807,
-  PREFIX_VEX_0F3808,
-  PREFIX_VEX_0F3809,
-  PREFIX_VEX_0F380A,
-  PREFIX_VEX_0F380B,
-  PREFIX_VEX_0F380C,
-  PREFIX_VEX_0F380D,
-  PREFIX_VEX_0F380E,
-  PREFIX_VEX_0F380F,
-  PREFIX_VEX_0F3813,
-  PREFIX_VEX_0F3816,
-  PREFIX_VEX_0F3817,
-  PREFIX_VEX_0F3818,
-  PREFIX_VEX_0F3819,
-  PREFIX_VEX_0F381A,
-  PREFIX_VEX_0F381C,
-  PREFIX_VEX_0F381D,
-  PREFIX_VEX_0F381E,
-  PREFIX_VEX_0F3820,
-  PREFIX_VEX_0F3821,
-  PREFIX_VEX_0F3822,
-  PREFIX_VEX_0F3823,
-  PREFIX_VEX_0F3824,
-  PREFIX_VEX_0F3825,
-  PREFIX_VEX_0F3828,
-  PREFIX_VEX_0F3829,
-  PREFIX_VEX_0F382A,
-  PREFIX_VEX_0F382B,
-  PREFIX_VEX_0F382C,
-  PREFIX_VEX_0F382D,
-  PREFIX_VEX_0F382E,
-  PREFIX_VEX_0F382F,
-  PREFIX_VEX_0F3830,
-  PREFIX_VEX_0F3831,
-  PREFIX_VEX_0F3832,
-  PREFIX_VEX_0F3833,
-  PREFIX_VEX_0F3834,
-  PREFIX_VEX_0F3835,
-  PREFIX_VEX_0F3836,
-  PREFIX_VEX_0F3837,
-  PREFIX_VEX_0F3838,
-  PREFIX_VEX_0F3839,
-  PREFIX_VEX_0F383A,
-  PREFIX_VEX_0F383B,
-  PREFIX_VEX_0F383C,
-  PREFIX_VEX_0F383D,
-  PREFIX_VEX_0F383E,
-  PREFIX_VEX_0F383F,
-  PREFIX_VEX_0F3840,
-  PREFIX_VEX_0F3841,
-  PREFIX_VEX_0F3845,
-  PREFIX_VEX_0F3846,
-  PREFIX_VEX_0F3847,
   PREFIX_VEX_0F3849_X86_64,
   PREFIX_VEX_0F384B_X86_64,
-  PREFIX_VEX_0F3858,
-  PREFIX_VEX_0F3859,
-  PREFIX_VEX_0F385A,
   PREFIX_VEX_0F385C_X86_64,
   PREFIX_VEX_0F385E_X86_64,
-  PREFIX_VEX_0F3878,
-  PREFIX_VEX_0F3879,
-  PREFIX_VEX_0F388C,
-  PREFIX_VEX_0F388E,
-  PREFIX_VEX_0F3890,
-  PREFIX_VEX_0F3891,
-  PREFIX_VEX_0F3892,
-  PREFIX_VEX_0F3893,
-  PREFIX_VEX_0F3896,
-  PREFIX_VEX_0F3897,
-  PREFIX_VEX_0F3898,
-  PREFIX_VEX_0F3899,
-  PREFIX_VEX_0F389A,
-  PREFIX_VEX_0F389B,
-  PREFIX_VEX_0F389C,
-  PREFIX_VEX_0F389D,
-  PREFIX_VEX_0F389E,
-  PREFIX_VEX_0F389F,
-  PREFIX_VEX_0F38A6,
-  PREFIX_VEX_0F38A7,
-  PREFIX_VEX_0F38A8,
-  PREFIX_VEX_0F38A9,
-  PREFIX_VEX_0F38AA,
-  PREFIX_VEX_0F38AB,
-  PREFIX_VEX_0F38AC,
-  PREFIX_VEX_0F38AD,
-  PREFIX_VEX_0F38AE,
-  PREFIX_VEX_0F38AF,
-  PREFIX_VEX_0F38B6,
-  PREFIX_VEX_0F38B7,
-  PREFIX_VEX_0F38B8,
-  PREFIX_VEX_0F38B9,
-  PREFIX_VEX_0F38BA,
-  PREFIX_VEX_0F38BB,
-  PREFIX_VEX_0F38BC,
-  PREFIX_VEX_0F38BD,
-  PREFIX_VEX_0F38BE,
-  PREFIX_VEX_0F38BF,
-  PREFIX_VEX_0F38CF,
-  PREFIX_VEX_0F38DB,
-  PREFIX_VEX_0F38DC,
-  PREFIX_VEX_0F38DD,
-  PREFIX_VEX_0F38DE,
-  PREFIX_VEX_0F38DF,
   PREFIX_VEX_0F38F2,
   PREFIX_VEX_0F38F3_REG_1,
   PREFIX_VEX_0F38F3_REG_2,
@@ -1337,73 +1086,6 @@ enum
   PREFIX_VEX_0F38F5,
   PREFIX_VEX_0F38F6,
   PREFIX_VEX_0F38F7,
-  PREFIX_VEX_0F3A00,
-  PREFIX_VEX_0F3A01,
-  PREFIX_VEX_0F3A02,
-  PREFIX_VEX_0F3A04,
-  PREFIX_VEX_0F3A05,
-  PREFIX_VEX_0F3A06,
-  PREFIX_VEX_0F3A08,
-  PREFIX_VEX_0F3A09,
-  PREFIX_VEX_0F3A0A,
-  PREFIX_VEX_0F3A0B,
-  PREFIX_VEX_0F3A0C,
-  PREFIX_VEX_0F3A0D,
-  PREFIX_VEX_0F3A0E,
-  PREFIX_VEX_0F3A0F,
-  PREFIX_VEX_0F3A14,
-  PREFIX_VEX_0F3A15,
-  PREFIX_VEX_0F3A16,
-  PREFIX_VEX_0F3A17,
-  PREFIX_VEX_0F3A18,
-  PREFIX_VEX_0F3A19,
-  PREFIX_VEX_0F3A1D,
-  PREFIX_VEX_0F3A20,
-  PREFIX_VEX_0F3A21,
-  PREFIX_VEX_0F3A22,
-  PREFIX_VEX_0F3A30,
-  PREFIX_VEX_0F3A31,
-  PREFIX_VEX_0F3A32,
-  PREFIX_VEX_0F3A33,
-  PREFIX_VEX_0F3A38,
-  PREFIX_VEX_0F3A39,
-  PREFIX_VEX_0F3A40,
-  PREFIX_VEX_0F3A41,
-  PREFIX_VEX_0F3A42,
-  PREFIX_VEX_0F3A44,
-  PREFIX_VEX_0F3A46,
-  PREFIX_VEX_0F3A48,
-  PREFIX_VEX_0F3A49,
-  PREFIX_VEX_0F3A4A,
-  PREFIX_VEX_0F3A4B,
-  PREFIX_VEX_0F3A4C,
-  PREFIX_VEX_0F3A5C,
-  PREFIX_VEX_0F3A5D,
-  PREFIX_VEX_0F3A5E,
-  PREFIX_VEX_0F3A5F,
-  PREFIX_VEX_0F3A60,
-  PREFIX_VEX_0F3A61,
-  PREFIX_VEX_0F3A62,
-  PREFIX_VEX_0F3A63,
-  PREFIX_VEX_0F3A68,
-  PREFIX_VEX_0F3A69,
-  PREFIX_VEX_0F3A6A,
-  PREFIX_VEX_0F3A6B,
-  PREFIX_VEX_0F3A6C,
-  PREFIX_VEX_0F3A6D,
-  PREFIX_VEX_0F3A6E,
-  PREFIX_VEX_0F3A6F,
-  PREFIX_VEX_0F3A78,
-  PREFIX_VEX_0F3A79,
-  PREFIX_VEX_0F3A7A,
-  PREFIX_VEX_0F3A7B,
-  PREFIX_VEX_0F3A7C,
-  PREFIX_VEX_0F3A7D,
-  PREFIX_VEX_0F3A7E,
-  PREFIX_VEX_0F3A7F,
-  PREFIX_VEX_0F3ACE,
-  PREFIX_VEX_0F3ACF,
-  PREFIX_VEX_0F3ADF,
   PREFIX_VEX_0F3AF0,
 
   PREFIX_EVEX_0F10,
@@ -1420,27 +1102,8 @@ enum
   PREFIX_EVEX_0F5D,
   PREFIX_EVEX_0F5E,
   PREFIX_EVEX_0F5F,
-  PREFIX_EVEX_0F64,
-  PREFIX_EVEX_0F65,
-  PREFIX_EVEX_0F66,
-  PREFIX_EVEX_0F6E,
   PREFIX_EVEX_0F6F,
   PREFIX_EVEX_0F70,
-  PREFIX_EVEX_0F71_REG_2,
-  PREFIX_EVEX_0F71_REG_4,
-  PREFIX_EVEX_0F71_REG_6,
-  PREFIX_EVEX_0F72_REG_0,
-  PREFIX_EVEX_0F72_REG_1,
-  PREFIX_EVEX_0F72_REG_2,
-  PREFIX_EVEX_0F72_REG_4,
-  PREFIX_EVEX_0F72_REG_6,
-  PREFIX_EVEX_0F73_REG_2,
-  PREFIX_EVEX_0F73_REG_3,
-  PREFIX_EVEX_0F73_REG_6,
-  PREFIX_EVEX_0F73_REG_7,
-  PREFIX_EVEX_0F74,
-  PREFIX_EVEX_0F75,
-  PREFIX_EVEX_0F76,
   PREFIX_EVEX_0F78,
   PREFIX_EVEX_0F79,
   PREFIX_EVEX_0F7A,
@@ -1448,29 +1111,13 @@ enum
   PREFIX_EVEX_0F7E,
   PREFIX_EVEX_0F7F,
   PREFIX_EVEX_0FC2,
-  PREFIX_EVEX_0FC4,
-  PREFIX_EVEX_0FC5,
-  PREFIX_EVEX_0FD6,
-  PREFIX_EVEX_0FDB,
-  PREFIX_EVEX_0FDF,
-  PREFIX_EVEX_0FE2,
   PREFIX_EVEX_0FE6,
-  PREFIX_EVEX_0FE7,
-  PREFIX_EVEX_0FEB,
-  PREFIX_EVEX_0FEF,
-  PREFIX_EVEX_0F380D,
   PREFIX_EVEX_0F3810,
   PREFIX_EVEX_0F3811,
   PREFIX_EVEX_0F3812,
   PREFIX_EVEX_0F3813,
   PREFIX_EVEX_0F3814,
   PREFIX_EVEX_0F3815,
-  PREFIX_EVEX_0F3816,
-  PREFIX_EVEX_0F3819,
-  PREFIX_EVEX_0F381A,
-  PREFIX_EVEX_0F381B,
-  PREFIX_EVEX_0F381E,
-  PREFIX_EVEX_0F381F,
   PREFIX_EVEX_0F3820,
   PREFIX_EVEX_0F3821,
   PREFIX_EVEX_0F3822,
@@ -1482,142 +1129,23 @@ enum
   PREFIX_EVEX_0F3828,
   PREFIX_EVEX_0F3829,
   PREFIX_EVEX_0F382A,
-  PREFIX_EVEX_0F382C,
-  PREFIX_EVEX_0F382D,
   PREFIX_EVEX_0F3830,
   PREFIX_EVEX_0F3831,
   PREFIX_EVEX_0F3832,
   PREFIX_EVEX_0F3833,
   PREFIX_EVEX_0F3834,
   PREFIX_EVEX_0F3835,
-  PREFIX_EVEX_0F3836,
-  PREFIX_EVEX_0F3837,
   PREFIX_EVEX_0F3838,
   PREFIX_EVEX_0F3839,
   PREFIX_EVEX_0F383A,
-  PREFIX_EVEX_0F383B,
-  PREFIX_EVEX_0F383D,
-  PREFIX_EVEX_0F383F,
-  PREFIX_EVEX_0F3840,
-  PREFIX_EVEX_0F3842,
-  PREFIX_EVEX_0F3843,
-  PREFIX_EVEX_0F3844,
-  PREFIX_EVEX_0F3845,
-  PREFIX_EVEX_0F3846,
-  PREFIX_EVEX_0F3847,
-  PREFIX_EVEX_0F384C,
-  PREFIX_EVEX_0F384D,
-  PREFIX_EVEX_0F384E,
-  PREFIX_EVEX_0F384F,
-  PREFIX_EVEX_0F3850,
-  PREFIX_EVEX_0F3851,
   PREFIX_EVEX_0F3852,
   PREFIX_EVEX_0F3853,
-  PREFIX_EVEX_0F3854,
-  PREFIX_EVEX_0F3855,
-  PREFIX_EVEX_0F3859,
-  PREFIX_EVEX_0F385A,
-  PREFIX_EVEX_0F385B,
-  PREFIX_EVEX_0F3862,
-  PREFIX_EVEX_0F3863,
-  PREFIX_EVEX_0F3864,
-  PREFIX_EVEX_0F3865,
-  PREFIX_EVEX_0F3866,
   PREFIX_EVEX_0F3868,
-  PREFIX_EVEX_0F3870,
-  PREFIX_EVEX_0F3871,
   PREFIX_EVEX_0F3872,
-  PREFIX_EVEX_0F3873,
-  PREFIX_EVEX_0F3875,
-  PREFIX_EVEX_0F3876,
-  PREFIX_EVEX_0F3877,
-  PREFIX_EVEX_0F387A,
-  PREFIX_EVEX_0F387B,
-  PREFIX_EVEX_0F387C,
-  PREFIX_EVEX_0F387D,
-  PREFIX_EVEX_0F387E,
-  PREFIX_EVEX_0F387F,
-  PREFIX_EVEX_0F3883,
-  PREFIX_EVEX_0F3888,
-  PREFIX_EVEX_0F3889,
-  PREFIX_EVEX_0F388A,
-  PREFIX_EVEX_0F388B,
-  PREFIX_EVEX_0F388D,
-  PREFIX_EVEX_0F388F,
-  PREFIX_EVEX_0F3890,
-  PREFIX_EVEX_0F3891,
-  PREFIX_EVEX_0F3892,
-  PREFIX_EVEX_0F3893,
   PREFIX_EVEX_0F389A,
   PREFIX_EVEX_0F389B,
-  PREFIX_EVEX_0F38A0,
-  PREFIX_EVEX_0F38A1,
-  PREFIX_EVEX_0F38A2,
-  PREFIX_EVEX_0F38A3,
   PREFIX_EVEX_0F38AA,
   PREFIX_EVEX_0F38AB,
-  PREFIX_EVEX_0F38B4,
-  PREFIX_EVEX_0F38B5,
-  PREFIX_EVEX_0F38C4,
-  PREFIX_EVEX_0F38C6_REG_1,
-  PREFIX_EVEX_0F38C6_REG_2,
-  PREFIX_EVEX_0F38C6_REG_5,
-  PREFIX_EVEX_0F38C6_REG_6,
-  PREFIX_EVEX_0F38C7_REG_1,
-  PREFIX_EVEX_0F38C7_REG_2,
-  PREFIX_EVEX_0F38C7_REG_5,
-  PREFIX_EVEX_0F38C7_REG_6,
-  PREFIX_EVEX_0F38C8,
-  PREFIX_EVEX_0F38CA,
-  PREFIX_EVEX_0F38CB,
-  PREFIX_EVEX_0F38CC,
-  PREFIX_EVEX_0F38CD,
-
-  PREFIX_EVEX_0F3A00,
-  PREFIX_EVEX_0F3A01,
-  PREFIX_EVEX_0F3A03,
-  PREFIX_EVEX_0F3A05,
-  PREFIX_EVEX_0F3A08,
-  PREFIX_EVEX_0F3A09,
-  PREFIX_EVEX_0F3A0A,
-  PREFIX_EVEX_0F3A0B,
-  PREFIX_EVEX_0F3A14,
-  PREFIX_EVEX_0F3A15,
-  PREFIX_EVEX_0F3A16,
-  PREFIX_EVEX_0F3A17,
-  PREFIX_EVEX_0F3A18,
-  PREFIX_EVEX_0F3A19,
-  PREFIX_EVEX_0F3A1A,
-  PREFIX_EVEX_0F3A1B,
-  PREFIX_EVEX_0F3A1E,
-  PREFIX_EVEX_0F3A1F,
-  PREFIX_EVEX_0F3A20,
-  PREFIX_EVEX_0F3A21,
-  PREFIX_EVEX_0F3A22,
-  PREFIX_EVEX_0F3A23,
-  PREFIX_EVEX_0F3A25,
-  PREFIX_EVEX_0F3A26,
-  PREFIX_EVEX_0F3A27,
-  PREFIX_EVEX_0F3A38,
-  PREFIX_EVEX_0F3A39,
-  PREFIX_EVEX_0F3A3A,
-  PREFIX_EVEX_0F3A3B,
-  PREFIX_EVEX_0F3A3E,
-  PREFIX_EVEX_0F3A3F,
-  PREFIX_EVEX_0F3A42,
-  PREFIX_EVEX_0F3A43,
-  PREFIX_EVEX_0F3A50,
-  PREFIX_EVEX_0F3A51,
-  PREFIX_EVEX_0F3A54,
-  PREFIX_EVEX_0F3A55,
-  PREFIX_EVEX_0F3A56,
-  PREFIX_EVEX_0F3A57,
-  PREFIX_EVEX_0F3A66,
-  PREFIX_EVEX_0F3A67,
-  PREFIX_EVEX_0F3A70,
-  PREFIX_EVEX_0F3A71,
-  PREFIX_EVEX_0F3A72,
-  PREFIX_EVEX_0F3A73,
 };
 
 enum
@@ -1714,7 +1242,7 @@ enum
   VEX_LEN_0F4A_P_2,
   VEX_LEN_0F4B_P_0,
   VEX_LEN_0F4B_P_2,
-  VEX_LEN_0F6E_P_2,
+  VEX_LEN_0F6E,
   VEX_LEN_0F77_P_0,
   VEX_LEN_0F7E_P_1,
   VEX_LEN_0F7E_P_2,
@@ -1734,15 +1262,15 @@ enum
   VEX_LEN_0F99_P_2,
   VEX_LEN_0FAE_R_2_M_0,
   VEX_LEN_0FAE_R_3_M_0,
-  VEX_LEN_0FC4_P_2,
-  VEX_LEN_0FC5_P_2,
-  VEX_LEN_0FD6_P_2,
-  VEX_LEN_0FF7_P_2,
-  VEX_LEN_0F3816_P_2,
-  VEX_LEN_0F3819_P_2,
-  VEX_LEN_0F381A_P_2_M_0,
-  VEX_LEN_0F3836_P_2,
-  VEX_LEN_0F3841_P_2,
+  VEX_LEN_0FC4,
+  VEX_LEN_0FC5,
+  VEX_LEN_0FD6,
+  VEX_LEN_0FF7,
+  VEX_LEN_0F3816,
+  VEX_LEN_0F3819,
+  VEX_LEN_0F381A_M_0,
+  VEX_LEN_0F3836,
+  VEX_LEN_0F3841,
   VEX_LEN_0F3849_X86_64_P_0_W_0_M_0,
   VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0,
   VEX_LEN_0F3849_X86_64_P_2_W_0_M_0,
@@ -1750,13 +1278,13 @@ enum
   VEX_LEN_0F384B_X86_64_P_1_W_0_M_0,
   VEX_LEN_0F384B_X86_64_P_2_W_0_M_0,
   VEX_LEN_0F384B_X86_64_P_3_W_0_M_0,
-  VEX_LEN_0F385A_P_2_M_0,
+  VEX_LEN_0F385A_M_0,
   VEX_LEN_0F385C_X86_64_P_1_W_0_M_0,
   VEX_LEN_0F385E_X86_64_P_0_W_0_M_0,
   VEX_LEN_0F385E_X86_64_P_1_W_0_M_0,
   VEX_LEN_0F385E_X86_64_P_2_W_0_M_0,
   VEX_LEN_0F385E_X86_64_P_3_W_0_M_0,
-  VEX_LEN_0F38DB_P_2,
+  VEX_LEN_0F38DB,
   VEX_LEN_0F38F2_P_0,
   VEX_LEN_0F38F3_R_1_P_0,
   VEX_LEN_0F38F3_R_2_P_0,
@@ -1769,31 +1297,31 @@ enum
   VEX_LEN_0F38F7_P_1,
   VEX_LEN_0F38F7_P_2,
   VEX_LEN_0F38F7_P_3,
-  VEX_LEN_0F3A00_P_2,
-  VEX_LEN_0F3A01_P_2,
-  VEX_LEN_0F3A06_P_2,
-  VEX_LEN_0F3A14_P_2,
-  VEX_LEN_0F3A15_P_2,
-  VEX_LEN_0F3A16_P_2,
-  VEX_LEN_0F3A17_P_2,
-  VEX_LEN_0F3A18_P_2,
-  VEX_LEN_0F3A19_P_2,
-  VEX_LEN_0F3A20_P_2,
-  VEX_LEN_0F3A21_P_2,
-  VEX_LEN_0F3A22_P_2,
-  VEX_LEN_0F3A30_P_2,
-  VEX_LEN_0F3A31_P_2,
-  VEX_LEN_0F3A32_P_2,
-  VEX_LEN_0F3A33_P_2,
-  VEX_LEN_0F3A38_P_2,
-  VEX_LEN_0F3A39_P_2,
-  VEX_LEN_0F3A41_P_2,
-  VEX_LEN_0F3A46_P_2,
-  VEX_LEN_0F3A60_P_2,
-  VEX_LEN_0F3A61_P_2,
-  VEX_LEN_0F3A62_P_2,
-  VEX_LEN_0F3A63_P_2,
-  VEX_LEN_0F3ADF_P_2,
+  VEX_LEN_0F3A00,
+  VEX_LEN_0F3A01,
+  VEX_LEN_0F3A06,
+  VEX_LEN_0F3A14,
+  VEX_LEN_0F3A15,
+  VEX_LEN_0F3A16,
+  VEX_LEN_0F3A17,
+  VEX_LEN_0F3A18,
+  VEX_LEN_0F3A19,
+  VEX_LEN_0F3A20,
+  VEX_LEN_0F3A21,
+  VEX_LEN_0F3A22,
+  VEX_LEN_0F3A30,
+  VEX_LEN_0F3A31,
+  VEX_LEN_0F3A32,
+  VEX_LEN_0F3A33,
+  VEX_LEN_0F3A38,
+  VEX_LEN_0F3A39,
+  VEX_LEN_0F3A41,
+  VEX_LEN_0F3A46,
+  VEX_LEN_0F3A60,
+  VEX_LEN_0F3A61,
+  VEX_LEN_0F3A62,
+  VEX_LEN_0F3A63,
+  VEX_LEN_0F3ADF,
   VEX_LEN_0F3AF0_P_3,
   VEX_LEN_0FXOP_08_85,
   VEX_LEN_0FXOP_08_86,
@@ -1857,65 +1385,65 @@ enum
 
 enum
 {
-  EVEX_LEN_0F6E_P_2 = 0,
+  EVEX_LEN_0F6E = 0,
   EVEX_LEN_0F7E_P_1,
   EVEX_LEN_0F7E_P_2,
-  EVEX_LEN_0FC4_P_2,
-  EVEX_LEN_0FC5_P_2,
-  EVEX_LEN_0FD6_P_2,
-  EVEX_LEN_0F3816_P_2,
-  EVEX_LEN_0F3819_P_2_W_0,
-  EVEX_LEN_0F3819_P_2_W_1,
-  EVEX_LEN_0F381A_P_2_W_0_M_0,
-  EVEX_LEN_0F381A_P_2_W_1_M_0,
-  EVEX_LEN_0F381B_P_2_W_0_M_0,
-  EVEX_LEN_0F381B_P_2_W_1_M_0,
-  EVEX_LEN_0F3836_P_2,
-  EVEX_LEN_0F385A_P_2_W_0_M_0,
-  EVEX_LEN_0F385A_P_2_W_1_M_0,
-  EVEX_LEN_0F385B_P_2_W_0_M_0,
-  EVEX_LEN_0F385B_P_2_W_1_M_0,
-  EVEX_LEN_0F38C6_REG_1_PREFIX_2,
-  EVEX_LEN_0F38C6_REG_2_PREFIX_2,
-  EVEX_LEN_0F38C6_REG_5_PREFIX_2,
-  EVEX_LEN_0F38C6_REG_6_PREFIX_2,
-  EVEX_LEN_0F38C7_R_1_P_2_W_0,
-  EVEX_LEN_0F38C7_R_1_P_2_W_1,
-  EVEX_LEN_0F38C7_R_2_P_2_W_0,
-  EVEX_LEN_0F38C7_R_2_P_2_W_1,
-  EVEX_LEN_0F38C7_R_5_P_2_W_0,
-  EVEX_LEN_0F38C7_R_5_P_2_W_1,
-  EVEX_LEN_0F38C7_R_6_P_2_W_0,
-  EVEX_LEN_0F38C7_R_6_P_2_W_1,
-  EVEX_LEN_0F3A00_P_2_W_1,
-  EVEX_LEN_0F3A01_P_2_W_1,
-  EVEX_LEN_0F3A14_P_2,
-  EVEX_LEN_0F3A15_P_2,
-  EVEX_LEN_0F3A16_P_2,
-  EVEX_LEN_0F3A17_P_2,
-  EVEX_LEN_0F3A18_P_2_W_0,
-  EVEX_LEN_0F3A18_P_2_W_1,
-  EVEX_LEN_0F3A19_P_2_W_0,
-  EVEX_LEN_0F3A19_P_2_W_1,
-  EVEX_LEN_0F3A1A_P_2_W_0,
-  EVEX_LEN_0F3A1A_P_2_W_1,
-  EVEX_LEN_0F3A1B_P_2_W_0,
-  EVEX_LEN_0F3A1B_P_2_W_1,
-  EVEX_LEN_0F3A20_P_2,
-  EVEX_LEN_0F3A21_P_2_W_0,
-  EVEX_LEN_0F3A22_P_2,
-  EVEX_LEN_0F3A23_P_2_W_0,
-  EVEX_LEN_0F3A23_P_2_W_1,
-  EVEX_LEN_0F3A38_P_2_W_0,
-  EVEX_LEN_0F3A38_P_2_W_1,
-  EVEX_LEN_0F3A39_P_2_W_0,
-  EVEX_LEN_0F3A39_P_2_W_1,
-  EVEX_LEN_0F3A3A_P_2_W_0,
-  EVEX_LEN_0F3A3A_P_2_W_1,
-  EVEX_LEN_0F3A3B_P_2_W_0,
-  EVEX_LEN_0F3A3B_P_2_W_1,
-  EVEX_LEN_0F3A43_P_2_W_0,
-  EVEX_LEN_0F3A43_P_2_W_1
+  EVEX_LEN_0FC4,
+  EVEX_LEN_0FC5,
+  EVEX_LEN_0FD6,
+  EVEX_LEN_0F3816,
+  EVEX_LEN_0F3819_W_0,
+  EVEX_LEN_0F3819_W_1,
+  EVEX_LEN_0F381A_W_0_M_0,
+  EVEX_LEN_0F381A_W_1_M_0,
+  EVEX_LEN_0F381B_W_0_M_0,
+  EVEX_LEN_0F381B_W_1_M_0,
+  EVEX_LEN_0F3836,
+  EVEX_LEN_0F385A_W_0_M_0,
+  EVEX_LEN_0F385A_W_1_M_0,
+  EVEX_LEN_0F385B_W_0_M_0,
+  EVEX_LEN_0F385B_W_1_M_0,
+  EVEX_LEN_0F38C6_R_1_M_0,
+  EVEX_LEN_0F38C6_R_2_M_0,
+  EVEX_LEN_0F38C6_R_5_M_0,
+  EVEX_LEN_0F38C6_R_6_M_0,
+  EVEX_LEN_0F38C7_R_1_M_0_W_0,
+  EVEX_LEN_0F38C7_R_1_M_0_W_1,
+  EVEX_LEN_0F38C7_R_2_M_0_W_0,
+  EVEX_LEN_0F38C7_R_2_M_0_W_1,
+  EVEX_LEN_0F38C7_R_5_M_0_W_0,
+  EVEX_LEN_0F38C7_R_5_M_0_W_1,
+  EVEX_LEN_0F38C7_R_6_M_0_W_0,
+  EVEX_LEN_0F38C7_R_6_M_0_W_1,
+  EVEX_LEN_0F3A00_W_1,
+  EVEX_LEN_0F3A01_W_1,
+  EVEX_LEN_0F3A14,
+  EVEX_LEN_0F3A15,
+  EVEX_LEN_0F3A16,
+  EVEX_LEN_0F3A17,
+  EVEX_LEN_0F3A18_W_0,
+  EVEX_LEN_0F3A18_W_1,
+  EVEX_LEN_0F3A19_W_0,
+  EVEX_LEN_0F3A19_W_1,
+  EVEX_LEN_0F3A1A_W_0,
+  EVEX_LEN_0F3A1A_W_1,
+  EVEX_LEN_0F3A1B_W_0,
+  EVEX_LEN_0F3A1B_W_1,
+  EVEX_LEN_0F3A20,
+  EVEX_LEN_0F3A21_W_0,
+  EVEX_LEN_0F3A22,
+  EVEX_LEN_0F3A23_W_0,
+  EVEX_LEN_0F3A23_W_1,
+  EVEX_LEN_0F3A38_W_0,
+  EVEX_LEN_0F3A38_W_1,
+  EVEX_LEN_0F3A39_W_0,
+  EVEX_LEN_0F3A39_W_1,
+  EVEX_LEN_0F3A3A_W_0,
+  EVEX_LEN_0F3A3A_W_1,
+  EVEX_LEN_0F3A3B_W_0,
+  EVEX_LEN_0F3A3B_W_1,
+  EVEX_LEN_0F3A43_W_0,
+  EVEX_LEN_0F3A43_W_1
 };
 
 enum
@@ -1948,59 +1476,59 @@ enum
   VEX_W_0F98_P_2_LEN_0,
   VEX_W_0F99_P_0_LEN_0,
   VEX_W_0F99_P_2_LEN_0,
-  VEX_W_0F380C_P_2,
-  VEX_W_0F380D_P_2,
-  VEX_W_0F380E_P_2,
-  VEX_W_0F380F_P_2,
-  VEX_W_0F3813_P_2,
-  VEX_W_0F3816_P_2,
-  VEX_W_0F3818_P_2,
-  VEX_W_0F3819_P_2,
-  VEX_W_0F381A_P_2_M_0_L_0,
-  VEX_W_0F382C_P_2_M_0,
-  VEX_W_0F382D_P_2_M_0,
-  VEX_W_0F382E_P_2_M_0,
-  VEX_W_0F382F_P_2_M_0,
-  VEX_W_0F3836_P_2,
-  VEX_W_0F3846_P_2,
+  VEX_W_0F380C,
+  VEX_W_0F380D,
+  VEX_W_0F380E,
+  VEX_W_0F380F,
+  VEX_W_0F3813,
+  VEX_W_0F3816_L_1,
+  VEX_W_0F3818,
+  VEX_W_0F3819_L_1,
+  VEX_W_0F381A_M_0_L_1,
+  VEX_W_0F382C_M_0,
+  VEX_W_0F382D_M_0,
+  VEX_W_0F382E_M_0,
+  VEX_W_0F382F_M_0,
+  VEX_W_0F3836,
+  VEX_W_0F3846,
   VEX_W_0F3849_X86_64_P_0,
   VEX_W_0F3849_X86_64_P_2,
   VEX_W_0F3849_X86_64_P_3,
   VEX_W_0F384B_X86_64_P_1,
   VEX_W_0F384B_X86_64_P_2,
   VEX_W_0F384B_X86_64_P_3,
-  VEX_W_0F3858_P_2,
-  VEX_W_0F3859_P_2,
-  VEX_W_0F385A_P_2_M_0_L_0,
+  VEX_W_0F3858,
+  VEX_W_0F3859,
+  VEX_W_0F385A_M_0_L_0,
   VEX_W_0F385C_X86_64_P_1,
   VEX_W_0F385E_X86_64_P_0,
   VEX_W_0F385E_X86_64_P_1,
   VEX_W_0F385E_X86_64_P_2,
   VEX_W_0F385E_X86_64_P_3,
-  VEX_W_0F3878_P_2,
-  VEX_W_0F3879_P_2,
-  VEX_W_0F38CF_P_2,
-  VEX_W_0F3A00_P_2,
-  VEX_W_0F3A01_P_2,
-  VEX_W_0F3A02_P_2,
-  VEX_W_0F3A04_P_2,
-  VEX_W_0F3A05_P_2,
-  VEX_W_0F3A06_P_2_L_0,
-  VEX_W_0F3A18_P_2_L_0,
-  VEX_W_0F3A19_P_2_L_0,
-  VEX_W_0F3A1D_P_2,
-  VEX_W_0F3A30_P_2_LEN_0,
-  VEX_W_0F3A31_P_2_LEN_0,
-  VEX_W_0F3A32_P_2_LEN_0,
-  VEX_W_0F3A33_P_2_LEN_0,
-  VEX_W_0F3A38_P_2_L_0,
-  VEX_W_0F3A39_P_2_L_0,
-  VEX_W_0F3A46_P_2_L_0,
-  VEX_W_0F3A4A_P_2,
-  VEX_W_0F3A4B_P_2,
-  VEX_W_0F3A4C_P_2,
-  VEX_W_0F3ACE_P_2,
-  VEX_W_0F3ACF_P_2,
+  VEX_W_0F3878,
+  VEX_W_0F3879,
+  VEX_W_0F38CF,
+  VEX_W_0F3A00_L_1,
+  VEX_W_0F3A01_L_1,
+  VEX_W_0F3A02,
+  VEX_W_0F3A04,
+  VEX_W_0F3A05,
+  VEX_W_0F3A06_L_1,
+  VEX_W_0F3A18_L_1,
+  VEX_W_0F3A19_L_1,
+  VEX_W_0F3A1D,
+  VEX_W_0F3A30_L_0,
+  VEX_W_0F3A31_L_0,
+  VEX_W_0F3A32_L_0,
+  VEX_W_0F3A33_L_0,
+  VEX_W_0F3A38_L_1,
+  VEX_W_0F3A39_L_1,
+  VEX_W_0F3A46_L_1,
+  VEX_W_0F3A4A,
+  VEX_W_0F3A4B,
+  VEX_W_0F3A4C,
+  VEX_W_0F3ACE,
+  VEX_W_0F3ACF,
 
   VEX_W_0FXOP_08_85_L_0,
   VEX_W_0FXOP_08_86_L_0,
@@ -2079,7 +1607,7 @@ enum
   EVEX_W_0F5F_P_1,
   EVEX_W_0F5F_P_3,
   EVEX_W_0F62,
-  EVEX_W_0F66_P_2,
+  EVEX_W_0F66,
   EVEX_W_0F6A,
   EVEX_W_0F6B,
   EVEX_W_0F6C,
@@ -2088,11 +1616,11 @@ enum
   EVEX_W_0F6F_P_2,
   EVEX_W_0F6F_P_3,
   EVEX_W_0F70_P_2,
-  EVEX_W_0F72_R_2_P_2,
-  EVEX_W_0F72_R_6_P_2,
-  EVEX_W_0F73_R_2_P_2,
-  EVEX_W_0F73_R_6_P_2,
-  EVEX_W_0F76_P_2,
+  EVEX_W_0F72_R_2,
+  EVEX_W_0F72_R_6,
+  EVEX_W_0F73_R_2,
+  EVEX_W_0F73_R_6,
+  EVEX_W_0F76,
   EVEX_W_0F78_P_0,
   EVEX_W_0F78_P_2,
   EVEX_W_0F79_P_0,
@@ -2111,18 +1639,18 @@ enum
   EVEX_W_0FD2,
   EVEX_W_0FD3,
   EVEX_W_0FD4,
-  EVEX_W_0FD6_P_2,
+  EVEX_W_0FD6_L_0,
   EVEX_W_0FE6_P_1,
   EVEX_W_0FE6_P_2,
   EVEX_W_0FE6_P_3,
-  EVEX_W_0FE7_P_2,
+  EVEX_W_0FE7,
   EVEX_W_0FF2,
   EVEX_W_0FF3,
   EVEX_W_0FF4,
   EVEX_W_0FFA,
   EVEX_W_0FFB,
   EVEX_W_0FFE,
-  EVEX_W_0F380D_P_2,
+  EVEX_W_0F380D,
   EVEX_W_0F3810_P_1,
   EVEX_W_0F3810_P_2,
   EVEX_W_0F3811_P_1,
@@ -2133,11 +1661,11 @@ enum
   EVEX_W_0F3813_P_2,
   EVEX_W_0F3814_P_1,
   EVEX_W_0F3815_P_1,
-  EVEX_W_0F3819_P_2,
-  EVEX_W_0F381A_P_2,
-  EVEX_W_0F381B_P_2,
-  EVEX_W_0F381E_P_2,
-  EVEX_W_0F381F_P_2,
+  EVEX_W_0F3819,
+  EVEX_W_0F381A,
+  EVEX_W_0F381B,
+  EVEX_W_0F381E,
+  EVEX_W_0F381F,
   EVEX_W_0F3820_P_1,
   EVEX_W_0F3821_P_1,
   EVEX_W_0F3822_P_1,
@@ -2157,49 +1685,49 @@ enum
   EVEX_W_0F3834_P_1,
   EVEX_W_0F3835_P_1,
   EVEX_W_0F3835_P_2,
-  EVEX_W_0F3837_P_2,
+  EVEX_W_0F3837,
   EVEX_W_0F383A_P_1,
   EVEX_W_0F3852_P_1,
-  EVEX_W_0F3859_P_2,
-  EVEX_W_0F385A_P_2,
-  EVEX_W_0F385B_P_2,
-  EVEX_W_0F3870_P_2,
+  EVEX_W_0F3859,
+  EVEX_W_0F385A,
+  EVEX_W_0F385B,
+  EVEX_W_0F3870,
   EVEX_W_0F3872_P_1,
   EVEX_W_0F3872_P_2,
   EVEX_W_0F3872_P_3,
-  EVEX_W_0F387A_P_2,
-  EVEX_W_0F387B_P_2,
-  EVEX_W_0F3883_P_2,
-  EVEX_W_0F3891_P_2,
-  EVEX_W_0F3893_P_2,
-  EVEX_W_0F38A1_P_2,
-  EVEX_W_0F38A3_P_2,
-  EVEX_W_0F38C7_R_1_P_2,
-  EVEX_W_0F38C7_R_2_P_2,
-  EVEX_W_0F38C7_R_5_P_2,
-  EVEX_W_0F38C7_R_6_P_2,
+  EVEX_W_0F387A,
+  EVEX_W_0F387B,
+  EVEX_W_0F3883,
+  EVEX_W_0F3891,
+  EVEX_W_0F3893,
+  EVEX_W_0F38A1,
+  EVEX_W_0F38A3,
+  EVEX_W_0F38C7_R_1_M_0,
+  EVEX_W_0F38C7_R_2_M_0,
+  EVEX_W_0F38C7_R_5_M_0,
+  EVEX_W_0F38C7_R_6_M_0,
 
-  EVEX_W_0F3A00_P_2,
-  EVEX_W_0F3A01_P_2,
-  EVEX_W_0F3A05_P_2,
-  EVEX_W_0F3A08_P_2,
-  EVEX_W_0F3A09_P_2,
-  EVEX_W_0F3A0A_P_2,
-  EVEX_W_0F3A0B_P_2,
-  EVEX_W_0F3A18_P_2,
-  EVEX_W_0F3A19_P_2,
-  EVEX_W_0F3A1A_P_2,
-  EVEX_W_0F3A1B_P_2,
-  EVEX_W_0F3A21_P_2,
-  EVEX_W_0F3A23_P_2,
-  EVEX_W_0F3A38_P_2,
-  EVEX_W_0F3A39_P_2,
-  EVEX_W_0F3A3A_P_2,
-  EVEX_W_0F3A3B_P_2,
-  EVEX_W_0F3A42_P_2,
-  EVEX_W_0F3A43_P_2,
-  EVEX_W_0F3A70_P_2,
-  EVEX_W_0F3A72_P_2,
+  EVEX_W_0F3A00,
+  EVEX_W_0F3A01,
+  EVEX_W_0F3A05,
+  EVEX_W_0F3A08,
+  EVEX_W_0F3A09,
+  EVEX_W_0F3A0A,
+  EVEX_W_0F3A0B,
+  EVEX_W_0F3A18,
+  EVEX_W_0F3A19,
+  EVEX_W_0F3A1A,
+  EVEX_W_0F3A1B,
+  EVEX_W_0F3A21,
+  EVEX_W_0F3A23,
+  EVEX_W_0F3A38,
+  EVEX_W_0F3A39,
+  EVEX_W_0F3A3A,
+  EVEX_W_0F3A3B,
+  EVEX_W_0F3A42,
+  EVEX_W_0F3A43,
+  EVEX_W_0F3A70,
+  EVEX_W_0F3A72,
 };
 
 typedef void (*op_rtn) (int bytemode, int sizeflag);
@@ -2696,8 +2224,8 @@ static const struct dis386 dis386_twobyt
   { "punpckhwd", { MX, EM }, PREFIX_OPCODE },
   { "punpckhdq", { MX, EM }, PREFIX_OPCODE },
   { "packssdw", { MX, EM }, PREFIX_OPCODE },
-  { PREFIX_TABLE (PREFIX_0F6C) },
-  { PREFIX_TABLE (PREFIX_0F6D) },
+  { "punpcklqdq", { XM, EXx }, PREFIX_DATA },
+  { "punpckhqdq", { XM, EXx }, PREFIX_DATA },
   { "movK", { MX, Edq }, PREFIX_OPCODE },
   { PREFIX_TABLE (PREFIX_0F6F) },
   /* 70 */
@@ -3826,20 +3354,6 @@ static const struct dis386 prefix_table[
     { "punpckldq",{ MX, EMx }, PREFIX_OPCODE },
   },
 
-  /* PREFIX_0F6C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "punpcklqdq", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F6D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "punpckhqdq", { XM, EXx }, PREFIX_OPCODE },
-  },
-
   /* PREFIX_0F6F */
   {
     { "movq", { MX, EM }, PREFIX_OPCODE },
@@ -3855,20 +3369,6 @@ static const struct dis386 prefix_table[
     { "pshuflw",{ XM, EXx, Ib }, PREFIX_OPCODE },
   },
 
-  /* PREFIX_0F73_REG_3 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "psrldq", { XS, Ib }, 0 },
-  },
-
-  /* PREFIX_0F73_REG_7 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pslldq", { XS, Ib }, 0 },
-  },
-
   /* PREFIX_0F78 */
   {
     {"vmread", { Em, Gm }, 0 },
@@ -4084,244 +3584,6 @@ static const struct dis386 prefix_table[
     { "maskmovdqu", { XM, XS }, PREFIX_OPCODE },
   },
 
-  /* PREFIX_0F3810 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pblendvb", { XM, EXx, XMM0 }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3814 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "blendvps", { XM, EXx, XMM0 }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3815 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "blendvpd", { XM, EXx, XMM0 }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3817 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "ptest",  { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3820 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmovsxbw", { XM, EXq }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3821 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmovsxbd", { XM, EXd }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3822 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmovsxbq", { XM, EXw }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3823 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmovsxwd", { XM, EXq }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3824 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmovsxwq", { XM, EXd }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3825 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmovsxdq", { XM, EXq }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3828 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmuldq", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3829 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pcmpeqq", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F382A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { MOD_TABLE (MOD_0F382A_PREFIX_2) },
-  },
-
-  /* PREFIX_0F382B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "packusdw", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3830 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmovzxbw", { XM, EXq }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3831 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmovzxbd", { XM, EXd }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3832 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmovzxbq", { XM, EXw }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3833 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmovzxwd", { XM, EXq }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3834 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmovzxwq", { XM, EXd }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3835 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmovzxdq", { XM, EXq }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3837 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pcmpgtq", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3838 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pminsb", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3839 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pminsd", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F383A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pminuw", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F383B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pminud", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F383C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmaxsb", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F383D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmaxsd", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F383E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmaxuw", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F383F */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmaxud", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3840 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pmulld", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3841 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "phminposuw", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3880 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "invept", { Gm, Mo }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3881 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "invvpid", { Gm, Mo }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3882 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "invpcid", { Gm, M }, PREFIX_OPCODE },
-  },
-
   /* PREFIX_0F38C8 */
   {
     { "sha1nexte", { XM, EXxmm }, PREFIX_OPCODE },
@@ -4352,48 +3614,6 @@ static const struct dis386 prefix_table[
     { "sha256msg2", { XM, EXxmm }, PREFIX_OPCODE },
   },
 
-  /* PREFIX_0F38CF */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "gf2p8mulb", { XM, EXxmm }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F38DB */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "aesimc", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F38DC */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "aesenc", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F38DD */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "aesenclast", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F38DE */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "aesdec", { XM, EXx }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F38DF */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "aesdeclast", { XM, EXx }, PREFIX_OPCODE },
-  },
-
   /* PREFIX_0F38F0 */
   {
     { "movbeS", { Gv, Mv }, PREFIX_OPCODE },
@@ -4410,13 +3630,6 @@ static const struct dis386 prefix_table[
     { "crc32Q", { Gdq, Ev }, PREFIX_OPCODE },
   },
 
-  /* PREFIX_0F38F5 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { MOD_TABLE (MOD_0F38F5_PREFIX_2) },
-  },
-
   /* PREFIX_0F38F6 */
   {
     { MOD_TABLE (MOD_0F38F6_PREFIX_0) },
@@ -4438,186 +3651,11 @@ static const struct dis386 prefix_table[
     { MOD_TABLE (MOD_0F38F9_PREFIX_0) },
   },
 
-  /* PREFIX_0F3A08 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "roundps", { XM, EXx, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A09 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "roundpd", { XM, EXx, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A0A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "roundss", { XM, EXd, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A0B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "roundsd", { XM, EXq, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A0C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "blendps", { XM, EXx, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A0D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "blendpd", { XM, EXx, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A0E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pblendw", { XM, EXx, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A14 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pextrb", { Edqb, XM, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A15 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pextrw", { Edqw, XM, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A16 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pextrK", { Edq, XM, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A17 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "extractps", { Edqd, XM, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A20 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pinsrb", { XM, Edqb, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A21 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "insertps", { XM, EXd, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A22 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pinsrK", { XM, Edq, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A40 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "dpps", { XM, EXx, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A41 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "dppd", { XM, EXx, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A42 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "mpsadbw", { XM, EXx, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A44 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pclmulqdq", { XM, EXx, PCLMUL }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A60 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pcmpestrm!%LQ", { XM, EXx, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A61 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pcmpestri!%LQ", { XM, EXx, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A62 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pcmpistrm", { XM, EXx, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3A63 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "pcmpistri", { XM, EXx, Ib }, PREFIX_OPCODE },
-  },
-
   /* PREFIX_0F3ACC */
   {
     { "sha1rnds4", { XM, EXxmm, Ib }, PREFIX_OPCODE },
   },
 
-  /* PREFIX_0F3ACE */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "gf2p8affineqb", { XM, EXxmm, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3ACF */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "gf2p8affineinvqb", { XM, EXxmm, Ib }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F3ADF */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "aeskeygenassist", { XM, EXx, Ib }, PREFIX_OPCODE },
-  },
-
   /* PREFIX_VEX_0F10 */
   {
     { "vmovups", { XM, EXx }, 0 },
@@ -4826,111 +3864,6 @@ static const struct dis386 prefix_table[
     { "vmaxsd", { XMScalar, VexScalar, EXxmm_mq }, 0 },
   },
 
-  /* PREFIX_VEX_0F60 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpunpcklbw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F61 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpunpcklwd", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F62 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpunpckldq", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F63 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpacksswb", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F64 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcmpgtb", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F65 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcmpgtw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F66 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcmpgtd", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F67 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpackuswb", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F68 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpunpckhbw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F69 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpunpckhwd", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F6A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpunpckhdq", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F6B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpackssdw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F6C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpunpcklqdq", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F6D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpunpckhqdq", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F6E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F6E_P_2) },
-  },
-
   /* PREFIX_VEX_0F6F */
   {
     { Bad_Opcode },
@@ -4946,97 +3879,6 @@ static const struct dis386 prefix_table[
     { "vpshuflw", { XM, EXx, Ib }, 0 },
   },
 
-  /* PREFIX_VEX_0F71_REG_2 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsrlw", { Vex, XS, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F71_REG_4 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsraw", { Vex, XS, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F71_REG_6 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsllw", { Vex, XS, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F72_REG_2 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsrld", { Vex, XS, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F72_REG_4 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsrad", { Vex, XS, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F72_REG_6 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpslld", { Vex, XS, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F73_REG_2 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsrlq", { Vex, XS, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F73_REG_3 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsrldq", { Vex, XS, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F73_REG_6 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsllq", { Vex, XS, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F73_REG_7 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpslldq", { Vex, XS, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F74 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcmpeqb", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F75 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcmpeqw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F76 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcmpeqd", { XM, Vex, EXx }, 0 },
-  },
-
   /* PREFIX_VEX_0F77 */
   {
     { VEX_LEN_TABLE (VEX_LEN_0F77_P_0) },
@@ -5124,20 +3966,6 @@ static const struct dis386 prefix_table[
     { "vcmpsd", { XMScalar, VexScalar, EXxmm_mq, CMP }, 0 },
   },
 
-  /* PREFIX_VEX_0FC4 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0FC4_P_2) },
-  },
-
-  /* PREFIX_VEX_0FC5 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0FC5_P_2) },
-  },
-
   /* PREFIX_VEX_0FD0 */
   {
     { Bad_Opcode },
@@ -5146,153 +3974,6 @@ static const struct dis386 prefix_table[
     { "vaddsubps", { XM, Vex, EXx }, 0 },
   },
 
-  /* PREFIX_VEX_0FD1 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsrlw", { XM, Vex, EXxmm }, 0 },
-  },
-
-  /* PREFIX_VEX_0FD2 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsrld", { XM, Vex, EXxmm }, 0 },
-  },
-
-  /* PREFIX_VEX_0FD3 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsrlq", { XM, Vex, EXxmm }, 0 },
-  },
-
-  /* PREFIX_VEX_0FD4 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpaddq", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FD5 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmullw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FD6 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0FD6_P_2) },
-  },
-
-  /* PREFIX_VEX_0FD7 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { MOD_TABLE (MOD_VEX_0FD7_PREFIX_2) },
-  },
-
-  /* PREFIX_VEX_0FD8 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsubusb", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FD9 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsubusw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FDA */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpminub", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FDB */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpand", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FDC */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpaddusb", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FDD */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpaddusw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FDE */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmaxub", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FDF */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpandn", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FE0 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpavgb", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FE1 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsraw", { XM, Vex, EXxmm }, 0 },
-  },
-
-  /* PREFIX_VEX_0FE2 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsrad", { XM, Vex, EXxmm }, 0 },
-  },
-
-  /* PREFIX_VEX_0FE3 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpavgw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FE4 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmulhuw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FE5 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmulhw", { XM, Vex, EXx }, 0 },
-  },
-
   /* PREFIX_VEX_0FE6 */
   {
     { Bad_Opcode },
@@ -5301,69 +3982,6 @@ static const struct dis386 prefix_table[
     { "vcvtpd2dq%XY", { XMM, EXx }, 0 },
   },
 
-  /* PREFIX_VEX_0FE7 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { MOD_TABLE (MOD_VEX_0FE7_PREFIX_2) },
-  },
-
-  /* PREFIX_VEX_0FE8 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsubsb", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FE9 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsubsw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FEA */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpminsw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FEB */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpor", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FEC */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpaddsb", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FED */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpaddsw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FEE */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmaxsw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FEF */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpxor", { XM, Vex, EXx }, 0 },
-  },
-
   /* PREFIX_VEX_0FF0 */
   {
     { Bad_Opcode },
@@ -5372,524 +3990,6 @@ static const struct dis386 prefix_table[
     { MOD_TABLE (MOD_VEX_0FF0_PREFIX_3) },
   },
 
-  /* PREFIX_VEX_0FF1 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsllw", { XM, Vex, EXxmm }, 0 },
-  },
-
-  /* PREFIX_VEX_0FF2 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpslld", { XM, Vex, EXxmm }, 0 },
-  },
-
-  /* PREFIX_VEX_0FF3 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsllq", { XM, Vex, EXxmm }, 0 },
-  },
-
-  /* PREFIX_VEX_0FF4 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmuludq", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FF5 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmaddwd", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FF6 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsadbw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FF7 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0FF7_P_2) },
-  },
-
-  /* PREFIX_VEX_0FF8 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsubb", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FF9 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsubw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FFA */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsubd", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FFB */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsubq", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FFC */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpaddb", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FFD */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpaddw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0FFE */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpaddd", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3800 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpshufb", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3801 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vphaddw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3802 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vphaddd", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3803 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vphaddsw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3804 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmaddubsw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3805 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vphsubw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3806 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vphsubd", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3807 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vphsubsw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3808 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsignb", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3809 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsignw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F380A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsignd", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F380B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmulhrsw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F380C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F380C_P_2) },
-  },
-
-  /* PREFIX_VEX_0F380D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F380D_P_2) },
-  },
-
-  /* PREFIX_VEX_0F380E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F380E_P_2) },
-  },
-
-  /* PREFIX_VEX_0F380F */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F380F_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3813 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3813_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3816 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3816_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3817 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vptest", { XM, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3818 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3818_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3819 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3819_P_2) },
-  },
-
-  /* PREFIX_VEX_0F381A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { MOD_TABLE (MOD_VEX_0F381A_PREFIX_2) },
-  },
-
-  /* PREFIX_VEX_0F381C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpabsb", { XM, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F381D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpabsw", { XM, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F381E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpabsd", { XM, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3820 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmovsxbw", { XM, EXxmmq }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3821 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmovsxbd", { XM, EXxmmqd }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3822 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmovsxbq", { XM, EXxmmdw }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3823 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmovsxwd", { XM, EXxmmq }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3824 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmovsxwq", { XM, EXxmmqd }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3825 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmovsxdq", { XM, EXxmmq }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3828 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmuldq", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3829 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcmpeqq", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F382A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { MOD_TABLE (MOD_VEX_0F382A_PREFIX_2) },
-  },
-
-  /* PREFIX_VEX_0F382B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpackusdw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F382C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-     { MOD_TABLE (MOD_VEX_0F382C_PREFIX_2) },
-  },
-
-  /* PREFIX_VEX_0F382D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-     { MOD_TABLE (MOD_VEX_0F382D_PREFIX_2) },
-  },
-
-  /* PREFIX_VEX_0F382E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-     { MOD_TABLE (MOD_VEX_0F382E_PREFIX_2) },
-  },
-
-  /* PREFIX_VEX_0F382F */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-     { MOD_TABLE (MOD_VEX_0F382F_PREFIX_2) },
-  },
-
-  /* PREFIX_VEX_0F3830 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmovzxbw", { XM, EXxmmq }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3831 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmovzxbd", { XM, EXxmmqd }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3832 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmovzxbq", { XM, EXxmmdw }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3833 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmovzxwd", { XM, EXxmmq }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3834 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmovzxwq", { XM, EXxmmqd }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3835 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmovzxdq", { XM, EXxmmq }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3836 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3836_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3837 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpcmpgtq", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3838 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpminsb", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3839 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpminsd", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F383A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpminuw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F383B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpminud", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F383C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmaxsb", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F383D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmaxsd", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F383E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmaxuw", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F383F */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmaxud", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3840 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpmulld", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3841 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3841_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3845 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsrlv%DQ", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3846 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3846_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3847 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpsllv%DQ", { XM, Vex, EXx }, 0 },
-  },
-
   /* PREFIX_VEX_0F3849_X86_64 */
   {
     { VEX_W_TABLE (VEX_W_0F3849_X86_64_P_0) },
@@ -5906,27 +4006,6 @@ static const struct dis386 prefix_table[
     { VEX_W_TABLE (VEX_W_0F384B_X86_64_P_3) },
   },
 
-  /* PREFIX_VEX_0F3858 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3858_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3859 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3859_P_2) },
-  },
-
-  /* PREFIX_VEX_0F385A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { MOD_TABLE (MOD_VEX_0F385A_PREFIX_2) },
-  },
-
   /* PREFIX_VEX_0F385C_X86_64 */
   {
     { Bad_Opcode },
@@ -5942,315 +4021,6 @@ static const struct dis386 prefix_table[
     { VEX_W_TABLE (VEX_W_0F385E_X86_64_P_3) },
   },
 
-  /* PREFIX_VEX_0F3878 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3878_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3879 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3879_P_2) },
-  },
-
-  /* PREFIX_VEX_0F388C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { MOD_TABLE (MOD_VEX_0F388C_PREFIX_2) },
-  },
-
-  /* PREFIX_VEX_0F388E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { MOD_TABLE (MOD_VEX_0F388E_PREFIX_2) },
-  },
-
-  /* PREFIX_VEX_0F3890 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpgatherd%DQ", { XM, MVexVSIBDWpX, Vex }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3891 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpgatherq%DQ", { XMGatherQ, MVexVSIBQWpX, VexGatherQ }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3892 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vgatherdp%XW", { XM, MVexVSIBDWpX, Vex }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3893 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vgatherqp%XW", { XMGatherQ, MVexVSIBQWpX, VexGatherQ }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3896 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmaddsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3897 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmsubadd132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3898 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmadd132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3899 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F389A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmsub132p%XW", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F389B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, 0 },
-  },
-
-  /* PREFIX_VEX_0F389C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmadd132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F389D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F389E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F389F */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38A6 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmaddsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-    { Bad_Opcode },
-  },
-
-  /* PREFIX_VEX_0F38A7 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmsubadd213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38A8 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmadd213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38A9 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38AA */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmsub213p%XW", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38AB */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38AC */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmadd213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38AD */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38AE */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38AF */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38B6 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmaddsub231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38B7 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmsubadd231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38B8 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmadd231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38B9 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38BA */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmsub231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38BB */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38BC */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmadd231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38BD */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38BE */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmsub231p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38BF */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38CF */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F38CF_P_2) },
-  },
-
-  /* PREFIX_VEX_0F38DB */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F38DB_P_2) },
-  },
-
-  /* PREFIX_VEX_0F38DC */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vaesenc", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38DD */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vaesenclast", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38DE */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vaesdec", { XM, Vex, EXx }, 0 },
-  },
-
-  /* PREFIX_VEX_0F38DF */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vaesdeclast", { XM, Vex, EXx }, 0 },
-  },
-
   /* PREFIX_VEX_0F38F2 */
   {
     { VEX_LEN_TABLE (VEX_LEN_0F38F2_P_0) },
@@ -6295,477 +4065,6 @@ static const struct dis386 prefix_table[
     { VEX_LEN_TABLE (VEX_LEN_0F38F7_P_3) },
   },
 
-  /* PREFIX_VEX_0F3A00 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A00_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A01 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A01_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A02 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A02_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A04 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A04_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A05 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A05_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A06 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A06_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A08 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vroundps", { XM, EXx, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A09 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vroundpd", { XM, EXx, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A0A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vroundss", { XMScalar, VexScalar, EXxmm_md, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A0B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vroundsd", { XMScalar, VexScalar, EXxmm_mq, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A0C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vblendps", { XM, Vex, EXx, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A0D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vblendpd", { XM, Vex, EXx, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A0E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpblendw", { XM, Vex, EXx, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A0F */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpalignr", { XM, Vex, EXx, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A14 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A14_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A15 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A15_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A16 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A16_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A17 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A17_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A18 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A18_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A19 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A19_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A1D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A1D_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A20 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A20_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A21 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A21_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A22 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A22_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A30 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A30_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A31 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A31_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A32 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A32_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A33 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A33_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A38 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A38_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A39 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A39_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A40 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vdpps", { XM, Vex, EXx, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A41 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A41_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A42 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vmpsadbw", { XM, Vex, EXx, Ib }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A44 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpclmulqdq", { XM, Vex, EXx, PCLMUL }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A46 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A46_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A48 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpermil2ps", { XM, Vex, EXx, XMVexI4, VexI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A49 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vpermil2pd", { XM, Vex, EXx, XMVexI4, VexI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A4A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A4A_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A4B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A4B_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A4C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A4C_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A5C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmaddsubps", { XM, Vex, EXx, XMVexI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A5D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmaddsubpd", { XM, Vex, EXx, XMVexI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A5E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmsubaddps", { XM, Vex, EXx, XMVexI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A5F */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmsubaddpd", { XM, Vex, EXx, XMVexI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A60 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A60_P_2) },
-    { Bad_Opcode },
-  },
-
-  /* PREFIX_VEX_0F3A61 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A61_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A62 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A62_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A63 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3A63_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3A68 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmaddps", { XM, Vex, EXx, XMVexI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A69 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmaddpd", { XM, Vex, EXx, XMVexI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A6A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmaddss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A6B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmaddsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A6C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmsubps", { XM, Vex, EXx, XMVexI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A6D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmsubpd", { XM, Vex, EXx, XMVexI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A6E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmsubss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A6F */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfmsubsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A78 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmaddps", { XM, Vex, EXx, XMVexI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A79 */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmaddpd", { XM, Vex, EXx, XMVexI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A7A */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmaddss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A7B */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmaddsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A7C */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmsubps", { XM, Vex, EXx, XMVexI4 }, 0 },
-    { Bad_Opcode },
-  },
-
-  /* PREFIX_VEX_0F3A7D */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmsubpd", { XM, Vex, EXx, XMVexI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A7E */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmsubss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3A7F */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { "vfnmsubsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, 0 },
-  },
-
-  /* PREFIX_VEX_0F3ACE */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3ACE_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3ACF */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3ACF_P_2) },
-  },
-
-  /* PREFIX_VEX_0F3ADF */
-  {
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { VEX_LEN_TABLE (VEX_LEN_0F3ADF_P_2) },
-  },
-
   /* PREFIX_VEX_0F3AF0 */
   {
     { Bad_Opcode },
@@ -7006,14 +4305,14 @@ static const struct dis386 three_byte_ta
     { Bad_Opcode },
     { Bad_Opcode },
     /* 10 */
-    { PREFIX_TABLE (PREFIX_0F3810) },
+    { "pblendvb", { XM, EXx, XMM0 }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_0F3814) },
-    { PREFIX_TABLE (PREFIX_0F3815) },
+    { "blendvps", { XM, EXx, XMM0 }, PREFIX_DATA },
+    { "blendvpd", { XM, EXx, XMM0 }, PREFIX_DATA },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_0F3817) },
+    { "ptest",  { XM, EXx }, PREFIX_DATA },
     /* 18 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -7024,44 +4323,44 @@ static const struct dis386 three_byte_ta
     { "pabsd", { MX, EM }, PREFIX_OPCODE },
     { Bad_Opcode },
     /* 20 */
-    { PREFIX_TABLE (PREFIX_0F3820) },
-    { PREFIX_TABLE (PREFIX_0F3821) },
-    { PREFIX_TABLE (PREFIX_0F3822) },
-    { PREFIX_TABLE (PREFIX_0F3823) },
-    { PREFIX_TABLE (PREFIX_0F3824) },
-    { PREFIX_TABLE (PREFIX_0F3825) },
+    { "pmovsxbw", { XM, EXq }, PREFIX_DATA },
+    { "pmovsxbd", { XM, EXd }, PREFIX_DATA },
+    { "pmovsxbq", { XM, EXw }, PREFIX_DATA },
+    { "pmovsxwd", { XM, EXq }, PREFIX_DATA },
+    { "pmovsxwq", { XM, EXd }, PREFIX_DATA },
+    { "pmovsxdq", { XM, EXq }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     /* 28 */
-    { PREFIX_TABLE (PREFIX_0F3828) },
-    { PREFIX_TABLE (PREFIX_0F3829) },
-    { PREFIX_TABLE (PREFIX_0F382A) },
-    { PREFIX_TABLE (PREFIX_0F382B) },
+    { "pmuldq", { XM, EXx }, PREFIX_DATA },
+    { "pcmpeqq", { XM, EXx }, PREFIX_DATA },
+    { MOD_TABLE (MOD_0F382A) },
+    { "packusdw", { XM, EXx }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
     /* 30 */
-    { PREFIX_TABLE (PREFIX_0F3830) },
-    { PREFIX_TABLE (PREFIX_0F3831) },
-    { PREFIX_TABLE (PREFIX_0F3832) },
-    { PREFIX_TABLE (PREFIX_0F3833) },
-    { PREFIX_TABLE (PREFIX_0F3834) },
-    { PREFIX_TABLE (PREFIX_0F3835) },
+    { "pmovzxbw", { XM, EXq }, PREFIX_DATA },
+    { "pmovzxbd", { XM, EXd }, PREFIX_DATA },
+    { "pmovzxbq", { XM, EXw }, PREFIX_DATA },
+    { "pmovzxwd", { XM, EXq }, PREFIX_DATA },
+    { "pmovzxwq", { XM, EXd }, PREFIX_DATA },
+    { "pmovzxdq", { XM, EXq }, PREFIX_DATA },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_0F3837) },
+    { "pcmpgtq", { XM, EXx }, PREFIX_DATA },
     /* 38 */
-    { PREFIX_TABLE (PREFIX_0F3838) },
-    { PREFIX_TABLE (PREFIX_0F3839) },
-    { PREFIX_TABLE (PREFIX_0F383A) },
-    { PREFIX_TABLE (PREFIX_0F383B) },
-    { PREFIX_TABLE (PREFIX_0F383C) },
-    { PREFIX_TABLE (PREFIX_0F383D) },
-    { PREFIX_TABLE (PREFIX_0F383E) },
-    { PREFIX_TABLE (PREFIX_0F383F) },
+    { "pminsb", { XM, EXx }, PREFIX_DATA },
+    { "pminsd", { XM, EXx }, PREFIX_DATA },
+    { "pminuw", { XM, EXx }, PREFIX_DATA },
+    { "pminud", { XM, EXx }, PREFIX_DATA },
+    { "pmaxsb", { XM, EXx }, PREFIX_DATA },
+    { "pmaxsd", { XM, EXx }, PREFIX_DATA },
+    { "pmaxuw", { XM, EXx }, PREFIX_DATA },
+    { "pmaxud", { XM, EXx }, PREFIX_DATA },
     /* 40 */
-    { PREFIX_TABLE (PREFIX_0F3840) },
-    { PREFIX_TABLE (PREFIX_0F3841) },
+    { "pmulld", { XM, EXx }, PREFIX_DATA },
+    { "phminposuw", { XM, EXx }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -7132,9 +4431,9 @@ static const struct dis386 three_byte_ta
     { Bad_Opcode },
     { Bad_Opcode },
     /* 80 */
-    { PREFIX_TABLE (PREFIX_0F3880) },
-    { PREFIX_TABLE (PREFIX_0F3881) },
-    { PREFIX_TABLE (PREFIX_0F3882) },
+    { "invept", { Gm, Mo }, PREFIX_DATA },
+    { "invvpid", { Gm, Mo }, PREFIX_DATA },
+    { "invpcid", { Gm, M }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -7220,7 +4519,7 @@ static const struct dis386 three_byte_ta
     { PREFIX_TABLE (PREFIX_0F38CC) },
     { PREFIX_TABLE (PREFIX_0F38CD) },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_0F38CF) },
+    { "gf2p8mulb", { XM, EXxmm }, PREFIX_DATA },
     /* d0 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -7234,11 +4533,11 @@ static const struct dis386 three_byte_ta
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_0F38DB) },
-    { PREFIX_TABLE (PREFIX_0F38DC) },
-    { PREFIX_TABLE (PREFIX_0F38DD) },
-    { PREFIX_TABLE (PREFIX_0F38DE) },
-    { PREFIX_TABLE (PREFIX_0F38DF) },
+    { "aesimc", { XM, EXx }, PREFIX_DATA },
+    { "aesenc", { XM, EXx }, PREFIX_DATA },
+    { "aesenclast", { XM, EXx }, PREFIX_DATA },
+    { "aesdec", { XM, EXx }, PREFIX_DATA },
+    { "aesdeclast", { XM, EXx }, PREFIX_DATA },
     /* e0 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -7263,7 +4562,7 @@ static const struct dis386 three_byte_ta
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_0F38F5) },
+    { MOD_TABLE (MOD_0F38F5) },
     { PREFIX_TABLE (PREFIX_0F38F6) },
     { Bad_Opcode },
     /* f8 */
@@ -7288,23 +4587,23 @@ static const struct dis386 three_byte_ta
     { Bad_Opcode },
     { Bad_Opcode },
     /* 08 */
-    { PREFIX_TABLE (PREFIX_0F3A08) },
-    { PREFIX_TABLE (PREFIX_0F3A09) },
-    { PREFIX_TABLE (PREFIX_0F3A0A) },
-    { PREFIX_TABLE (PREFIX_0F3A0B) },
-    { PREFIX_TABLE (PREFIX_0F3A0C) },
-    { PREFIX_TABLE (PREFIX_0F3A0D) },
-    { PREFIX_TABLE (PREFIX_0F3A0E) },
+    { "roundps", { XM, EXx, Ib }, PREFIX_DATA },
+    { "roundpd", { XM, EXx, Ib }, PREFIX_DATA },
+    { "roundss", { XM, EXd, Ib }, PREFIX_DATA },
+    { "roundsd", { XM, EXq, Ib }, PREFIX_DATA },
+    { "blendps", { XM, EXx, Ib }, PREFIX_DATA },
+    { "blendpd", { XM, EXx, Ib }, PREFIX_DATA },
+    { "pblendw", { XM, EXx, Ib }, PREFIX_DATA },
     { "palignr", { MX, EM, Ib }, PREFIX_OPCODE },
     /* 10 */
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_0F3A14) },
-    { PREFIX_TABLE (PREFIX_0F3A15) },
-    { PREFIX_TABLE (PREFIX_0F3A16) },
-    { PREFIX_TABLE (PREFIX_0F3A17) },
+    { "pextrb", { Edqb, XM, Ib }, PREFIX_DATA },
+    { "pextrw", { Edqw, XM, Ib }, PREFIX_DATA },
+    { "pextrK", { Edq, XM, Ib }, PREFIX_DATA },
+    { "extractps", { Edqd, XM, Ib }, PREFIX_DATA },
     /* 18 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -7315,9 +4614,9 @@ static const struct dis386 three_byte_ta
     { Bad_Opcode },
     { Bad_Opcode },
     /* 20 */
-    { PREFIX_TABLE (PREFIX_0F3A20) },
-    { PREFIX_TABLE (PREFIX_0F3A21) },
-    { PREFIX_TABLE (PREFIX_0F3A22) },
+    { "pinsrb", { XM, Edqb, Ib }, PREFIX_DATA },
+    { "insertps", { XM, EXd, Ib }, PREFIX_DATA },
+    { "pinsrK", { XM, Edq, Ib }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -7351,11 +4650,11 @@ static const struct dis386 three_byte_ta
     { Bad_Opcode },
     { Bad_Opcode },
     /* 40 */
-    { PREFIX_TABLE (PREFIX_0F3A40) },
-    { PREFIX_TABLE (PREFIX_0F3A41) },
-    { PREFIX_TABLE (PREFIX_0F3A42) },
+    { "dpps", { XM, EXx, Ib }, PREFIX_DATA },
+    { "dppd", { XM, EXx, Ib }, PREFIX_DATA },
+    { "mpsadbw", { XM, EXx, Ib }, PREFIX_DATA },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_0F3A44) },
+    { "pclmulqdq", { XM, EXx, PCLMUL }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -7387,10 +4686,10 @@ static const struct dis386 three_byte_ta
     { Bad_Opcode },
     { Bad_Opcode },
     /* 60 */
-    { PREFIX_TABLE (PREFIX_0F3A60) },
-    { PREFIX_TABLE (PREFIX_0F3A61) },
-    { PREFIX_TABLE (PREFIX_0F3A62) },
-    { PREFIX_TABLE (PREFIX_0F3A63) },
+    { "pcmpestrm!%LQ", { XM, EXx, Ib }, PREFIX_DATA },
+    { "pcmpestri!%LQ", { XM, EXx, Ib }, PREFIX_DATA },
+    { "pcmpistrm", { XM, EXx, Ib }, PREFIX_DATA },
+    { "pcmpistri", { XM, EXx, Ib }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -7510,8 +4809,8 @@ static const struct dis386 three_byte_ta
     { Bad_Opcode },
     { PREFIX_TABLE (PREFIX_0F3ACC) },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_0F3ACE) },
-    { PREFIX_TABLE (PREFIX_0F3ACF) },
+    { "gf2p8affineqb", { XM, EXxmm, Ib }, PREFIX_DATA },
+    { "gf2p8affineinvqb", { XM, EXxmm, Ib }, PREFIX_DATA },
     /* d0 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -7529,7 +4828,7 @@ static const struct dis386 three_byte_ta
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_0F3ADF) },
+    { "aeskeygenassist", { XM, EXx, Ib }, PREFIX_DATA },
     /* e0 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -8557,31 +5856,31 @@ static const struct dis386 vex_table[][2
     { PREFIX_TABLE (PREFIX_VEX_0F5E) },
     { PREFIX_TABLE (PREFIX_VEX_0F5F) },
     /* 60 */
-    { PREFIX_TABLE (PREFIX_VEX_0F60) },
-    { PREFIX_TABLE (PREFIX_VEX_0F61) },
-    { PREFIX_TABLE (PREFIX_VEX_0F62) },
-    { PREFIX_TABLE (PREFIX_VEX_0F63) },
-    { PREFIX_TABLE (PREFIX_VEX_0F64) },
-    { PREFIX_TABLE (PREFIX_VEX_0F65) },
-    { PREFIX_TABLE (PREFIX_VEX_0F66) },
-    { PREFIX_TABLE (PREFIX_VEX_0F67) },
+    { "vpunpcklbw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpunpcklwd", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpunpckldq", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpacksswb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpcmpgtb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpcmpgtw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpcmpgtd", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpackuswb", { XM, Vex, EXx }, PREFIX_DATA },
     /* 68 */
-    { PREFIX_TABLE (PREFIX_VEX_0F68) },
-    { PREFIX_TABLE (PREFIX_VEX_0F69) },
-    { PREFIX_TABLE (PREFIX_VEX_0F6A) },
-    { PREFIX_TABLE (PREFIX_VEX_0F6B) },
-    { PREFIX_TABLE (PREFIX_VEX_0F6C) },
-    { PREFIX_TABLE (PREFIX_VEX_0F6D) },
-    { PREFIX_TABLE (PREFIX_VEX_0F6E) },
+    { "vpunpckhbw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpunpckhwd", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpunpckhdq", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpackssdw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpunpcklqdq", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpunpckhqdq", { XM, Vex, EXx }, PREFIX_DATA },
+    { VEX_LEN_TABLE (VEX_LEN_0F6E) },
     { PREFIX_TABLE (PREFIX_VEX_0F6F) },
     /* 70 */
     { PREFIX_TABLE (PREFIX_VEX_0F70) },
     { REG_TABLE (REG_VEX_0F71) },
     { REG_TABLE (REG_VEX_0F72) },
     { REG_TABLE (REG_VEX_0F73) },
-    { PREFIX_TABLE (PREFIX_VEX_0F74) },
-    { PREFIX_TABLE (PREFIX_VEX_0F75) },
-    { PREFIX_TABLE (PREFIX_VEX_0F76) },
+    { "vpcmpeqb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpcmpeqw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpcmpeqd", { XM, Vex, EXx }, PREFIX_DATA },
     { PREFIX_TABLE (PREFIX_VEX_0F77) },
     /* 78 */
     { Bad_Opcode },
@@ -8669,8 +5968,8 @@ static const struct dis386 vex_table[][2
     { Bad_Opcode },
     { PREFIX_TABLE (PREFIX_VEX_0FC2) },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0FC4) },
-    { PREFIX_TABLE (PREFIX_VEX_0FC5) },
+    { VEX_LEN_TABLE (VEX_LEN_0FC4) },
+    { VEX_LEN_TABLE (VEX_LEN_0FC5) },
     { "vshufpX", { XM, Vex, EXx, Ib }, PREFIX_OPCODE },
     { Bad_Opcode },
     /* c8 */
@@ -8684,142 +5983,142 @@ static const struct dis386 vex_table[][2
     { Bad_Opcode },
     /* d0 */
     { PREFIX_TABLE (PREFIX_VEX_0FD0) },
-    { PREFIX_TABLE (PREFIX_VEX_0FD1) },
-    { PREFIX_TABLE (PREFIX_VEX_0FD2) },
-    { PREFIX_TABLE (PREFIX_VEX_0FD3) },
-    { PREFIX_TABLE (PREFIX_VEX_0FD4) },
-    { PREFIX_TABLE (PREFIX_VEX_0FD5) },
-    { PREFIX_TABLE (PREFIX_VEX_0FD6) },
-    { PREFIX_TABLE (PREFIX_VEX_0FD7) },
+    { "vpsrlw", { XM, Vex, EXxmm }, PREFIX_DATA },
+    { "vpsrld", { XM, Vex, EXxmm }, PREFIX_DATA },
+    { "vpsrlq", { XM, Vex, EXxmm }, PREFIX_DATA },
+    { "vpaddq", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmullw", { XM, Vex, EXx }, PREFIX_DATA },
+    { VEX_LEN_TABLE (VEX_LEN_0FD6) },
+    { MOD_TABLE (MOD_VEX_0FD7) },
     /* d8 */
-    { PREFIX_TABLE (PREFIX_VEX_0FD8) },
-    { PREFIX_TABLE (PREFIX_VEX_0FD9) },
-    { PREFIX_TABLE (PREFIX_VEX_0FDA) },
-    { PREFIX_TABLE (PREFIX_VEX_0FDB) },
-    { PREFIX_TABLE (PREFIX_VEX_0FDC) },
-    { PREFIX_TABLE (PREFIX_VEX_0FDD) },
-    { PREFIX_TABLE (PREFIX_VEX_0FDE) },
-    { PREFIX_TABLE (PREFIX_VEX_0FDF) },
+    { "vpsubusb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpsubusw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpminub", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpand", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpaddusb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpaddusw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmaxub", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpandn", { XM, Vex, EXx }, PREFIX_DATA },
     /* e0 */
-    { PREFIX_TABLE (PREFIX_VEX_0FE0) },
-    { PREFIX_TABLE (PREFIX_VEX_0FE1) },
-    { PREFIX_TABLE (PREFIX_VEX_0FE2) },
-    { PREFIX_TABLE (PREFIX_VEX_0FE3) },
-    { PREFIX_TABLE (PREFIX_VEX_0FE4) },
-    { PREFIX_TABLE (PREFIX_VEX_0FE5) },
+    { "vpavgb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpsraw", { XM, Vex, EXxmm }, PREFIX_DATA },
+    { "vpsrad", { XM, Vex, EXxmm }, PREFIX_DATA },
+    { "vpavgw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmulhuw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmulhw", { XM, Vex, EXx }, PREFIX_DATA },
     { PREFIX_TABLE (PREFIX_VEX_0FE6) },
-    { PREFIX_TABLE (PREFIX_VEX_0FE7) },
+    { MOD_TABLE (MOD_VEX_0FE7) },
     /* e8 */
-    { PREFIX_TABLE (PREFIX_VEX_0FE8) },
-    { PREFIX_TABLE (PREFIX_VEX_0FE9) },
-    { PREFIX_TABLE (PREFIX_VEX_0FEA) },
-    { PREFIX_TABLE (PREFIX_VEX_0FEB) },
-    { PREFIX_TABLE (PREFIX_VEX_0FEC) },
-    { PREFIX_TABLE (PREFIX_VEX_0FED) },
-    { PREFIX_TABLE (PREFIX_VEX_0FEE) },
-    { PREFIX_TABLE (PREFIX_VEX_0FEF) },
+    { "vpsubsb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpsubsw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpminsw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpor", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpaddsb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpaddsw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmaxsw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpxor", { XM, Vex, EXx }, PREFIX_DATA },
     /* f0 */
     { PREFIX_TABLE (PREFIX_VEX_0FF0) },
-    { PREFIX_TABLE (PREFIX_VEX_0FF1) },
-    { PREFIX_TABLE (PREFIX_VEX_0FF2) },
-    { PREFIX_TABLE (PREFIX_VEX_0FF3) },
-    { PREFIX_TABLE (PREFIX_VEX_0FF4) },
-    { PREFIX_TABLE (PREFIX_VEX_0FF5) },
-    { PREFIX_TABLE (PREFIX_VEX_0FF6) },
-    { PREFIX_TABLE (PREFIX_VEX_0FF7) },
+    { "vpsllw", { XM, Vex, EXxmm }, PREFIX_DATA },
+    { "vpslld", { XM, Vex, EXxmm }, PREFIX_DATA },
+    { "vpsllq", { XM, Vex, EXxmm }, PREFIX_DATA },
+    { "vpmuludq", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmaddwd", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpsadbw", { XM, Vex, EXx }, PREFIX_DATA },
+    { VEX_LEN_TABLE (VEX_LEN_0FF7) },
     /* f8 */
-    { PREFIX_TABLE (PREFIX_VEX_0FF8) },
-    { PREFIX_TABLE (PREFIX_VEX_0FF9) },
-    { PREFIX_TABLE (PREFIX_VEX_0FFA) },
-    { PREFIX_TABLE (PREFIX_VEX_0FFB) },
-    { PREFIX_TABLE (PREFIX_VEX_0FFC) },
-    { PREFIX_TABLE (PREFIX_VEX_0FFD) },
-    { PREFIX_TABLE (PREFIX_VEX_0FFE) },
+    { "vpsubb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpsubw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpsubd", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpsubq", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpaddb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpaddw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpaddd", { XM, Vex, EXx }, PREFIX_DATA },
     { Bad_Opcode },
   },
   /* VEX_0F38 */
   {
     /* 00 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3800) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3801) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3802) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3803) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3804) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3805) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3806) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3807) },
+    { "vpshufb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vphaddw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vphaddd", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vphaddsw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmaddubsw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vphsubw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vphsubd", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vphsubsw", { XM, Vex, EXx }, PREFIX_DATA },
     /* 08 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3808) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3809) },
-    { PREFIX_TABLE (PREFIX_VEX_0F380A) },
-    { PREFIX_TABLE (PREFIX_VEX_0F380B) },
-    { PREFIX_TABLE (PREFIX_VEX_0F380C) },
-    { PREFIX_TABLE (PREFIX_VEX_0F380D) },
-    { PREFIX_TABLE (PREFIX_VEX_0F380E) },
-    { PREFIX_TABLE (PREFIX_VEX_0F380F) },
+    { "vpsignb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpsignw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpsignd", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmulhrsw", { XM, Vex, EXx }, PREFIX_DATA },
+    { VEX_W_TABLE (VEX_W_0F380C) },
+    { VEX_W_TABLE (VEX_W_0F380D) },
+    { VEX_W_TABLE (VEX_W_0F380E) },
+    { VEX_W_TABLE (VEX_W_0F380F) },
     /* 10 */
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F3813) },
+    { VEX_W_TABLE (VEX_W_0F3813) },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F3816) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3817) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3816) },
+    { "vptest", { XM, EXx }, PREFIX_DATA },
     /* 18 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3818) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3819) },
-    { PREFIX_TABLE (PREFIX_VEX_0F381A) },
+    { VEX_W_TABLE (VEX_W_0F3818) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3819) },
+    { MOD_TABLE (MOD_VEX_0F381A) },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F381C) },
-    { PREFIX_TABLE (PREFIX_VEX_0F381D) },
-    { PREFIX_TABLE (PREFIX_VEX_0F381E) },
+    { "vpabsb", { XM, EXx }, PREFIX_DATA },
+    { "vpabsw", { XM, EXx }, PREFIX_DATA },
+    { "vpabsd", { XM, EXx }, PREFIX_DATA },
     { Bad_Opcode },
     /* 20 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3820) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3821) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3822) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3823) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3824) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3825) },
+    { "vpmovsxbw", { XM, EXxmmq }, PREFIX_DATA },
+    { "vpmovsxbd", { XM, EXxmmqd }, PREFIX_DATA },
+    { "vpmovsxbq", { XM, EXxmmdw }, PREFIX_DATA },
+    { "vpmovsxwd", { XM, EXxmmq }, PREFIX_DATA },
+    { "vpmovsxwq", { XM, EXxmmqd }, PREFIX_DATA },
+    { "vpmovsxdq", { XM, EXxmmq }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     /* 28 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3828) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3829) },
-    { PREFIX_TABLE (PREFIX_VEX_0F382A) },
-    { PREFIX_TABLE (PREFIX_VEX_0F382B) },
-    { PREFIX_TABLE (PREFIX_VEX_0F382C) },
-    { PREFIX_TABLE (PREFIX_VEX_0F382D) },
-    { PREFIX_TABLE (PREFIX_VEX_0F382E) },
-    { PREFIX_TABLE (PREFIX_VEX_0F382F) },
+    { "vpmuldq", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpcmpeqq", { XM, Vex, EXx }, PREFIX_DATA },
+    { MOD_TABLE (MOD_VEX_0F382A) },
+    { "vpackusdw", { XM, Vex, EXx }, PREFIX_DATA },
+    { MOD_TABLE (MOD_VEX_0F382C) },
+    { MOD_TABLE (MOD_VEX_0F382D) },
+    { MOD_TABLE (MOD_VEX_0F382E) },
+    { MOD_TABLE (MOD_VEX_0F382F) },
     /* 30 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3830) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3831) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3832) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3833) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3834) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3835) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3836) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3837) },
+    { "vpmovzxbw", { XM, EXxmmq }, PREFIX_DATA },
+    { "vpmovzxbd", { XM, EXxmmqd }, PREFIX_DATA },
+    { "vpmovzxbq", { XM, EXxmmdw }, PREFIX_DATA },
+    { "vpmovzxwd", { XM, EXxmmq }, PREFIX_DATA },
+    { "vpmovzxwq", { XM, EXxmmqd }, PREFIX_DATA },
+    { "vpmovzxdq", { XM, EXxmmq }, PREFIX_DATA },
+    { VEX_LEN_TABLE (VEX_LEN_0F3836) },
+    { "vpcmpgtq", { XM, Vex, EXx }, PREFIX_DATA },
     /* 38 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3838) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3839) },
-    { PREFIX_TABLE (PREFIX_VEX_0F383A) },
-    { PREFIX_TABLE (PREFIX_VEX_0F383B) },
-    { PREFIX_TABLE (PREFIX_VEX_0F383C) },
-    { PREFIX_TABLE (PREFIX_VEX_0F383D) },
-    { PREFIX_TABLE (PREFIX_VEX_0F383E) },
-    { PREFIX_TABLE (PREFIX_VEX_0F383F) },
+    { "vpminsb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpminsd", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpminuw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpminud", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmaxsb", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmaxsd", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmaxuw", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vpmaxud", { XM, Vex, EXx }, PREFIX_DATA },
     /* 40 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3840) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3841) },
+    { "vpmulld", { XM, Vex, EXx }, PREFIX_DATA },
+    { VEX_LEN_TABLE (VEX_LEN_0F3841) },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F3845) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3846) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3847) },
+    { "vpsrlv%DQ", { XM, Vex, EXx }, PREFIX_DATA },
+    { VEX_W_TABLE (VEX_W_0F3846) },
+    { "vpsllv%DQ", { XM, Vex, EXx }, PREFIX_DATA },
     /* 48 */
     { Bad_Opcode },
     { X86_64_TABLE (X86_64_VEX_0F3849) },
@@ -8839,9 +6138,9 @@ static const struct dis386 vex_table[][2
     { Bad_Opcode },
     { Bad_Opcode },
     /* 58 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3858) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3859) },
-    { PREFIX_TABLE (PREFIX_VEX_0F385A) },
+    { VEX_W_TABLE (VEX_W_0F3858) },
+    { VEX_W_TABLE (VEX_W_0F3859) },
+    { MOD_TABLE (MOD_VEX_0F385A) },
     { Bad_Opcode },
     { X86_64_TABLE (X86_64_VEX_0F385C) },
     { Bad_Opcode },
@@ -8875,8 +6174,8 @@ static const struct dis386 vex_table[][2
     { Bad_Opcode },
     { Bad_Opcode },
     /* 78 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3878) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3879) },
+    { VEX_W_TABLE (VEX_W_0F3878) },
+    { VEX_W_TABLE (VEX_W_0F3879) },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -8897,28 +6196,28 @@ static const struct dis386 vex_table[][2
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F388C) },
+    { MOD_TABLE (MOD_VEX_0F388C) },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F388E) },
+    { MOD_TABLE (MOD_VEX_0F388E) },
     { Bad_Opcode },
     /* 90 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3890) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3891) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3892) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3893) },
+    { "vpgatherd%DQ", { XM, MVexVSIBDWpX, Vex }, PREFIX_DATA },
+    { "vpgatherq%DQ", { XMGatherQ, MVexVSIBQWpX, VexGatherQ }, PREFIX_DATA },
+    { "vgatherdp%XW", { XM, MVexVSIBDWpX, Vex }, PREFIX_DATA },
+    { "vgatherqp%XW", { XMGatherQ, MVexVSIBQWpX, VexGatherQ }, PREFIX_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F3896) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3897) },
+    { "vfmaddsub132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vfmsubadd132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
     /* 98 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3898) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3899) },
-    { PREFIX_TABLE (PREFIX_VEX_0F389A) },
-    { PREFIX_TABLE (PREFIX_VEX_0F389B) },
-    { PREFIX_TABLE (PREFIX_VEX_0F389C) },
-    { PREFIX_TABLE (PREFIX_VEX_0F389D) },
-    { PREFIX_TABLE (PREFIX_VEX_0F389E) },
-    { PREFIX_TABLE (PREFIX_VEX_0F389F) },
+    { "vfmadd132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vfmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+    { "vfmsub132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vfmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+    { "vfnmadd132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vfnmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+    { "vfnmsub132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vfnmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
     /* a0 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -8926,17 +6225,17 @@ static const struct dis386 vex_table[][2
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F38A6) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38A7) },
+    { "vfmaddsub213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vfmsubadd213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
     /* a8 */
-    { PREFIX_TABLE (PREFIX_VEX_0F38A8) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38A9) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38AA) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38AB) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38AC) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38AD) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38AE) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38AF) },
+    { "vfmadd213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vfmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+    { "vfmsub213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vfmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+    { "vfnmadd213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vfnmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+    { "vfnmsub213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vfnmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
     /* b0 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -8944,17 +6243,17 @@ static const struct dis386 vex_table[][2
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F38B6) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38B7) },
+    { "vfmaddsub231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vfmsubadd231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
     /* b8 */
-    { PREFIX_TABLE (PREFIX_VEX_0F38B8) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38B9) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38BA) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38BB) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38BC) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38BD) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38BE) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38BF) },
+    { "vfmadd231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vfmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+    { "vfmsub231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vfmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+    { "vfnmadd231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vfnmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+    { "vfnmsub231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vfnmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
     /* c0 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -8972,7 +6271,7 @@ static const struct dis386 vex_table[][2
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F38CF) },
+    { VEX_W_TABLE (VEX_W_0F38CF) },
     /* d0 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -8986,11 +6285,11 @@ static const struct dis386 vex_table[][2
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F38DB) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38DC) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38DD) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38DE) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38DF) },
+    { VEX_LEN_TABLE (VEX_LEN_0F38DB) },
+    { "vaesenc", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vaesenclast", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vaesdec", { XM, Vex, EXx }, PREFIX_DATA },
+    { "vaesdeclast", { XM, Vex, EXx }, PREFIX_DATA },
     /* e0 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -9031,45 +6330,45 @@ static const struct dis386 vex_table[][2
   /* VEX_0F3A */
   {
     /* 00 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3A00) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A01) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A02) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A00) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A01) },
+    { VEX_W_TABLE (VEX_W_0F3A02) },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A04) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A05) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A06) },
+    { VEX_W_TABLE (VEX_W_0F3A04) },
+    { VEX_W_TABLE (VEX_W_0F3A05) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A06) },
     { Bad_Opcode },
     /* 08 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3A08) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A09) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A0A) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A0B) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A0C) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A0D) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A0E) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A0F) },
+    { "vroundps", { XM, EXx, Ib }, PREFIX_DATA },
+    { "vroundpd", { XM, EXx, Ib }, PREFIX_DATA },
+    { "vroundss", { XMScalar, VexScalar, EXxmm_md, Ib }, PREFIX_DATA },
+    { "vroundsd", { XMScalar, VexScalar, EXxmm_mq, Ib }, PREFIX_DATA },
+    { "vblendps", { XM, Vex, EXx, Ib }, PREFIX_DATA },
+    { "vblendpd", { XM, Vex, EXx, Ib }, PREFIX_DATA },
+    { "vpblendw", { XM, Vex, EXx, Ib }, PREFIX_DATA },
+    { "vpalignr", { XM, Vex, EXx, Ib }, PREFIX_DATA },
     /* 10 */
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A14) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A15) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A16) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A17) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A14) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A15) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A16) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A17) },
     /* 18 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3A18) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A19) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A18) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A19) },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A1D) },
+    { VEX_W_TABLE (VEX_W_0F3A1D) },
     { Bad_Opcode },
     { Bad_Opcode },
     /* 20 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3A20) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A21) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A22) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A20) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A21) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A22) },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -9085,17 +6384,17 @@ static const struct dis386 vex_table[][2
     { Bad_Opcode },
     { Bad_Opcode },
     /* 30 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3A30) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A31) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A32) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A33) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A30) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A31) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A32) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A33) },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
     /* 38 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3A38) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A39) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A38) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A39) },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -9103,20 +6402,20 @@ static const struct dis386 vex_table[][2
     { Bad_Opcode },
     { Bad_Opcode },
     /* 40 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3A40) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A41) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A42) },
+    { "vdpps", { XM, Vex, EXx, Ib }, PREFIX_DATA },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A41) },
+    { "vmpsadbw", { XM, Vex, EXx, Ib }, PREFIX_DATA },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A44) },
+    { "vpclmulqdq", { XM, Vex, EXx, PCLMUL }, PREFIX_DATA },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A46) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A46) },
     { Bad_Opcode },
     /* 48 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3A48) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A49) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A4A) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A4B) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A4C) },
+    { "vpermil2ps", { XM, Vex, EXx, XMVexI4, VexI4 }, PREFIX_DATA },
+    { "vpermil2pd", { XM, Vex, EXx, XMVexI4, VexI4 }, PREFIX_DATA },
+    { VEX_W_TABLE (VEX_W_0F3A4A) },
+    { VEX_W_TABLE (VEX_W_0F3A4B) },
+    { VEX_W_TABLE (VEX_W_0F3A4C) },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -9134,28 +6433,28 @@ static const struct dis386 vex_table[][2
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A5C) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A5D) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A5E) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A5F) },
+    { "vfmaddsubps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+    { "vfmaddsubpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+    { "vfmsubaddps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+    { "vfmsubaddpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
     /* 60 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3A60) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A61) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A62) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A63) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A60) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A61) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A62) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3A63) },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
     /* 68 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3A68) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A69) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A6A) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A6B) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A6C) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A6D) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A6E) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A6F) },
+    { "vfmaddps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+    { "vfmaddpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+    { "vfmaddss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, PREFIX_DATA },
+    { "vfmaddsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, PREFIX_DATA },
+    { "vfmsubps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+    { "vfmsubpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+    { "vfmsubss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, PREFIX_DATA },
+    { "vfmsubsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, PREFIX_DATA },
     /* 70 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -9166,14 +6465,14 @@ static const struct dis386 vex_table[][2
     { Bad_Opcode },
     { Bad_Opcode },
     /* 78 */
-    { PREFIX_TABLE (PREFIX_VEX_0F3A78) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A79) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A7A) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A7B) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A7C) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A7D) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A7E) },
-    { PREFIX_TABLE (PREFIX_VEX_0F3A7F) },
+    { "vfnmaddps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+    { "vfnmaddpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+    { "vfnmaddss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, PREFIX_DATA },
+    { "vfnmaddsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, PREFIX_DATA },
+    { "vfnmsubps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+    { "vfnmsubpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
+    { "vfnmsubss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, PREFIX_DATA },
+    { "vfnmsubsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, PREFIX_DATA },
     /* 80 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -9262,8 +6561,8 @@ static const struct dis386 vex_table[][2
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE(PREFIX_VEX_0F3ACE) },
-    { PREFIX_TABLE(PREFIX_VEX_0F3ACF) },
+    { VEX_W_TABLE (VEX_W_0F3ACE) },
+    { VEX_W_TABLE (VEX_W_0F3ACF) },
     /* d0 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -9281,7 +6580,7 @@ static const struct dis386 vex_table[][2
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F3ADF) },
+    { VEX_LEN_TABLE (VEX_LEN_0F3ADF) },
     /* e0 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -9433,9 +6732,9 @@ static const struct dis386 vex_len_table
     { VEX_W_TABLE (VEX_W_0F4B_P_2_LEN_1) },
   },
 
-  /* VEX_LEN_0F6E_P_2 */
+  /* VEX_LEN_0F6E */
   {
-    { "vmovK", { XMScalar, Edq }, 0 },
+    { "vmovK", { XMScalar, Edq }, PREFIX_DATA },
   },
 
   /* VEX_LEN_0F77_P_1 */
@@ -9534,53 +6833,53 @@ static const struct dis386 vex_len_table
     { "vstmxcsr", { Md }, 0 },
   },
 
-  /* VEX_LEN_0FC4_P_2 */
+  /* VEX_LEN_0FC4 */
   {
-    { "vpinsrw", { XM, Vex, Edqw, Ib }, 0 },
+    { "vpinsrw", { XM, Vex, Edqw, Ib }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0FC5_P_2 */
+  /* VEX_LEN_0FC5 */
   {
-    { "vpextrw", { Gdq, XS, Ib }, 0 },
+    { "vpextrw", { Gdq, XS, Ib }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0FD6_P_2 */
+  /* VEX_LEN_0FD6 */
   {
-    { "vmovq", { EXqS, XMScalar }, 0 },
+    { "vmovq", { EXqS, XMScalar }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0FF7_P_2 */
+  /* VEX_LEN_0FF7 */
   {
-    { "vmaskmovdqu", { XM, XS }, 0 },
+    { "vmaskmovdqu", { XM, XS }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0F3816_P_2 */
+  /* VEX_LEN_0F3816 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3816_P_2) },
+    { VEX_W_TABLE (VEX_W_0F3816_L_1) },
   },
 
-  /* VEX_LEN_0F3819_P_2 */
+  /* VEX_LEN_0F3819 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3819_P_2) },
+    { VEX_W_TABLE (VEX_W_0F3819_L_1) },
   },
 
-  /* VEX_LEN_0F381A_P_2_M_0 */
+  /* VEX_LEN_0F381A_M_0 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F381A_P_2_M_0_L_0) },
+    { VEX_W_TABLE (VEX_W_0F381A_M_0_L_1) },
   },
 
-  /* VEX_LEN_0F3836_P_2 */
+  /* VEX_LEN_0F3836 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3836_P_2) },
+    { VEX_W_TABLE (VEX_W_0F3836) },
   },
 
-  /* VEX_LEN_0F3841_P_2 */
+  /* VEX_LEN_0F3841 */
   {
-    { "vphminposuw", { XM, EXx }, 0 },
+    { "vphminposuw", { XM, EXx }, PREFIX_DATA },
   },
 
    /* VEX_LEN_0F3849_X86_64_P_0_W_0_M_0 */
@@ -9617,10 +6916,10 @@ static const struct dis386 vex_len_table
     { "tileloadd", { TMM, MVexSIBMEM }, 0 },
   },
 
-  /* VEX_LEN_0F385A_P_2_M_0 */
+  /* VEX_LEN_0F385A_M_0 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F385A_P_2_M_0_L_0) },
+    { VEX_W_TABLE (VEX_W_0F385A_M_0_L_0) },
   },
 
   /* VEX_LEN_0F385C_X86_64_P_1_W_0_M_0 */
@@ -9648,9 +6947,9 @@ static const struct dis386 vex_len_table
     { "tdpbssd", {TMM, EXtmm, VexTmm }, 0 },
   },
 
-  /* VEX_LEN_0F38DB_P_2 */
+  /* VEX_LEN_0F38DB */
   {
-    { "vaesimc", { XM, EXx }, 0 },
+    { "vaesimc", { XM, EXx }, PREFIX_DATA },
   },
 
   /* VEX_LEN_0F38F2_P_0 */
@@ -9713,137 +7012,137 @@ static const struct dis386 vex_len_table
     { "shrxS", { Gdq, Edq, VexGdq }, 0 },
   },
 
-  /* VEX_LEN_0F3A00_P_2 */
+  /* VEX_LEN_0F3A00 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A00_P_2) },
+    { VEX_W_TABLE (VEX_W_0F3A00_L_1) },
   },
 
-  /* VEX_LEN_0F3A01_P_2 */
+  /* VEX_LEN_0F3A01 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A01_P_2) },
+    { VEX_W_TABLE (VEX_W_0F3A01_L_1) },
   },
 
-  /* VEX_LEN_0F3A06_P_2 */
+  /* VEX_LEN_0F3A06 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A06_P_2_L_0) },
+    { VEX_W_TABLE (VEX_W_0F3A06_L_1) },
   },
 
-  /* VEX_LEN_0F3A14_P_2 */
+  /* VEX_LEN_0F3A14 */
   {
-    { "vpextrb", { Edqb, XM, Ib }, 0 },
+    { "vpextrb", { Edqb, XM, Ib }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0F3A15_P_2 */
+  /* VEX_LEN_0F3A15 */
   {
-    { "vpextrw", { Edqw, XM, Ib }, 0 },
+    { "vpextrw", { Edqw, XM, Ib }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0F3A16_P_2  */
+  /* VEX_LEN_0F3A16  */
   {
-    { "vpextrK", { Edq, XM, Ib }, 0 },
+    { "vpextrK", { Edq, XM, Ib }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0F3A17_P_2 */
+  /* VEX_LEN_0F3A17 */
   {
-    { "vextractps", { Edqd, XM, Ib }, 0 },
+    { "vextractps", { Edqd, XM, Ib }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0F3A18_P_2 */
+  /* VEX_LEN_0F3A18 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A18_P_2_L_0) },
+    { VEX_W_TABLE (VEX_W_0F3A18_L_1) },
   },
 
-  /* VEX_LEN_0F3A19_P_2 */
+  /* VEX_LEN_0F3A19 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A19_P_2_L_0) },
+    { VEX_W_TABLE (VEX_W_0F3A19_L_1) },
   },
 
-  /* VEX_LEN_0F3A20_P_2 */
+  /* VEX_LEN_0F3A20 */
   {
-    { "vpinsrb", { XM, Vex, Edqb, Ib }, 0 },
+    { "vpinsrb", { XM, Vex, Edqb, Ib }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0F3A21_P_2 */
+  /* VEX_LEN_0F3A21 */
   {
-    { "vinsertps", { XM, Vex, EXd, Ib }, 0 },
+    { "vinsertps", { XM, Vex, EXd, Ib }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0F3A22_P_2 */
+  /* VEX_LEN_0F3A22 */
   {
-    { "vpinsrK", { XM, Vex, Edq, Ib }, 0 },
+    { "vpinsrK", { XM, Vex, Edq, Ib }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0F3A30_P_2 */
+  /* VEX_LEN_0F3A30 */
   {
-    { VEX_W_TABLE (VEX_W_0F3A30_P_2_LEN_0) },
+    { VEX_W_TABLE (VEX_W_0F3A30_L_0) },
   },
 
-  /* VEX_LEN_0F3A31_P_2 */
+  /* VEX_LEN_0F3A31 */
   {
-    { VEX_W_TABLE (VEX_W_0F3A31_P_2_LEN_0) },
+    { VEX_W_TABLE (VEX_W_0F3A31_L_0) },
   },
 
-  /* VEX_LEN_0F3A32_P_2 */
+  /* VEX_LEN_0F3A32 */
   {
-    { VEX_W_TABLE (VEX_W_0F3A32_P_2_LEN_0) },
+    { VEX_W_TABLE (VEX_W_0F3A32_L_0) },
   },
 
-  /* VEX_LEN_0F3A33_P_2 */
+  /* VEX_LEN_0F3A33 */
   {
-    { VEX_W_TABLE (VEX_W_0F3A33_P_2_LEN_0) },
+    { VEX_W_TABLE (VEX_W_0F3A33_L_0) },
   },
 
-  /* VEX_LEN_0F3A38_P_2 */
+  /* VEX_LEN_0F3A38 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A38_P_2_L_0) },
+    { VEX_W_TABLE (VEX_W_0F3A38_L_1) },
   },
 
-  /* VEX_LEN_0F3A39_P_2 */
+  /* VEX_LEN_0F3A39 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A39_P_2_L_0) },
+    { VEX_W_TABLE (VEX_W_0F3A39_L_1) },
   },
 
-  /* VEX_LEN_0F3A41_P_2 */
+  /* VEX_LEN_0F3A41 */
   {
-    { "vdppd", { XM, Vex, EXx, Ib }, 0 },
+    { "vdppd", { XM, Vex, EXx, Ib }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0F3A46_P_2 */
+  /* VEX_LEN_0F3A46 */
   {
     { Bad_Opcode },
-    { VEX_W_TABLE (VEX_W_0F3A46_P_2_L_0) },
+    { VEX_W_TABLE (VEX_W_0F3A46_L_1) },
   },
 
-  /* VEX_LEN_0F3A60_P_2 */
+  /* VEX_LEN_0F3A60 */
   {
-    { "vpcmpestrm!%LQ", { XM, EXx, Ib }, 0 },
+    { "vpcmpestrm!%LQ", { XM, EXx, Ib }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0F3A61_P_2 */
+  /* VEX_LEN_0F3A61 */
   {
-    { "vpcmpestri!%LQ", { XM, EXx, Ib }, 0 },
+    { "vpcmpestri!%LQ", { XM, EXx, Ib }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0F3A62_P_2 */
+  /* VEX_LEN_0F3A62 */
   {
-    { "vpcmpistrm", { XM, EXx, Ib }, 0 },
+    { "vpcmpistrm", { XM, EXx, Ib }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0F3A63_P_2 */
+  /* VEX_LEN_0F3A63 */
   {
-    { "vpcmpistri", { XM, EXx, Ib }, 0 },
+    { "vpcmpistri", { XM, EXx, Ib }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0F3ADF_P_2 */
+  /* VEX_LEN_0F3ADF */
   {
-    { "vaeskeygenassist", { XM, EXx, Ib }, 0 },
+    { "vaeskeygenassist", { XM, EXx, Ib }, PREFIX_DATA },
   },
 
   /* VEX_LEN_0F3AF0_P_3 */
@@ -10281,64 +7580,64 @@ static const struct dis386 vex_w_table[]
     { MOD_TABLE (MOD_VEX_W_1_0F99_P_2_LEN_0) },
   },
   {
-    /* VEX_W_0F380C_P_2  */
-    { "vpermilps", { XM, Vex, EXx }, 0 },
+    /* VEX_W_0F380C  */
+    { "vpermilps", { XM, Vex, EXx }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F380D_P_2  */
-    { "vpermilpd", { XM, Vex, EXx }, 0 },
+    /* VEX_W_0F380D  */
+    { "vpermilpd", { XM, Vex, EXx }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F380E_P_2  */
-    { "vtestps", { XM, EXx }, 0 },
+    /* VEX_W_0F380E  */
+    { "vtestps", { XM, EXx }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F380F_P_2  */
-    { "vtestpd", { XM, EXx }, 0 },
+    /* VEX_W_0F380F  */
+    { "vtestpd", { XM, EXx }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3813_P_2 */
-    { "vcvtph2ps", { XM, EXxmmq }, 0 },
+    /* VEX_W_0F3813 */
+    { "vcvtph2ps", { XM, EXxmmq }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3816_P_2  */
-    { "vpermps", { XM, Vex, EXx }, 0 },
+    /* VEX_W_0F3816_L_1  */
+    { "vpermps", { XM, Vex, EXx }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3818_P_2 */
-    { "vbroadcastss", { XM, EXxmm_md }, 0 },
+    /* VEX_W_0F3818 */
+    { "vbroadcastss", { XM, EXxmm_md }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3819_P_2 */
-    { "vbroadcastsd", { XM, EXxmm_mq }, 0 },
+    /* VEX_W_0F3819_L_1 */
+    { "vbroadcastsd", { XM, EXxmm_mq }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F381A_P_2_M_0_L_0 */
-    { "vbroadcastf128", { XM, Mxmm }, 0 },
+    /* VEX_W_0F381A_M_0_L_1 */
+    { "vbroadcastf128", { XM, Mxmm }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F382C_P_2_M_0 */
-    { "vmaskmovps", { XM, Vex, Mx }, 0 },
+    /* VEX_W_0F382C_M_0 */
+    { "vmaskmovps", { XM, Vex, Mx }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F382D_P_2_M_0 */
-    { "vmaskmovpd", { XM, Vex, Mx }, 0 },
+    /* VEX_W_0F382D_M_0 */
+    { "vmaskmovpd", { XM, Vex, Mx }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F382E_P_2_M_0 */
-    { "vmaskmovps", { Mx, Vex, XM }, 0 },
+    /* VEX_W_0F382E_M_0 */
+    { "vmaskmovps", { Mx, Vex, XM }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F382F_P_2_M_0 */
-    { "vmaskmovpd", { Mx, Vex, XM }, 0 },
+    /* VEX_W_0F382F_M_0 */
+    { "vmaskmovpd", { Mx, Vex, XM }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3836_P_2  */
-    { "vpermd", { XM, Vex, EXx }, 0 },
+    /* VEX_W_0F3836  */
+    { "vpermd", { XM, Vex, EXx }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3846_P_2 */
-    { "vpsravd", { XM, Vex, EXx }, 0 },
+    /* VEX_W_0F3846 */
+    { "vpsravd", { XM, Vex, EXx }, PREFIX_DATA },
   },
   {
     /* VEX_W_0F3849_X86_64_P_0 */
@@ -10365,16 +7664,16 @@ static const struct dis386 vex_w_table[]
     { MOD_TABLE (MOD_VEX_0F384B_X86_64_P_3_W_0) },
   },
   {
-    /* VEX_W_0F3858_P_2 */
-    { "vpbroadcastd", { XM, EXxmm_md }, 0 },
+    /* VEX_W_0F3858 */
+    { "vpbroadcastd", { XM, EXxmm_md }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3859_P_2 */
-    { "vpbroadcastq", { XM, EXxmm_mq }, 0 },
+    /* VEX_W_0F3859 */
+    { "vpbroadcastq", { XM, EXxmm_mq }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F385A_P_2_M_0_L_0 */
-    { "vbroadcasti128", { XM, Mxmm }, 0 },
+    /* VEX_W_0F385A_M_0_L_0 */
+    { "vbroadcasti128", { XM, Mxmm }, PREFIX_DATA },
   },
   {
     /* VEX_W_0F385C_X86_64_P_1 */
@@ -10397,108 +7696,108 @@ static const struct dis386 vex_w_table[]
     { MOD_TABLE (MOD_VEX_0F385E_X86_64_P_3_W_0) },
   },
   {
-    /* VEX_W_0F3878_P_2 */
-    { "vpbroadcastb", { XM, EXxmm_mb }, 0 },
+    /* VEX_W_0F3878 */
+    { "vpbroadcastb", { XM, EXxmm_mb }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3879_P_2 */
-    { "vpbroadcastw", { XM, EXxmm_mw }, 0 },
+    /* VEX_W_0F3879 */
+    { "vpbroadcastw", { XM, EXxmm_mw }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F38CF_P_2 */
-    { "vgf2p8mulb", { XM, Vex, EXx }, 0 },
+    /* VEX_W_0F38CF */
+    { "vgf2p8mulb", { XM, Vex, EXx }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3A00_P_2 */
+    /* VEX_W_0F3A00_L_1 */
     { Bad_Opcode },
-    { "vpermq", { XM, EXx, Ib }, 0 },
+    { "vpermq", { XM, EXx, Ib }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3A01_P_2 */
+    /* VEX_W_0F3A01_L_1 */
     { Bad_Opcode },
-    { "vpermpd", { XM, EXx, Ib }, 0 },
+    { "vpermpd", { XM, EXx, Ib }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3A02_P_2 */
-    { "vpblendd", { XM, Vex, EXx, Ib }, 0 },
+    /* VEX_W_0F3A02 */
+    { "vpblendd", { XM, Vex, EXx, Ib }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3A04_P_2 */
-    { "vpermilps", { XM, EXx, Ib }, 0 },
+    /* VEX_W_0F3A04 */
+    { "vpermilps", { XM, EXx, Ib }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3A05_P_2 */
-    { "vpermilpd", { XM, EXx, Ib }, 0 },
+    /* VEX_W_0F3A05 */
+    { "vpermilpd", { XM, EXx, Ib }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3A06_P_2_L_0 */
-    { "vperm2f128", { XM, Vex, EXx, Ib }, 0 },
+    /* VEX_W_0F3A06_L_1 */
+    { "vperm2f128", { XM, Vex, EXx, Ib }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3A18_P_2_L_0 */
-    { "vinsertf128", { XM, Vex, EXxmm, Ib }, 0 },
+    /* VEX_W_0F3A18_L_1 */
+    { "vinsertf128", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3A19_P_2_L_0 */
-    { "vextractf128", { EXxmm, XM, Ib }, 0 },
+    /* VEX_W_0F3A19_L_1 */
+    { "vextractf128", { EXxmm, XM, Ib }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3A1D_P_2 */
-    { "vcvtps2ph", { EXxmmq, XM, EXxEVexS, Ib }, 0 },
+    /* VEX_W_0F3A1D */
+    { "vcvtps2ph", { EXxmmq, XM, EXxEVexS, Ib }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3A30_P_2_LEN_0 */
-    { MOD_TABLE (MOD_VEX_W_0_0F3A30_P_2_LEN_0) },
-    { MOD_TABLE (MOD_VEX_W_1_0F3A30_P_2_LEN_0) },
+    /* VEX_W_0F3A30_L_0 */
+    { MOD_TABLE (MOD_VEX_0F3A30_L_0_W_0) },
+    { MOD_TABLE (MOD_VEX_0F3A30_L_0_W_1) },
   },
   {
-    /* VEX_W_0F3A31_P_2_LEN_0 */
-    { MOD_TABLE (MOD_VEX_W_0_0F3A31_P_2_LEN_0) },
-    { MOD_TABLE (MOD_VEX_W_1_0F3A31_P_2_LEN_0) },
+    /* VEX_W_0F3A31_L_0 */
+    { MOD_TABLE (MOD_VEX_0F3A31_L_0_W_0) },
+    { MOD_TABLE (MOD_VEX_0F3A31_L_0_W_1) },
   },
   {
-    /* VEX_W_0F3A32_P_2_LEN_0 */
-    { MOD_TABLE (MOD_VEX_W_0_0F3A32_P_2_LEN_0) },
-    { MOD_TABLE (MOD_VEX_W_1_0F3A32_P_2_LEN_0) },
+    /* VEX_W_0F3A32_L_0 */
+    { MOD_TABLE (MOD_VEX_0F3A32_L_0_W_0) },
+    { MOD_TABLE (MOD_VEX_0F3A32_L_0_W_1) },
   },
   {
-    /* VEX_W_0F3A33_P_2_LEN_0 */
-    { MOD_TABLE (MOD_VEX_W_0_0F3A33_P_2_LEN_0) },
-    { MOD_TABLE (MOD_VEX_W_1_0F3A33_P_2_LEN_0) },
+    /* VEX_W_0F3A33_L_0 */
+    { MOD_TABLE (MOD_VEX_0F3A33_L_0_W_0) },
+    { MOD_TABLE (MOD_VEX_0F3A33_L_0_W_1) },
   },
   {
-    /* VEX_W_0F3A38_P_2_L_0 */
-    { "vinserti128", { XM, Vex, EXxmm, Ib }, 0 },
+    /* VEX_W_0F3A38_L_1 */
+    { "vinserti128", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3A39_P_2_L_0 */
-    { "vextracti128", { EXxmm, XM, Ib }, 0 },
+    /* VEX_W_0F3A39_L_1 */
+    { "vextracti128", { EXxmm, XM, Ib }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3A46_P_2_L_0 */
-    { "vperm2i128", { XM, Vex, EXx, Ib }, 0 },
+    /* VEX_W_0F3A46_L_1 */
+    { "vperm2i128", { XM, Vex, EXx, Ib }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3A4A_P_2 */
-    { "vblendvps", { XM, Vex, EXx, XMVexI4 }, 0 },
+    /* VEX_W_0F3A4A */
+    { "vblendvps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3A4B_P_2 */
-    { "vblendvpd", { XM, Vex, EXx, XMVexI4 }, 0 },
+    /* VEX_W_0F3A4B */
+    { "vblendvpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3A4C_P_2 */
-    { "vpblendvb", { XM, Vex, EXx, XMVexI4 }, 0 },
+    /* VEX_W_0F3A4C */
+    { "vpblendvb", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3ACE_P_2 */
+    /* VEX_W_0F3ACE */
     { Bad_Opcode },
-    { "vgf2p8affineqb", { XM, Vex, EXx, Ib }, 0 },
+    { "vgf2p8affineqb", { XM, Vex, EXx, Ib }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3ACF_P_2 */
+    /* VEX_W_0F3ACF */
     { Bad_Opcode },
-    { "vgf2p8affineinvqb",  { XM, Vex, EXx, Ib }, 0 },
+    { "vgf2p8affineinvqb",  { XM, Vex, EXx, Ib }, PREFIX_DATA },
   },
   /* VEX_W_0FXOP_08_85_L_0 */
   {
@@ -10846,52 +8145,52 @@ static const struct dis386 mod_table[][2
   {
     /* MOD_0F71_REG_2 */
     { Bad_Opcode },
-    { "psrlw", { MS, Ib }, 0 },
+    { "psrlw", { MS, Ib }, PREFIX_OPCODE },
   },
   {
     /* MOD_0F71_REG_4 */
     { Bad_Opcode },
-    { "psraw", { MS, Ib }, 0 },
+    { "psraw", { MS, Ib }, PREFIX_OPCODE },
   },
   {
     /* MOD_0F71_REG_6 */
     { Bad_Opcode },
-    { "psllw", { MS, Ib }, 0 },
+    { "psllw", { MS, Ib }, PREFIX_OPCODE },
   },
   {
     /* MOD_0F72_REG_2 */
     { Bad_Opcode },
-    { "psrld", { MS, Ib }, 0 },
+    { "psrld", { MS, Ib }, PREFIX_OPCODE },
   },
   {
     /* MOD_0F72_REG_4 */
     { Bad_Opcode },
-    { "psrad", { MS, Ib }, 0 },
+    { "psrad", { MS, Ib }, PREFIX_OPCODE },
   },
   {
     /* MOD_0F72_REG_6 */
     { Bad_Opcode },
-    { "pslld", { MS, Ib }, 0 },
+    { "pslld", { MS, Ib }, PREFIX_OPCODE },
   },
   {
     /* MOD_0F73_REG_2 */
     { Bad_Opcode },
-    { "psrlq", { MS, Ib }, 0 },
+    { "psrlq", { MS, Ib }, PREFIX_OPCODE },
   },
   {
     /* MOD_0F73_REG_3 */
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_0F73_REG_3) },
+    { "psrldq", { XS, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_0F73_REG_6 */
     { Bad_Opcode },
-    { "psllq", { MS, Ib }, 0 },
+    { "psllq", { MS, Ib }, PREFIX_OPCODE },
   },
   {
     /* MOD_0F73_REG_7 */
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_0F73_REG_7) },
+    { "pslldq", { XS, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_0FAE_REG_0 */
@@ -10985,8 +8284,8 @@ static const struct dis386 mod_table[][2
     { "lddqu", { XM, M }, 0 },
   },
   {
-    /* MOD_0F382A_PREFIX_2 */
-    { "movntdqa", { XM, Mx }, 0 },
+    /* MOD_0F382A */
+    { "movntdqa", { XM, Mx }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0F3849_X86_64_P_0_W_0 */
@@ -11040,8 +8339,8 @@ static const struct dis386 mod_table[][2
     { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0) },
   },
   {
-    /* MOD_0F38F5_PREFIX_2 */
-    { "wrussK", { M, Gdq }, PREFIX_OPCODE },
+    /* MOD_0F38F5 */
+    { "wrussK", { M, Gdq }, PREFIX_DATA },
   },
   {
     /* MOD_0F38F6_PREFIX_0 */
@@ -11271,52 +8570,52 @@ static const struct dis386 mod_table[][2
   {
     /* MOD_VEX_0F71_REG_2 */
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F71_REG_2) },
+    { "vpsrlw", { Vex, XS, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0F71_REG_4 */
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F71_REG_4) },
+    { "vpsraw", { Vex, XS, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0F71_REG_6 */
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F71_REG_6) },
+    { "vpsllw", { Vex, XS, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0F72_REG_2 */
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F72_REG_2) },
+    { "vpsrld", { Vex, XS, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0F72_REG_4 */
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F72_REG_4) },
+    { "vpsrad", { Vex, XS, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0F72_REG_6 */
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F72_REG_6) },
+    { "vpslld", { Vex, XS, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0F73_REG_2 */
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F73_REG_2) },
+    { "vpsrlq", { Vex, XS, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0F73_REG_3 */
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F73_REG_3) },
+    { "vpsrldq", { Vex, XS, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0F73_REG_6 */
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F73_REG_6) },
+    { "vpsllq", { Vex, XS, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0F73_REG_7 */
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F73_REG_7) },
+    { "vpslldq", { Vex, XS, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_W_0_0F91_P_0_LEN_0 */
@@ -11417,93 +8716,93 @@ static const struct dis386 mod_table[][2
     { VEX_LEN_TABLE (VEX_LEN_0FAE_R_3_M_0) },
   },
   {
-    /* MOD_VEX_0FD7_PREFIX_2 */
+    /* MOD_VEX_0FD7 */
     { Bad_Opcode },
-    { "vpmovmskb", { Gdq, XS }, 0 },
+    { "vpmovmskb", { Gdq, XS }, PREFIX_DATA },
   },
   {
-    /* MOD_VEX_0FE7_PREFIX_2 */
-    { "vmovntdq", { Mx, XM }, 0 },
+    /* MOD_VEX_0FE7 */
+    { "vmovntdq", { Mx, XM }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0FF0_PREFIX_3 */
     { "vlddqu", { XM, M }, 0 },
   },
   {
-    /* MOD_VEX_0F381A_PREFIX_2 */
-    { VEX_LEN_TABLE (VEX_LEN_0F381A_P_2_M_0) },
+    /* MOD_VEX_0F381A */
+    { VEX_LEN_TABLE (VEX_LEN_0F381A_M_0) },
   },
   {
-    /* MOD_VEX_0F382A_PREFIX_2 */
-    { "vmovntdqa", { XM, Mx }, 0 },
+    /* MOD_VEX_0F382A */
+    { "vmovntdqa", { XM, Mx }, PREFIX_DATA },
   },
   {
-    /* MOD_VEX_0F382C_PREFIX_2 */
-    { VEX_W_TABLE (VEX_W_0F382C_P_2_M_0) },
+    /* MOD_VEX_0F382C */
+    { VEX_W_TABLE (VEX_W_0F382C_M_0) },
   },
   {
-    /* MOD_VEX_0F382D_PREFIX_2 */
-    { VEX_W_TABLE (VEX_W_0F382D_P_2_M_0) },
+    /* MOD_VEX_0F382D */
+    { VEX_W_TABLE (VEX_W_0F382D_M_0) },
   },
   {
-    /* MOD_VEX_0F382E_PREFIX_2 */
-    { VEX_W_TABLE (VEX_W_0F382E_P_2_M_0) },
+    /* MOD_VEX_0F382E */
+    { VEX_W_TABLE (VEX_W_0F382E_M_0) },
   },
   {
-    /* MOD_VEX_0F382F_PREFIX_2 */
-    { VEX_W_TABLE (VEX_W_0F382F_P_2_M_0) },
+    /* MOD_VEX_0F382F */
+    { VEX_W_TABLE (VEX_W_0F382F_M_0) },
   },
   {
-    /* MOD_VEX_0F385A_PREFIX_2 */
-    { VEX_LEN_TABLE (VEX_LEN_0F385A_P_2_M_0) },
+    /* MOD_VEX_0F385A */
+    { VEX_LEN_TABLE (VEX_LEN_0F385A_M_0) },
   },
   {
-    /* MOD_VEX_0F388C_PREFIX_2 */
-    { "vpmaskmov%DQ", { XM, Vex, Mx }, 0 },
+    /* MOD_VEX_0F388C */
+    { "vpmaskmov%DQ", { XM, Vex, Mx }, PREFIX_DATA },
   },
   {
-    /* MOD_VEX_0F388E_PREFIX_2 */
-    { "vpmaskmov%DQ", { Mx, Vex, XM }, 0 },
+    /* MOD_VEX_0F388E */
+    { "vpmaskmov%DQ", { Mx, Vex, XM }, PREFIX_DATA },
   },
   {
-    /* MOD_VEX_W_0_0F3A30_P_2_LEN_0 */
+    /* MOD_VEX_0F3A30_L_0_W_0 */
     { Bad_Opcode },
-    { "kshiftrb",       { MaskG, MaskR, Ib }, 0 },
+    { "kshiftrb",       { MaskG, MaskR, Ib }, PREFIX_DATA },
   },
   {
-    /* MOD_VEX_W_1_0F3A30_P_2_LEN_0 */
+    /* MOD_VEX_0F3A30_L_0_W_1 */
     { Bad_Opcode },
-    { "kshiftrw",       { MaskG, MaskR, Ib }, 0 },
+    { "kshiftrw",       { MaskG, MaskR, Ib }, PREFIX_DATA },
   },
   {
-    /* MOD_VEX_W_0_0F3A31_P_2_LEN_0 */
+    /* MOD_VEX_0F3A31_L_0_W_0 */
     { Bad_Opcode },
-    { "kshiftrd",       { MaskG, MaskR, Ib }, 0 },
+    { "kshiftrd",       { MaskG, MaskR, Ib }, PREFIX_DATA },
   },
   {
-    /* MOD_VEX_W_1_0F3A31_P_2_LEN_0 */
+    /* MOD_VEX_0F3A31_L_0_W_1 */
     { Bad_Opcode },
-    { "kshiftrq",       { MaskG, MaskR, Ib }, 0 },
+    { "kshiftrq",       { MaskG, MaskR, Ib }, PREFIX_DATA },
   },
   {
-    /* MOD_VEX_W_0_0F3A32_P_2_LEN_0 */
+    /* MOD_VEX_0F3A32_L_0_W_0 */
     { Bad_Opcode },
-    { "kshiftlb",       { MaskG, MaskR, Ib }, 0 },
+    { "kshiftlb",       { MaskG, MaskR, Ib }, PREFIX_DATA },
   },
   {
-    /* MOD_VEX_W_1_0F3A32_P_2_LEN_0 */
+    /* MOD_VEX_0F3A32_L_0_W_1 */
     { Bad_Opcode },
-    { "kshiftlw",       { MaskG, MaskR, Ib }, 0 },
+    { "kshiftlw",       { MaskG, MaskR, Ib }, PREFIX_DATA },
   },
   {
-    /* MOD_VEX_W_0_0F3A33_P_2_LEN_0 */
+    /* MOD_VEX_0F3A33_L_0_W_0 */
     { Bad_Opcode },
-    { "kshiftld",       { MaskG, MaskR, Ib }, 0 },
+    { "kshiftld",       { MaskG, MaskR, Ib }, PREFIX_DATA },
   },
   {
-    /* MOD_VEX_W_1_0F3A33_P_2_LEN_0 */
+    /* MOD_VEX_0F3A33_L_0_W_1 */
     { Bad_Opcode },
-    { "kshiftlq",       { MaskG, MaskR, Ib }, 0 },
+    { "kshiftlq",       { MaskG, MaskR, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0FXOP_09_12 */
@@ -12742,6 +10041,46 @@ print_insn (bfd_vma pc, disassemble_info
       return end_codep - priv.the_buffer;
     }
 
+  switch (dp->prefix_requirement)
+    {
+    case PREFIX_DATA:
+      /* If only the data prefix is marked as mandatory, its absence renders
+ the encoding invalid.  Most other PREFIX_OPCODE rules still apply.  */
+      if (need_vex ? !vex.prefix : !(prefixes & PREFIX_DATA))
+ {
+  (*info->fprintf_func) (info->stream, "(bad)");
+  return end_codep - priv.the_buffer;
+ }
+      used_prefixes |= PREFIX_DATA;
+      /* Fall through.  */
+    case PREFIX_OPCODE:
+      /* If the mandatory PREFIX_REPZ/PREFIX_REPNZ/PREFIX_DATA prefix is
+ unused, opcode is invalid.  Since the PREFIX_DATA prefix may be
+ used by putop and MMX/SSE operand and may be overridden by the
+ PREFIX_REPZ/PREFIX_REPNZ fix, we check the PREFIX_DATA prefix
+ separately.  */
+      if (((need_vex
+    ? vex.prefix == REPE_PREFIX_OPCODE
+      || vex.prefix == REPNE_PREFIX_OPCODE
+    : (prefixes
+       & (PREFIX_REPZ | PREFIX_REPNZ)) != 0)
+   && (used_prefixes
+       & (PREFIX_REPZ | PREFIX_REPNZ)) == 0)
+  || (((need_vex
+ ? vex.prefix == DATA_PREFIX_OPCODE
+ : ((prefixes
+    & (PREFIX_REPZ | PREFIX_REPNZ | PREFIX_DATA))
+   == PREFIX_DATA))
+       && (used_prefixes & PREFIX_DATA) == 0))
+  || (vex.evex && dp->prefix_requirement != PREFIX_DATA
+      && !vex.w != !(used_prefixes & PREFIX_DATA)))
+ {
+  (*info->fprintf_func) (info->stream, "(bad)");
+  return end_codep - priv.the_buffer;
+ }
+      break;
+    }
+
   /* Check if the REX prefix is used.  */
   if ((rex ^ rex_used) == 0 && !need_vex && last_rex_prefix >= 0)
     all_prefixes[last_rex_prefix] = 0;
@@ -12776,31 +10115,6 @@ print_insn (bfd_vma pc, disassemble_info
  (*info->fprintf_func) (info->stream, "%s ", name);
       }
 
-  /* If the mandatory PREFIX_REPZ/PREFIX_REPNZ/PREFIX_DATA prefix is
-     unused, opcode is invalid.  Since the PREFIX_DATA prefix may be
-     used by putop and MMX/SSE operand and may be overriden by the
-     PREFIX_REPZ/PREFIX_REPNZ fix, we check the PREFIX_DATA prefix
-     separately.  */
-  if (dp->prefix_requirement == PREFIX_OPCODE
-      && (((need_vex
-    ? vex.prefix == REPE_PREFIX_OPCODE
-      || vex.prefix == REPNE_PREFIX_OPCODE
-    : (prefixes
-       & (PREFIX_REPZ | PREFIX_REPNZ)) != 0)
-   && (used_prefixes
-       & (PREFIX_REPZ | PREFIX_REPNZ)) == 0)
-  || (((need_vex
- ? vex.prefix == DATA_PREFIX_OPCODE
- : ((prefixes
-    & (PREFIX_REPZ | PREFIX_REPNZ | PREFIX_DATA))
-   == PREFIX_DATA))
-       && (used_prefixes & PREFIX_DATA) == 0))
-  || (vex.evex && !vex.w != !(used_prefixes & PREFIX_DATA))))
-    {
-      (*info->fprintf_func) (info->stream, "(bad)");
-      return end_codep - priv.the_buffer;
-    }
-
   /* Check maximum code length.  */
   if ((codep - start_codep) > MAX_CODE_LENGTH)
     {

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[PATCH 15/19] x86: also use %BW / %DQ for kshift*

Jan Beulich-2
In reply to this post by Jan Beulich-2
opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
        MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
        MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
        MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
        (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
        MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
        (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
        VEX_W_0F3A33_L_0): Delete.
        (dis386): Adjust "BW" description.
        (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
        0F3A31, 0F3A32, and 0F3A33.
        (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
        entries.
        (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
        entries.

--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -894,14 +894,10 @@ enum
   MOD_VEX_0F385A,
   MOD_VEX_0F388C,
   MOD_VEX_0F388E,
-  MOD_VEX_0F3A30_L_0_W_0,
-  MOD_VEX_0F3A30_L_0_W_1,
-  MOD_VEX_0F3A31_L_0_W_0,
-  MOD_VEX_0F3A31_L_0_W_1,
-  MOD_VEX_0F3A32_L_0_W_0,
-  MOD_VEX_0F3A32_L_0_W_1,
-  MOD_VEX_0F3A33_L_0_W_0,
-  MOD_VEX_0F3A33_L_0_W_1,
+  MOD_VEX_0F3A30_L_0,
+  MOD_VEX_0F3A31_L_0,
+  MOD_VEX_0F3A32_L_0,
+  MOD_VEX_0F3A33_L_0,
 
   MOD_VEX_0FXOP_09_12,
 
@@ -1517,10 +1513,6 @@ enum
   VEX_W_0F3A18_L_1,
   VEX_W_0F3A19_L_1,
   VEX_W_0F3A1D,
-  VEX_W_0F3A30_L_0,
-  VEX_W_0F3A31_L_0,
-  VEX_W_0F3A32_L_0,
-  VEX_W_0F3A33_L_0,
   VEX_W_0F3A38_L_1,
   VEX_W_0F3A39_L_1,
   VEX_W_0F3A46_L_1,
@@ -1799,7 +1791,7 @@ struct dis386 {
    "LS" => print "abs" in 64bit mode and behave as 'S' otherwise
    "LV" => print "abs" for 64bit operand and behave as 'S' otherwise
    "DQ" => print 'd' or 'q' depending on the VEX.W bit
-   "BW" => print 'b' or 'w' depending on the EVEX.W bit
+   "BW" => print 'b' or 'w' depending on the VEX.W bit
    "LP" => print 'w' or 'l' ('d' in Intel mode) if instruction has
    an operand size prefix, or suffix_always is true.  print
    'q' if rex prefix is present.
@@ -7079,22 +7071,22 @@ static const struct dis386 vex_len_table
 
   /* VEX_LEN_0F3A30 */
   {
-    { VEX_W_TABLE (VEX_W_0F3A30_L_0) },
+    { MOD_TABLE (MOD_VEX_0F3A30_L_0) },
   },
 
   /* VEX_LEN_0F3A31 */
   {
-    { VEX_W_TABLE (VEX_W_0F3A31_L_0) },
+    { MOD_TABLE (MOD_VEX_0F3A31_L_0) },
   },
 
   /* VEX_LEN_0F3A32 */
   {
-    { VEX_W_TABLE (VEX_W_0F3A32_L_0) },
+    { MOD_TABLE (MOD_VEX_0F3A32_L_0) },
   },
 
   /* VEX_LEN_0F3A33 */
   {
-    { VEX_W_TABLE (VEX_W_0F3A33_L_0) },
+    { MOD_TABLE (MOD_VEX_0F3A33_L_0) },
   },
 
   /* VEX_LEN_0F3A38 */
@@ -7746,26 +7738,6 @@ static const struct dis386 vex_w_table[]
     { "vcvtps2ph", { EXxmmq, XM, EXxEVexS, Ib }, PREFIX_DATA },
   },
   {
-    /* VEX_W_0F3A30_L_0 */
-    { MOD_TABLE (MOD_VEX_0F3A30_L_0_W_0) },
-    { MOD_TABLE (MOD_VEX_0F3A30_L_0_W_1) },
-  },
-  {
-    /* VEX_W_0F3A31_L_0 */
-    { MOD_TABLE (MOD_VEX_0F3A31_L_0_W_0) },
-    { MOD_TABLE (MOD_VEX_0F3A31_L_0_W_1) },
-  },
-  {
-    /* VEX_W_0F3A32_L_0 */
-    { MOD_TABLE (MOD_VEX_0F3A32_L_0_W_0) },
-    { MOD_TABLE (MOD_VEX_0F3A32_L_0_W_1) },
-  },
-  {
-    /* VEX_W_0F3A33_L_0 */
-    { MOD_TABLE (MOD_VEX_0F3A33_L_0_W_0) },
-    { MOD_TABLE (MOD_VEX_0F3A33_L_0_W_1) },
-  },
-  {
     /* VEX_W_0F3A38_L_1 */
     { "vinserti128", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
   },
@@ -8765,44 +8737,24 @@ static const struct dis386 mod_table[][2
     { "vpmaskmov%DQ", { Mx, Vex, XM }, PREFIX_DATA },
   },
   {
-    /* MOD_VEX_0F3A30_L_0_W_0 */
-    { Bad_Opcode },
-    { "kshiftrb",       { MaskG, MaskR, Ib }, PREFIX_DATA },
-  },
-  {
-    /* MOD_VEX_0F3A30_L_0_W_1 */
-    { Bad_Opcode },
-    { "kshiftrw",       { MaskG, MaskR, Ib }, PREFIX_DATA },
-  },
-  {
-    /* MOD_VEX_0F3A31_L_0_W_0 */
-    { Bad_Opcode },
-    { "kshiftrd",       { MaskG, MaskR, Ib }, PREFIX_DATA },
-  },
-  {
-    /* MOD_VEX_0F3A31_L_0_W_1 */
-    { Bad_Opcode },
-    { "kshiftrq",       { MaskG, MaskR, Ib }, PREFIX_DATA },
-  },
-  {
-    /* MOD_VEX_0F3A32_L_0_W_0 */
+    /* MOD_VEX_0F3A30_L_0 */
     { Bad_Opcode },
-    { "kshiftlb",       { MaskG, MaskR, Ib }, PREFIX_DATA },
+    { "kshiftr%BW", { MaskG, MaskR, Ib }, PREFIX_DATA },
   },
   {
-    /* MOD_VEX_0F3A32_L_0_W_1 */
+    /* MOD_VEX_0F3A31_L_0 */
     { Bad_Opcode },
-    { "kshiftlw",       { MaskG, MaskR, Ib }, PREFIX_DATA },
+    { "kshiftr%DQ", { MaskG, MaskR, Ib }, PREFIX_DATA },
   },
   {
-    /* MOD_VEX_0F3A33_L_0_W_0 */
+    /* MOD_VEX_0F3A32_L_0 */
     { Bad_Opcode },
-    { "kshiftld",       { MaskG, MaskR, Ib }, PREFIX_DATA },
+    { "kshiftl%BW", { MaskG, MaskR, Ib }, PREFIX_DATA },
   },
   {
-    /* MOD_VEX_0F3A33_L_0_W_1 */
+    /* MOD_VEX_0F3A33_L_0 */
     { Bad_Opcode },
-    { "kshiftlq",       { MaskG, MaskR, Ib }, PREFIX_DATA },
+    { "kshiftl%DQ", { MaskG, MaskR, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0FXOP_09_12 */

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[PATCH 16/19] x86: simplify decode of opcodes valid only without any (embedded) prefix

Jan Beulich-2
In reply to this post by Jan Beulich-2
In this case there's no need to go through prefix_table[] at all - the
.prefix_requirement == PREFIX_OPCODE machinery takes care of this case
already.

A couple of further adjustments are needed though:
- Gv / Ev and alike then can't be used (needs to be Gdq / Edq instead),
- dq_mode and friends shouldn't lead to PREFIX_DATA getting set in
  used_prefixes.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
        PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
        PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
        PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
        PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
        PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
        (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
        VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
        VEX_LEN_0F38F3_R_3_P_0): Rename to ...
        (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
        VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
        (reg_table, prefix_table, three_byte_table, vex_table,
        vex_len_table, mod_table, rm_table): Replace / remove respective
        entries.
        (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
        of PREFIX_DATA in used_prefixes.

--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -809,7 +809,7 @@ enum
   MOD_0F38F8_PREFIX_1,
   MOD_0F38F8_PREFIX_2,
   MOD_0F38F8_PREFIX_3,
-  MOD_0F38F9_PREFIX_0,
+  MOD_0F38F9,
   MOD_62_32BIT,
   MOD_C4_32BIT,
   MOD_C5_32BIT,
@@ -951,7 +951,6 @@ enum
   PREFIX_0F01_REG_5_MOD_3_RM_1,
   PREFIX_0F01_REG_5_MOD_3_RM_2,
   PREFIX_0F01_REG_7_MOD_3_RM_2,
-  PREFIX_0F01_REG_7_MOD_3_RM_3,
   PREFIX_0F09,
   PREFIX_0F10,
   PREFIX_0F11,
@@ -995,7 +994,6 @@ enum
   PREFIX_0FAE_REG_3_MOD_3,
   PREFIX_0FAE_REG_4_MOD_0,
   PREFIX_0FAE_REG_4_MOD_3,
-  PREFIX_0FAE_REG_5_MOD_0,
   PREFIX_0FAE_REG_5_MOD_3,
   PREFIX_0FAE_REG_6_MOD_0,
   PREFIX_0FAE_REG_6_MOD_3,
@@ -1004,7 +1002,6 @@ enum
   PREFIX_0FBC,
   PREFIX_0FBD,
   PREFIX_0FC2,
-  PREFIX_0FC3_MOD_0,
   PREFIX_0FC7_REG_6_MOD_0,
   PREFIX_0FC7_REG_6_MOD_3,
   PREFIX_0FC7_REG_7_MOD_3,
@@ -1014,18 +1011,10 @@ enum
   PREFIX_0FE7,
   PREFIX_0FF0,
   PREFIX_0FF7,
-  PREFIX_0F38C8,
-  PREFIX_0F38C9,
-  PREFIX_0F38CA,
-  PREFIX_0F38CB,
-  PREFIX_0F38CC,
-  PREFIX_0F38CD,
   PREFIX_0F38F0,
   PREFIX_0F38F1,
   PREFIX_0F38F6,
   PREFIX_0F38F8,
-  PREFIX_0F38F9,
-  PREFIX_0F3ACC,
   PREFIX_VEX_0F10,
   PREFIX_VEX_0F11,
   PREFIX_VEX_0F12,
@@ -1056,7 +1045,6 @@ enum
   PREFIX_VEX_0F5F,
   PREFIX_VEX_0F6F,
   PREFIX_VEX_0F70,
-  PREFIX_VEX_0F77,
   PREFIX_VEX_0F7C,
   PREFIX_VEX_0F7D,
   PREFIX_VEX_0F7E,
@@ -1075,10 +1063,6 @@ enum
   PREFIX_VEX_0F384B_X86_64,
   PREFIX_VEX_0F385C_X86_64,
   PREFIX_VEX_0F385E_X86_64,
-  PREFIX_VEX_0F38F2,
-  PREFIX_VEX_0F38F3_REG_1,
-  PREFIX_VEX_0F38F3_REG_2,
-  PREFIX_VEX_0F38F3_REG_3,
   PREFIX_VEX_0F38F5,
   PREFIX_VEX_0F38F6,
   PREFIX_VEX_0F38F7,
@@ -1239,7 +1223,7 @@ enum
   VEX_LEN_0F4B_P_0,
   VEX_LEN_0F4B_P_2,
   VEX_LEN_0F6E,
-  VEX_LEN_0F77_P_0,
+  VEX_LEN_0F77,
   VEX_LEN_0F7E_P_1,
   VEX_LEN_0F7E_P_2,
   VEX_LEN_0F90_P_0,
@@ -1281,10 +1265,10 @@ enum
   VEX_LEN_0F385E_X86_64_P_2_W_0_M_0,
   VEX_LEN_0F385E_X86_64_P_3_W_0_M_0,
   VEX_LEN_0F38DB,
-  VEX_LEN_0F38F2_P_0,
-  VEX_LEN_0F38F3_R_1_P_0,
-  VEX_LEN_0F38F3_R_2_P_0,
-  VEX_LEN_0F38F3_R_3_P_0,
+  VEX_LEN_0F38F2,
+  VEX_LEN_0F38F3_R_1,
+  VEX_LEN_0F38F3_R_2,
+  VEX_LEN_0F38F3_R_3,
   VEX_LEN_0F38F5_P_0,
   VEX_LEN_0F38F5_P_1,
   VEX_LEN_0F38F5_P_3,
@@ -3032,9 +3016,9 @@ static const struct dis386 reg_table[][8
   /* REG_VEX_0F38F3 */
   {
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F38F3_REG_1) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38F3_REG_2) },
-    { PREFIX_TABLE (PREFIX_VEX_0F38F3_REG_3) },
+    { VEX_LEN_TABLE (VEX_LEN_0F38F3_R_1) },
+    { VEX_LEN_TABLE (VEX_LEN_0F38F3_R_2) },
+    { VEX_LEN_TABLE (VEX_LEN_0F38F3_R_3) },
   },
   /* REG_0FXOP_09_01_L_0 */
   {
@@ -3122,11 +3106,6 @@ static const struct dis386 prefix_table[
     { "mcommit", { Skip_MODRM }, 0 },
   },
 
-  /* PREFIX_0F01_REG_7_MOD_3_RM_3 */
-  {
-    { "mwaitx", { { OP_Mwait, eBX_reg } }, 0  },
-  },
-
   /* PREFIX_0F09 */
   {
     { "wbinvd",   { XX }, 0 },
@@ -3443,11 +3422,6 @@ static const struct dis386 prefix_table[
     { "ptwrite{%LQ|}", { Edq }, 0 },
   },
 
-  /* PREFIX_0FAE_REG_5_MOD_0 */
-  {
-    { "xrstor", { FXSAVE }, PREFIX_OPCODE },
-  },
-
   /* PREFIX_0FAE_REG_5_MOD_3 */
   {
     { "lfence", { Skip_MODRM }, 0 },
@@ -3504,11 +3478,6 @@ static const struct dis386 prefix_table[
     { "cmpsd", { XM, EXq, CMP }, PREFIX_OPCODE },
   },
 
-  /* PREFIX_0FC3_MOD_0 */
-  {
-    { "movntiS", { Edq, Gdq }, PREFIX_OPCODE },
-  },
-
   /* PREFIX_0FC7_REG_6_MOD_0 */
   {
     { "vmptrld",{ Mq }, 0 },
@@ -3576,36 +3545,6 @@ static const struct dis386 prefix_table[
     { "maskmovdqu", { XM, XS }, PREFIX_OPCODE },
   },
 
-  /* PREFIX_0F38C8 */
-  {
-    { "sha1nexte", { XM, EXxmm }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F38C9 */
-  {
-    { "sha1msg1", { XM, EXxmm }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F38CA */
-  {
-    { "sha1msg2", { XM, EXxmm }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F38CB */
-  {
-    { "sha256rnds2", { XM, EXxmm, XMM0 }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F38CC */
-  {
-    { "sha256msg1", { XM, EXxmm }, PREFIX_OPCODE },
-  },
-
-  /* PREFIX_0F38CD */
-  {
-    { "sha256msg2", { XM, EXxmm }, PREFIX_OPCODE },
-  },
-
   /* PREFIX_0F38F0 */
   {
     { "movbeS", { Gv, Mv }, PREFIX_OPCODE },
@@ -3638,16 +3577,6 @@ static const struct dis386 prefix_table[
     { MOD_TABLE (MOD_0F38F8_PREFIX_3) },
   },
 
-  /* PREFIX_0F38F9 */
-  {
-    { MOD_TABLE (MOD_0F38F9_PREFIX_0) },
-  },
-
-  /* PREFIX_0F3ACC */
-  {
-    { "sha1rnds4", { XM, EXxmm, Ib }, PREFIX_OPCODE },
-  },
-
   /* PREFIX_VEX_0F10 */
   {
     { "vmovups", { XM, EXx }, 0 },
@@ -3871,11 +3800,6 @@ static const struct dis386 prefix_table[
     { "vpshuflw", { XM, EXx, Ib }, 0 },
   },
 
-  /* PREFIX_VEX_0F77 */
-  {
-    { VEX_LEN_TABLE (VEX_LEN_0F77_P_0) },
-  },
-
   /* PREFIX_VEX_0F7C */
   {
     { Bad_Opcode },
@@ -4013,26 +3937,6 @@ static const struct dis386 prefix_table[
     { VEX_W_TABLE (VEX_W_0F385E_X86_64_P_3) },
   },
 
-  /* PREFIX_VEX_0F38F2 */
-  {
-    { VEX_LEN_TABLE (VEX_LEN_0F38F2_P_0) },
-  },
-
-  /* PREFIX_VEX_0F38F3_REG_1 */
-  {
-    { VEX_LEN_TABLE (VEX_LEN_0F38F3_R_1_P_0) },
-  },
-
-  /* PREFIX_VEX_0F38F3_REG_2 */
-  {
-    { VEX_LEN_TABLE (VEX_LEN_0F38F3_R_2_P_0) },
-  },
-
-  /* PREFIX_VEX_0F38F3_REG_3 */
-  {
-    { VEX_LEN_TABLE (VEX_LEN_0F38F3_R_3_P_0) },
-  },
-
   /* PREFIX_VEX_0F38F5 */
   {
     { VEX_LEN_TABLE (VEX_LEN_0F38F5_P_0) },
@@ -4504,12 +4408,12 @@ static const struct dis386 three_byte_ta
     { Bad_Opcode },
     { Bad_Opcode },
     /* c8 */
-    { PREFIX_TABLE (PREFIX_0F38C8) },
-    { PREFIX_TABLE (PREFIX_0F38C9) },
-    { PREFIX_TABLE (PREFIX_0F38CA) },
-    { PREFIX_TABLE (PREFIX_0F38CB) },
-    { PREFIX_TABLE (PREFIX_0F38CC) },
-    { PREFIX_TABLE (PREFIX_0F38CD) },
+    { "sha1nexte", { XM, EXxmm }, PREFIX_OPCODE },
+    { "sha1msg1", { XM, EXxmm }, PREFIX_OPCODE },
+    { "sha1msg2", { XM, EXxmm }, PREFIX_OPCODE },
+    { "sha256rnds2", { XM, EXxmm, XMM0 }, PREFIX_OPCODE },
+    { "sha256msg1", { XM, EXxmm }, PREFIX_OPCODE },
+    { "sha256msg2", { XM, EXxmm }, PREFIX_OPCODE },
     { Bad_Opcode },
     { "gf2p8mulb", { XM, EXxmm }, PREFIX_DATA },
     /* d0 */
@@ -4559,7 +4463,7 @@ static const struct dis386 three_byte_ta
     { Bad_Opcode },
     /* f8 */
     { PREFIX_TABLE (PREFIX_0F38F8) },
-    { PREFIX_TABLE (PREFIX_0F38F9) },
+    { MOD_TABLE (MOD_0F38F9) },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -4799,7 +4703,7 @@ static const struct dis386 three_byte_ta
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_0F3ACC) },
+    { "sha1rnds4", { XM, EXxmm, Ib }, PREFIX_OPCODE },
     { Bad_Opcode },
     { "gf2p8affineqb", { XM, EXxmm, Ib }, PREFIX_DATA },
     { "gf2p8affineinvqb", { XM, EXxmm, Ib }, PREFIX_DATA },
@@ -5873,7 +5777,7 @@ static const struct dis386 vex_table[][2
     { "vpcmpeqb", { XM, Vex, EXx }, PREFIX_DATA },
     { "vpcmpeqw", { XM, Vex, EXx }, PREFIX_DATA },
     { "vpcmpeqd", { XM, Vex, EXx }, PREFIX_DATA },
-    { PREFIX_TABLE (PREFIX_VEX_0F77) },
+    { VEX_LEN_TABLE (VEX_LEN_0F77) },
     /* 78 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -6303,7 +6207,7 @@ static const struct dis386 vex_table[][2
     /* f0 */
     { Bad_Opcode },
     { Bad_Opcode },
-    { PREFIX_TABLE (PREFIX_VEX_0F38F2) },
+    { VEX_LEN_TABLE (VEX_LEN_0F38F2) },
     { REG_TABLE (REG_VEX_0F38F3) },
     { Bad_Opcode },
     { PREFIX_TABLE (PREFIX_VEX_0F38F5) },
@@ -6729,7 +6633,7 @@ static const struct dis386 vex_len_table
     { "vmovK", { XMScalar, Edq }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0F77_P_1 */
+  /* VEX_LEN_0F77 */
   {
     { "vzeroupper", { XX }, 0 },
     { "vzeroall", { XX }, 0 },
@@ -6944,24 +6848,24 @@ static const struct dis386 vex_len_table
     { "vaesimc", { XM, EXx }, PREFIX_DATA },
   },
 
-  /* VEX_LEN_0F38F2_P_0 */
+  /* VEX_LEN_0F38F2 */
   {
-    { "andnS", { Gdq, VexGdq, Edq }, 0 },
+    { "andnS", { Gdq, VexGdq, Edq }, PREFIX_OPCODE },
   },
 
-  /* VEX_LEN_0F38F3_R_1_P_0 */
+  /* VEX_LEN_0F38F3_R_1 */
   {
-    { "blsrS", { VexGdq, Edq }, 0 },
+    { "blsrS", { VexGdq, Edq }, PREFIX_OPCODE },
   },
 
-  /* VEX_LEN_0F38F3_R_2_P_0 */
+  /* VEX_LEN_0F38F3_R_2 */
   {
-    { "blsmskS", { VexGdq, Edq }, 0 },
+    { "blsmskS", { VexGdq, Edq }, PREFIX_OPCODE },
   },
 
-  /* VEX_LEN_0F38F3_R_3_P_0 */
+  /* VEX_LEN_0F38F3_R_3 */
   {
-    { "blsiS", { VexGdq, Edq }, 0 },
+    { "blsiS", { VexGdq, Edq }, PREFIX_OPCODE },
   },
 
   /* VEX_LEN_0F38F5_P_0 */
@@ -8191,7 +8095,7 @@ static const struct dis386 mod_table[][2
   },
   {
     /* MOD_0FAE_REG_5 */
-    { PREFIX_TABLE (PREFIX_0FAE_REG_5_MOD_0) },
+    { "xrstor", { FXSAVE }, PREFIX_OPCODE },
     { PREFIX_TABLE (PREFIX_0FAE_REG_5_MOD_3) },
   },
   {
@@ -8218,7 +8122,7 @@ static const struct dis386 mod_table[][2
   },
   {
     /* MOD_0FC3 */
-    { PREFIX_TABLE (PREFIX_0FC3_MOD_0) },
+    { "movntiS", { Edq, Gdq }, PREFIX_OPCODE },
   },
   {
     /* MOD_0FC7_REG_3 */
@@ -8331,8 +8235,8 @@ static const struct dis386 mod_table[][2
     { "enqcmd", { Gva, M }, PREFIX_OPCODE },
   },
   {
-    /* MOD_0F38F9_PREFIX_0 */
-    { "movdiri", { Ev, Gv }, PREFIX_OPCODE },
+    /* MOD_0F38F9 */
+    { "movdiri", { Edq, Gdq }, PREFIX_OPCODE },
   },
   {
     /* MOD_62_32BIT */
@@ -8832,7 +8736,7 @@ static const struct dis386 rm_table[][8]
     { "swapgs", { Skip_MODRM }, 0  },
     { "rdtscp", { Skip_MODRM }, 0  },
     { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_2) },
-    { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_3) },
+    { "mwaitx", { { OP_Mwait, eBX_reg } }, PREFIX_OPCODE },
     { "clzero", { Skip_MODRM }, 0  },
     { "rdpru", { Skip_MODRM }, 0  },
   },
@@ -11286,9 +11190,11 @@ intel_operand_size (int bytemode, int si
       USED_REX (REX_W);
       if (rex & REX_W)
  oappend ("QWORD PTR ");
+      else if (bytemode == dq_mode)
+ oappend ("DWORD PTR ");
       else
  {
-  if ((sizeflag & DFLAG) || bytemode == dq_mode)
+  if (sizeflag & DFLAG)
     oappend ("DWORD PTR ");
   else
     oappend ("WORD PTR ");
@@ -11684,11 +11590,11 @@ OP_E_register (int bytemode, int sizefla
       USED_REX (REX_W);
       if (rex & REX_W)
  names = names64;
+      else if (bytemode != v_mode && bytemode != v_swap_mode)
+ names = names32;
       else
  {
-  if ((sizeflag & DFLAG)
-      || (bytemode != v_mode
-  && bytemode != v_swap_mode))
+  if (sizeflag & DFLAG)
     names = names32;
   else
     names = names16;
@@ -12280,10 +12186,11 @@ OP_G (int bytemode, int sizeflag)
       USED_REX (REX_W);
       if (rex & REX_W)
  oappend (names64[modrm.reg + add]);
+      else if (bytemode != v_mode && bytemode != movsxd_mode)
+ oappend (names32[modrm.reg + add]);
       else
  {
-  if ((sizeflag & DFLAG)
-      || (bytemode != v_mode && bytemode != movsxd_mode))
+  if (sizeflag & DFLAG)
     oappend (names32[modrm.reg + add]);
   else
     oappend (names16[modrm.reg + add]);

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[PATCH 17/19] x86: drop Rdq, Rd, and MaskR

Jan Beulich-2
In reply to this post by Jan Beulich-2
Rdq, Rd, and MaskR can be replaced by Edq, Ed / Rm, and MaskE
respectively, as OP_R() doesn't enforce ModRM.mod == 3, and hence where
MOD matters but hasn't been decoded yet it needs to be anyway. (The case
of converting to Rm is temporary until a subsequent change.)

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (Rd, Rdq, MaskR): Delete.
        (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
        MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
        MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
        MOD_EVEX_0F387C): New enumerators.
        (reg_table): Use Edq for rdssp.
        (prefix_table): Use Edq for incssp.
        (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
        kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
        ktest*, and kshift*. Use Edq / MaskE for kmov*.
        * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
        * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
        0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
        * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
        0F3828_P_1 and 0F3838_P_1.
        * i386-dis-evex-w.h: Reference mod_table[] for opcodes
        0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.

--- a/opcodes/i386-dis-evex-mod.h
+++ b/opcodes/i386-dis-evex-mod.h
@@ -44,6 +44,26 @@
   {
     { EVEX_LEN_TABLE (EVEX_LEN_0F381B_W_1_M_0) },
   },
+  /* MOD_EVEX_0F3828_P_1 */
+  {
+    { Bad_Opcode },
+    { "vpmovm2%BW", { XM, MaskE }, 0 },
+  },
+  /* MOD_EVEX_0F382A_P_1_W_1 */
+  {
+    { Bad_Opcode },
+    { "vpbroadcastmb2q", { XM, MaskE }, 0 },
+  },
+  /* MOD_EVEX_0F3838_P_1 */
+  {
+    { Bad_Opcode },
+    { "vpmovm2%DQ", { XM, MaskE }, 0 },
+  },
+  /* MOD_EVEX_0F383A_P_1_W_0 */
+  {
+    { Bad_Opcode },
+    { "vpbroadcastmw2d", { XM, MaskE }, 0 },
+  },
   /* MOD_EVEX_0F385A_W_0 */
   {
     { EVEX_LEN_TABLE (EVEX_LEN_0F385A_W_0_M_0) },
@@ -60,6 +80,21 @@
   {
     { EVEX_LEN_TABLE (EVEX_LEN_0F385B_W_1_M_0) },
   },
+  /* MOD_EVEX_0F387A_W_0 */
+  {
+    { Bad_Opcode },
+    { "vpbroadcastb", { XM, Ed }, PREFIX_DATA },
+  },
+  /* MOD_EVEX_0F387B_W_0 */
+  {
+    { Bad_Opcode },
+    { "vpbroadcastw", { XM, Ed }, PREFIX_DATA },
+  },
+  /* MOD_EVEX_0F387C */
+  {
+    { Bad_Opcode },
+    { "vpbroadcastK", { XM, Edq }, PREFIX_DATA },
+  },
   {
     /* MOD_EVEX_0F38C6_REG_1 */
     { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_R_1_M_0) },
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -250,7 +250,7 @@
   /* PREFIX_EVEX_0F3828 */
   {
     { Bad_Opcode },
-    { "vpmovm2%BW", { XM, MaskR }, 0 },
+    { MOD_TABLE (MOD_EVEX_0F3828_P_1) },
     { VEX_W_TABLE (EVEX_W_0F3828_P_2) },
   },
   /* PREFIX_EVEX_0F3829 */
@@ -304,7 +304,7 @@
   /* PREFIX_EVEX_0F3838 */
   {
     { Bad_Opcode },
-    { "vpmovm2%DQ", { XM, MaskR }, 0 },
+    { MOD_TABLE (MOD_EVEX_0F3838_P_1) },
     { "vpminsb", { XM, Vex, EXx }, 0 },
   },
   /* PREFIX_EVEX_0F3839 */
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -455,7 +455,7 @@
   /* EVEX_W_0F382A_P_1 */
   {
     { Bad_Opcode },
-    { "vpbroadcastmb2q", { XM, MaskR }, 0 },
+    { MOD_TABLE (MOD_EVEX_0F382A_P_1_W_1) },
   },
   /* EVEX_W_0F382A_P_2 */
   {
@@ -500,7 +500,7 @@
   },
   /* EVEX_W_0F383A_P_1 */
   {
-    { "vpbroadcastmw2d", { XM, MaskR }, 0 },
+    { MOD_TABLE (MOD_EVEX_0F383A_P_1_W_0) },
   },
   /* EVEX_W_0F3852_P_1 */
   {
@@ -544,11 +544,11 @@
   },
   /* EVEX_W_0F387A */
   {
-    { "vpbroadcastb", { XM, Rd }, PREFIX_DATA },
+    { MOD_TABLE (MOD_EVEX_0F387A_W_0) },
   },
   /* EVEX_W_0F387B */
   {
-    { "vpbroadcastw", { XM, Rd }, PREFIX_DATA },
+    { MOD_TABLE (MOD_EVEX_0F387B_W_0) },
   },
   /* EVEX_W_0F3883 */
   {
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -432,7 +432,7 @@ static const struct dis386 evex_table[][
     { VEX_W_TABLE (VEX_W_0F3879) },
     { VEX_W_TABLE (EVEX_W_0F387A) },
     { VEX_W_TABLE (EVEX_W_0F387B) },
-    { "vpbroadcastK", { XM, Rdq }, PREFIX_DATA },
+    { MOD_TABLE (MOD_EVEX_0F387C) },
     { "vpermt2%BW", { XM, Vex, EXx }, PREFIX_DATA },
     { "vpermt2%DQ", { XM, Vex, EXx }, PREFIX_DATA },
     { "vpermt2p%XW", { XM, Vex, EXx }, PREFIX_DATA },
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -274,8 +274,6 @@ fetch_data (struct disassemble_info *inf
 #define Gm { OP_G, m_mode }
 #define Gva { OP_G, va_mode }
 #define Gw { OP_G, w_mode }
-#define Rd { OP_R, d_mode }
-#define Rdq { OP_R, dq_mode }
 #define Rm { OP_R, m_mode }
 #define Ib { OP_I, b_mode }
 #define sIb { OP_sI, b_mode } /* sign extened byte */
@@ -412,7 +410,6 @@ fetch_data (struct disassemble_info *inf
 #define MaskG { OP_G, mask_mode }
 #define MaskE { OP_E, mask_mode }
 #define MaskBDE { OP_E, mask_bd_mode }
-#define MaskR { OP_R, mask_mode }
 #define MaskVex { OP_VEX, mask_mode }
 
 #define MVexVSIBDWpX { OP_M, vex_vsib_d_w_dq_mode }
@@ -912,10 +909,17 @@ enum
   MOD_EVEX_0F381A_W_1,
   MOD_EVEX_0F381B_W_0,
   MOD_EVEX_0F381B_W_1,
+  MOD_EVEX_0F3828_P_1,
+  MOD_EVEX_0F382A_P_1_W_1,
+  MOD_EVEX_0F3838_P_1,
+  MOD_EVEX_0F383A_P_1_W_0,
   MOD_EVEX_0F385A_W_0,
   MOD_EVEX_0F385A_W_1,
   MOD_EVEX_0F385B_W_0,
   MOD_EVEX_0F385B_W_1,
+  MOD_EVEX_0F387A_W_0,
+  MOD_EVEX_0F387B_W_0,
+  MOD_EVEX_0F387C,
   MOD_EVEX_0F38C6_REG_1,
   MOD_EVEX_0F38C6_REG_2,
   MOD_EVEX_0F38C6_REG_5,
@@ -2884,7 +2888,7 @@ static const struct dis386 reg_table[][8
   /* REG_0F1E_P_1_MOD_3 */
   {
     { "nopQ", { Ev }, 0 },
-    { "rdsspK", { Rdq }, PREFIX_OPCODE },
+    { "rdsspK", { Edq }, PREFIX_OPCODE },
     { "nopQ", { Ev }, 0 },
     { "nopQ", { Ev }, 0 },
     { "nopQ", { Ev }, 0 },
@@ -3425,7 +3429,7 @@ static const struct dis386 prefix_table[
   /* PREFIX_0FAE_REG_5_MOD_3 */
   {
     { "lfence", { Skip_MODRM }, 0 },
-    { "incsspK", { Rdq }, PREFIX_OPCODE },
+    { "incsspK", { Edq }, PREFIX_OPCODE },
   },
 
   /* PREFIX_0FAE_REG_6_MOD_0 */
@@ -7990,12 +7994,12 @@ static const struct dis386 mod_table[][2
   {
     /* MOD_0F24 */
     { Bad_Opcode },
-    { "movL", { Rd, Td }, 0 },
+    { "movL", { Rm, Td }, 0 },
   },
   {
     /* MOD_0F26 */
     { Bad_Opcode },
-    { "movL", { Td, Rd }, 0 },
+    { "movL", { Td, Rm }, 0 },
   },
   {
     /* MOD_0F2B_PREFIX_0 */
@@ -8286,157 +8290,157 @@ static const struct dis386 mod_table[][2
   {
     /* MOD_VEX_W_0_0F41_P_0_LEN_1 */
     { Bad_Opcode },
-    { "kandw",          { MaskG, MaskVex, MaskR }, 0 },
+    { "kandw",          { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F41_P_0_LEN_1 */
     { Bad_Opcode },
-    { "kandq",          { MaskG, MaskVex, MaskR }, 0 },
+    { "kandq",          { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F41_P_2_LEN_1 */
     { Bad_Opcode },
-    { "kandb",          { MaskG, MaskVex, MaskR }, 0 },
+    { "kandb",          { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F41_P_2_LEN_1 */
     { Bad_Opcode },
-    { "kandd",          { MaskG, MaskVex, MaskR }, 0 },
+    { "kandd",          { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F42_P_0_LEN_1 */
     { Bad_Opcode },
-    { "kandnw",         { MaskG, MaskVex, MaskR }, 0 },
+    { "kandnw",         { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F42_P_0_LEN_1 */
     { Bad_Opcode },
-    { "kandnq",         { MaskG, MaskVex, MaskR }, 0 },
+    { "kandnq",         { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F42_P_2_LEN_1 */
     { Bad_Opcode },
-    { "kandnb",         { MaskG, MaskVex, MaskR }, 0 },
+    { "kandnb",         { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F42_P_2_LEN_1 */
     { Bad_Opcode },
-    { "kandnd",         { MaskG, MaskVex, MaskR }, 0 },
+    { "kandnd",         { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F44_P_0_LEN_0 */
     { Bad_Opcode },
-    { "knotw",          { MaskG, MaskR }, 0 },
+    { "knotw",          { MaskG, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F44_P_0_LEN_0 */
     { Bad_Opcode },
-    { "knotq",          { MaskG, MaskR }, 0 },
+    { "knotq",          { MaskG, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F44_P_2_LEN_0 */
     { Bad_Opcode },
-    { "knotb",          { MaskG, MaskR }, 0 },
+    { "knotb",          { MaskG, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F44_P_2_LEN_0 */
     { Bad_Opcode },
-    { "knotd",          { MaskG, MaskR }, 0 },
+    { "knotd",          { MaskG, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F45_P_0_LEN_1 */
     { Bad_Opcode },
-    { "korw",       { MaskG, MaskVex, MaskR }, 0 },
+    { "korw",       { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F45_P_0_LEN_1 */
     { Bad_Opcode },
-    { "korq",       { MaskG, MaskVex, MaskR }, 0 },
+    { "korq",       { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F45_P_2_LEN_1 */
     { Bad_Opcode },
-    { "korb",       { MaskG, MaskVex, MaskR }, 0 },
+    { "korb",       { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F45_P_2_LEN_1 */
     { Bad_Opcode },
-    { "kord",       { MaskG, MaskVex, MaskR }, 0 },
+    { "kord",       { MaskG, MaskVex, MaskE }, 0 },
   },
  {
     /* MOD_VEX_W_0_0F46_P_0_LEN_1 */
     { Bad_Opcode },
-    { "kxnorw",     { MaskG, MaskVex, MaskR }, 0 },
+    { "kxnorw",     { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F46_P_0_LEN_1 */
     { Bad_Opcode },
-    { "kxnorq",     { MaskG, MaskVex, MaskR }, 0 },
+    { "kxnorq",     { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F46_P_2_LEN_1 */
     { Bad_Opcode },
-    { "kxnorb",     { MaskG, MaskVex, MaskR }, 0 },
+    { "kxnorb",     { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F46_P_2_LEN_1 */
     { Bad_Opcode },
-    { "kxnord",     { MaskG, MaskVex, MaskR }, 0 },
+    { "kxnord",     { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F47_P_0_LEN_1 */
     { Bad_Opcode },
-    { "kxorw",      { MaskG, MaskVex, MaskR }, 0 },
+    { "kxorw",      { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F47_P_0_LEN_1 */
     { Bad_Opcode },
-    { "kxorq",      { MaskG, MaskVex, MaskR }, 0 },
+    { "kxorq",      { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F47_P_2_LEN_1 */
     { Bad_Opcode },
-    { "kxorb",      { MaskG, MaskVex, MaskR }, 0 },
+    { "kxorb",      { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F47_P_2_LEN_1 */
     { Bad_Opcode },
-    { "kxord",      { MaskG, MaskVex, MaskR }, 0 },
+    { "kxord",      { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F4A_P_0_LEN_1 */
     { Bad_Opcode },
-    { "kaddw",          { MaskG, MaskVex, MaskR }, 0 },
+    { "kaddw",          { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F4A_P_0_LEN_1 */
     { Bad_Opcode },
-    { "kaddq",          { MaskG, MaskVex, MaskR }, 0 },
+    { "kaddq",          { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F4A_P_2_LEN_1 */
     { Bad_Opcode },
-    { "kaddb",          { MaskG, MaskVex, MaskR }, 0 },
+    { "kaddb",          { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F4A_P_2_LEN_1 */
     { Bad_Opcode },
-    { "kaddd",          { MaskG, MaskVex, MaskR }, 0 },
+    { "kaddd",          { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F4B_P_0_LEN_1 */
     { Bad_Opcode },
-    { "kunpckwd",   { MaskG, MaskVex, MaskR }, 0 },
+    { "kunpckwd",   { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F4B_P_0_LEN_1 */
     { Bad_Opcode },
-    { "kunpckdq",   { MaskG, MaskVex, MaskR }, 0 },
+    { "kunpckdq",   { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F4B_P_2_LEN_1 */
     { Bad_Opcode },
-    { "kunpckbw",   { MaskG, MaskVex, MaskR }, 0 },
+    { "kunpckbw",   { MaskG, MaskVex, MaskE }, 0 },
   },
   {
     /* MOD_VEX_0F50 */
@@ -8516,72 +8520,72 @@ static const struct dis386 mod_table[][2
   {
     /* MOD_VEX_W_0_0F92_P_0_LEN_0 */
     { Bad_Opcode },
-    { "kmovw", { MaskG, Rdq }, 0 },
+    { "kmovw", { MaskG, Edq }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F92_P_2_LEN_0 */
     { Bad_Opcode },
-    { "kmovb", { MaskG, Rdq }, 0 },
+    { "kmovb", { MaskG, Edq }, 0 },
   },
   {
     /* MOD_VEX_0F92_P_3_LEN_0 */
     { Bad_Opcode },
-    { "kmovK", { MaskG, Rdq }, 0 },
+    { "kmovK", { MaskG, Edq }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F93_P_0_LEN_0 */
     { Bad_Opcode },
-    { "kmovw", { Gdq, MaskR }, 0 },
+    { "kmovw", { Gdq, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F93_P_2_LEN_0 */
     { Bad_Opcode },
-    { "kmovb", { Gdq, MaskR }, 0 },
+    { "kmovb", { Gdq, MaskE }, 0 },
   },
   {
     /* MOD_VEX_0F93_P_3_LEN_0 */
     { Bad_Opcode },
-    { "kmovK", { Gdq, MaskR }, 0 },
+    { "kmovK", { Gdq, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F98_P_0_LEN_0 */
     { Bad_Opcode },
-    { "kortestw", { MaskG, MaskR }, 0 },
+    { "kortestw", { MaskG, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F98_P_0_LEN_0 */
     { Bad_Opcode },
-    { "kortestq", { MaskG, MaskR }, 0 },
+    { "kortestq", { MaskG, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F98_P_2_LEN_0 */
     { Bad_Opcode },
-    { "kortestb", { MaskG, MaskR }, 0 },
+    { "kortestb", { MaskG, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F98_P_2_LEN_0 */
     { Bad_Opcode },
-    { "kortestd", { MaskG, MaskR }, 0 },
+    { "kortestd", { MaskG, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F99_P_0_LEN_0 */
     { Bad_Opcode },
-    { "ktestw", { MaskG, MaskR }, 0 },
+    { "ktestw", { MaskG, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F99_P_0_LEN_0 */
     { Bad_Opcode },
-    { "ktestq", { MaskG, MaskR }, 0 },
+    { "ktestq", { MaskG, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F99_P_2_LEN_0 */
     { Bad_Opcode },
-    { "ktestb", { MaskG, MaskR }, 0 },
+    { "ktestb", { MaskG, MaskE }, 0 },
   },
   {
     /* MOD_VEX_W_1_0F99_P_2_LEN_0 */
     { Bad_Opcode },
-    { "ktestd", { MaskG, MaskR }, 0 },
+    { "ktestd", { MaskG, MaskE }, 0 },
   },
   {
     /* MOD_VEX_0FAE_REG_2 */
@@ -8643,22 +8647,22 @@ static const struct dis386 mod_table[][2
   {
     /* MOD_VEX_0F3A30_L_0 */
     { Bad_Opcode },
-    { "kshiftr%BW", { MaskG, MaskR, Ib }, PREFIX_DATA },
+    { "kshiftr%BW", { MaskG, MaskE, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0F3A31_L_0 */
     { Bad_Opcode },
-    { "kshiftr%DQ", { MaskG, MaskR, Ib }, PREFIX_DATA },
+    { "kshiftr%DQ", { MaskG, MaskE, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0F3A32_L_0 */
     { Bad_Opcode },
-    { "kshiftl%BW", { MaskG, MaskR, Ib }, PREFIX_DATA },
+    { "kshiftl%BW", { MaskG, MaskE, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0F3A33_L_0 */
     { Bad_Opcode },
-    { "kshiftl%DQ", { MaskG, MaskR, Ib }, PREFIX_DATA },
+    { "kshiftl%DQ", { MaskG, MaskE, Ib }, PREFIX_DATA },
   },
   {
     /* MOD_VEX_0FXOP_09_12 */

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[PATCH 18/19] x86: drop Rm and the 'L' macro

Jan Beulich-2
In reply to this post by Jan Beulich-2
Rm (and hence OP_R()) can be dropped by making 'Z' force modrm.mod to 3
(for OP_E()) instead of ignoring it. While at it move 'Z' handling to
its designated place (after 'Y'; 'W' handling will be moved by a later
change).

Moves to/from TRn are illegal in 64-bit mode and thus get converted to
honor this at the same time (also getting them in line with moves
to/from CRn/DRn ModRM.mod handling wise). This then also frees up the L
macro.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (): .

--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -77,7 +77,6 @@ static void OP_DSreg (int, int);
 static void OP_C (int, int);
 static void OP_D (int, int);
 static void OP_T (int, int);
-static void OP_R (int, int);
 static void OP_MMX (int, int);
 static void OP_XMM (int, int);
 static void OP_EM (int, int);
@@ -274,7 +273,6 @@ fetch_data (struct disassemble_info *inf
 #define Gm { OP_G, m_mode }
 #define Gva { OP_G, va_mode }
 #define Gw { OP_G, w_mode }
-#define Rm { OP_R, m_mode }
 #define Ib { OP_I, b_mode }
 #define sIb { OP_sI, b_mode } /* sign extened byte */
 #define sIbT { OP_sI, b_T_mode } /* sign extened byte like 'T' */
@@ -752,8 +750,6 @@ enum
   MOD_0F1B_PREFIX_1,
   MOD_0F1C_PREFIX_0,
   MOD_0F1E_PREFIX_1,
-  MOD_0F24,
-  MOD_0F26,
   MOD_0F2B_PREFIX_0,
   MOD_0F2B_PREFIX_1,
   MOD_0F2B_PREFIX_2,
@@ -1167,6 +1163,8 @@ enum
   X86_64_0F01_REG_1,
   X86_64_0F01_REG_2,
   X86_64_0F01_REG_3,
+  X86_64_0F24,
+  X86_64_0F26,
   X86_64_VEX_0F3849,
   X86_64_VEX_0F384B,
   X86_64_VEX_0F385C,
@@ -1736,7 +1734,7 @@ struct dis386 {
    'I' unused.
    'J' unused.
    'K' => print 'd' or 'q' if rex prefix is present.
-   'L' => print 'l' if suffix_always is true
+   'L' unused.
    'M' => print 'r' if intel_mnemonic is false.
    'N' => print 'n' if instruction has no wait "prefix"
    'O' => print 'd' or 'o' (or 'q' in Intel mode)
@@ -1755,7 +1753,7 @@ struct dis386 {
    'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
    'X' => print 's', 'd' depending on data16 prefix (for XMM)
    'Y' unused.
-   'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
+   'Z' => print 'q' in 64bit mode and 'l' otherwise, if suffix_always is true.
    '!' => change condition from true to false or from false to true.
    '%' => add 1 upper case letter to the macro.
    '^' => print 'w', 'l', or 'q' (Intel64 ISA only) depending on operand size
@@ -2119,13 +2117,13 @@ static const struct dis386 dis386_twobyt
   { PREFIX_TABLE (PREFIX_0F1E) },
   { "nopQ", { Ev }, 0 },
   /* 20 */
-  { "movZ", { Rm, Cm }, 0 },
-  { "movZ", { Rm, Dm }, 0 },
-  { "movZ", { Cm, Rm }, 0 },
-  { "movZ", { Dm, Rm }, 0 },
-  { MOD_TABLE (MOD_0F24) },
+  { "movZ", { Em, Cm }, 0 },
+  { "movZ", { Em, Dm }, 0 },
+  { "movZ", { Cm, Em }, 0 },
+  { "movZ", { Dm, Em }, 0 },
+  { X86_64_TABLE (X86_64_0F24) },
   { Bad_Opcode },
-  { MOD_TABLE (MOD_0F26) },
+  { X86_64_TABLE (X86_64_0F26) },
   { Bad_Opcode },
   /* 28 */
   { "movapX", { XM, EXx }, PREFIX_OPCODE },
@@ -4157,6 +4155,16 @@ static const struct dis386 x86_64_table[
     { "lidt", { M }, 0 },
   },
 
+  {
+    /* X86_64_0F24 */
+    { "movZ", { Em, Td }, 0 },
+  },
+
+  {
+    /* X86_64_0F26 */
+    { "movZ", { Td, Em }, 0 },
+  },
+
   /* X86_64_VEX_0F3849 */
   {
     { Bad_Opcode },
@@ -7992,16 +8000,6 @@ static const struct dis386 mod_table[][2
     { REG_TABLE (REG_0F1E_P_1_MOD_3) },
   },
   {
-    /* MOD_0F24 */
-    { Bad_Opcode },
-    { "movL", { Rm, Td }, 0 },
-  },
-  {
-    /* MOD_0F26 */
-    { Bad_Opcode },
-    { "movL", { Td, Rm }, 0 },
-  },
-  {
     /* MOD_0F2B_PREFIX_0 */
     {"movntps", { Mx, XM }, PREFIX_OPCODE },
   },
@@ -10616,50 +10614,8 @@ putop (const char *in_template, int size
   else
     *obufp++ = 'd';
   break;
- case 'Z':
-  if (l != 0)
-    {
-      if (l != 1 || last[0] != 'X')
- abort ();
-      if (!need_vex || !vex.evex)
- abort ();
-      if (intel_syntax
-  || ((modrm.mod == 3 || vex.b) && !(sizeflag & SUFFIX_ALWAYS)))
- break;
-      switch (vex.length)
- {
- case 128:
-  *obufp++ = 'x';
-  break;
- case 256:
-  *obufp++ = 'y';
-  break;
- case 512:
-  *obufp++ = 'z';
-  break;
- default:
-  abort ();
- }
-      break;
-    }
-  if (intel_syntax)
-    break;
-  if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
-    {
-      *obufp++ = 'q';
-      break;
-    }
-  /* Fall through.  */
-  goto case_L;
  case 'L':
-  if (l != 0)
-    abort ();
- case_L:
-  if (intel_syntax)
-    break;
-  if (sizeflag & SUFFIX_ALWAYS)
-    *obufp++ = 'l';
-  break;
+  abort ();
  case 'M':
   if (intel_mnemonic != cond)
     *obufp++ = 'r';
@@ -10924,6 +10880,39 @@ putop (const char *in_template, int size
   else
     abort ();
   break;
+ case 'Z':
+  if (l == 0)
+    {
+      /* These insns ignore ModR/M.mod: Force it to 3 for OP_E().  */
+      modrm.mod = 3;
+      if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
+ *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
+    }
+  else if (l == 1 && last[0] == 'X')
+    {
+      if (!need_vex || !vex.evex)
+ abort ();
+      if (intel_syntax
+  || ((modrm.mod == 3 || vex.b) && !(sizeflag & SUFFIX_ALWAYS)))
+ break;
+      switch (vex.length)
+ {
+ case 128:
+  *obufp++ = 'x';
+  break;
+ case 256:
+  *obufp++ = 'y';
+  break;
+ case 512:
+  *obufp++ = 'z';
+  break;
+ default:
+  abort ();
+ }
+    }
+  else
+    abort ();
+  break;
  case 'W':
   if (l == 0)
     {
@@ -12812,15 +12801,6 @@ OP_T (int dummy ATTRIBUTE_UNUSED, int si
 }
 
 static void
-OP_R (int bytemode, int sizeflag)
-{
-  /* Skip mod/rm byte.  */
-  MODRM_CHECK;
-  codep++;
-  OP_E_register (bytemode, sizeflag);
-}
-
-static void
 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
 {
   int reg = modrm.reg;

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[PATCH 19/19] x86/Intel: debug registers are named DRn

Jan Beulich-2
In reply to this post by Jan Beulich-2
%db<n> is an AT&T invention; the Intel documentation and MASM have only
ever specified DRn (in line with CRn and TRn). (In principle gas also
shouldn't accept the names in Intel mode, but at least for now I've kept
things as they are. Perhaps as a first step this should just be warned
about.)

gas/
2020-07-XX  Jan Beulich  <[hidden email]>

        * testsuite/gas/i386/intel.s: Use dr<N> instead of db<N>.
        * testsuite/gas/i386/intel-intel.d: Disambiguate name.
        * testsuite/gas/i386/intel.d,
        testsuite/gas/i386/opcode-intel.d: Adjust expectations.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.

--- a/gas/testsuite/gas/i386/intel-intel.d
+++ b/gas/testsuite/gas/i386/intel-intel.d
@@ -260,9 +260,9 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 0f 09 + wbinvd *
 [ ]*[a-f0-9]+: 0f 0b + ud2 *
 [ ]*[a-f0-9]+: 0f 20 d0 + mov    eax,cr2
-[ ]*[a-f0-9]+: 0f 21 d0 + mov    eax,db2
+[ ]*[a-f0-9]+: 0f 21 d0 + mov    eax,dr2
 [ ]*[a-f0-9]+: 0f 22 d0 + mov    cr2,eax
-[ ]*[a-f0-9]+: 0f 23 d0 + mov    db2,eax
+[ ]*[a-f0-9]+: 0f 23 d0 + mov    dr2,eax
 [ ]*[a-f0-9]+: 0f 24 d0 + mov    eax,tr2
 [ ]*[a-f0-9]+: 0f 26 d0 + mov    tr2,eax
 [ ]*[a-f0-9]+: 0f 30 + wrmsr *
--- a/gas/testsuite/gas/i386/intel.d
+++ b/gas/testsuite/gas/i386/intel.d
@@ -1,6 +1,6 @@
 #as: -J
 #objdump: -dw
-#name: i386 intel
+#name: i386 intel (AT&T disassembly)
 #warning_output: intel.e
 
 .*: +file format .*
--- a/gas/testsuite/gas/i386/intel.s
+++ b/gas/testsuite/gas/i386/intel.s
@@ -252,9 +252,9 @@ foo:
  wbinvd
  ud2a
  mov    eax, cr2
- mov    eax, db2
+ mov    eax, dr2
  mov    cr2, eax
- mov    db2, eax
+ mov    dr2, eax
  mov    eax, tr2
  mov    tr2, eax
  wrmsr
--- a/gas/testsuite/gas/i386/opcode-intel.d
+++ b/gas/testsuite/gas/i386/opcode-intel.d
@@ -257,9 +257,9 @@ Disassembly of section .text:
  *[0-9a-f]+: 0f 09[ ]+wbinvd[ ]*
  *[0-9a-f]+: 0f 0b[ ]+ud2[ ]*
  *[0-9a-f]+: 0f 20 d0[ ]+mov[ ]+eax,cr2
- *[0-9a-f]+: 0f 21 d0[ ]+mov[ ]+eax,db2
+ *[0-9a-f]+: 0f 21 d0[ ]+mov[ ]+eax,dr2
  *[0-9a-f]+: 0f 22 d0[ ]+mov[ ]+cr2,eax
- *[0-9a-f]+: 0f 23 d0[ ]+mov[ ]+db2,eax
+ *[0-9a-f]+: 0f 23 d0[ ]+mov[ ]+dr2,eax
  *[0-9a-f]+: 0f 24 d0[ ]+mov[ ]+eax,tr2
  *[0-9a-f]+: 0f 26 d0[ ]+mov[ ]+tr2,eax
  *[0-9a-f]+: 0f 30[ ]+wrmsr[ ]*
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -12787,7 +12787,7 @@ OP_D (int dummy ATTRIBUTE_UNUSED, int si
   else
     add = 0;
   if (intel_syntax)
-    sprintf (scratchbuf, "db%d", modrm.reg + add);
+    sprintf (scratchbuf, "dr%d", modrm.reg + add);
   else
     sprintf (scratchbuf, "%%db%d", modrm.reg + add);
   oappend (scratchbuf);

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Re: [PATCH 00/19] x86: further disassembler fixes and folding

Sourceware - binutils list mailing list
In reply to this post by Jan Beulich-2
On Mon, Jul 13, 2020 at 2:31 AM Jan Beulich <[hidden email]> wrote:

>
> While the diffstat for this series (see below) is imo quite nice,
> this still is only a further step towards the goal of making the
> code overall more manageable by reducing the number of table
> entries/branches, enumerators, macros, helper functions, and case
> labels/blocks, many of which are currently redundant with one
> another. Bugs are again getting fixed and other improvements made
> along the road, as things were recognized.
>
> 01: x86-64: fold ILP32 test expectations
> 02: x86: drop dead code from OP_IMREG()
> 03: x86-64: don't hide an empty but meaningless REX prefix
> 04: x86: avoid attaching suffix to register-only CRC32
> 05: x86: don't disassemble MOVBE with two suffixes
> 06: x86: fold VCMP_Fixup() into CMP_Fixup()
> 07: x86-64: fix {,V}PCMPESTR{I,M} disassembly in Intel mode
> 08: x86: extend %BW use to VP{COMPRESS,EXPAND}{B,W}
> 09: x86: merge/move logic determining the EVEX disp8 shift
> 10: x86: replace %LW by %DQ
> 11: x86: drop Vex128 and Vex256
> 12: x86: drop need_vex_reg
> 13: x86: drop further EVEX table entries that can be served by VEX ones
> 14: x86: simplify decode of opcodes valid with (embedded) 66 prefix only
> 15: x86: also use %BW / %DQ for kshift*
> 16: x86: simplify decode of opcodes valid only without any (embedded) prefix
> 17: x86: drop Rdq, Rd, and MaskR
> 18: x86: drop Rm and the 'L' macro
> 19: x86/Intel: debug registers are named DRn
>

OK for all.

Thanks.

--
H.J.