[PATCH 0/5] x86: (mainly) limit suffix emission for stack accessing and branch insns

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[PATCH 0/5] x86: (mainly) limit suffix emission for stack accessing and branch insns

Jan Beulich-2
Forever since the introduction of x86-64 support I was puzzled by the
emission of e.g. "retq" or "pushq" when the assembler accepts suffix-
less (and hence easier readable) mnemonics just fine. Mirror assembler
behavior to the disassembler, in that suffixes only get emitted for
otherwise ambiguous cases, but without considering odd things like 16-
bit pushes or branches as rendering the default 64-bit forms ambiguous.
(The 16-bit forms are still distinguishable, as for them the suffixes
remain.) Note that this also extends to 32- and 16-bit modes.

The last patch is just cleanup that I didn't want to re-base ahead of
this series.

1: x86: avoid attaching suffixes to unambiguous insns
2: x86-64: adjust stack insn test case
3: x86: make PUSH/POP disassembly uniform
4: x86-64: Intel64 adjustments for conditional jumps
5: x86: move putop() case labels to restore alphabetic sorting

Jan
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[PATCH 1/5] x86: avoid attaching suffixes to unambiguous insns

Jan Beulich-2
"Unambiguous" is is in particular taking as reference the assembler,
which also accepts certain insns - despite them allowing for varying
operand size, and hence in principle being ambiguous - without any
suffix. For example, from the very beginning of the life of x86-64 I had
trouble understanding why a plain and simple RET had to be printed as
RETQ. In case someone really used the 16-bit form, RETW disambiguates
the two quite fine.

gas/
2020-07-XX  Jan Beulich  <[hidden email]>

        * testsuite/gas/i386/disassem.d,
        testsuite/gas/i386/ilp32/x86-64-branch.d,
        testsuite/gas/i386/intel.d, testsuite/gas/i386/jump16.d,
        testsuite/gas/i386/lfence-load.d, testsuite/gas/i386/noreg16.d,
        testsuite/gas/i386/noreg32.d,
        testsuite/gas/i386/noreg64-rex64.d,
        testsuite/gas/i386/noreg64.d, testsuite/gas/i386/notrack.d,
        testsuite/gas/i386/opcode.d,
        testsuite/gas/i386/solaris/x86-64-branch-2.d,
        testsuite/gas/i386/solaris/x86-64-jump.d,
        testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d,
        testsuite/gas/i386/solaris/x86-64-nop-3.d,
        testsuite/gas/i386/solaris/x86-64-nop-4.d,
        testsuite/gas/i386/solaris/x86-64-nop-5.d,
        testsuite/gas/i386/solaris/x86-64-relax-2.d,
        testsuite/gas/i386/solaris/x86-64-relax-3.d,
        testsuite/gas/i386/x86-64-align-branch-1a.d,
        testsuite/gas/i386/x86-64-align-branch-1b.d,
        testsuite/gas/i386/x86-64-align-branch-1c.d,
        testsuite/gas/i386/x86-64-align-branch-1d.d,
        testsuite/gas/i386/x86-64-align-branch-1e.d,
        testsuite/gas/i386/x86-64-align-branch-1f.d,
        testsuite/gas/i386/x86-64-align-branch-1g.d,
        testsuite/gas/i386/x86-64-align-branch-1h.d,
        testsuite/gas/i386/x86-64-align-branch-1i.d,
        testsuite/gas/i386/x86-64-align-branch-2a.d,
        testsuite/gas/i386/x86-64-align-branch-2b.d,
        testsuite/gas/i386/x86-64-align-branch-2c.d,
        testsuite/gas/i386/x86-64-align-branch-3.d,
        testsuite/gas/i386/x86-64-align-branch-4a.d,
        testsuite/gas/i386/x86-64-align-branch-4b.d,
        testsuite/gas/i386/x86-64-align-branch-5.d,
        testsuite/gas/i386/x86-64-align-branch-6.d,
        testsuite/gas/i386/x86-64-branch-2.d,
        testsuite/gas/i386/x86-64-branch-3.d,
        testsuite/gas/i386/x86-64-branch.d,
        testsuite/gas/i386/x86-64-disassem.d,
        testsuite/gas/i386/x86-64-disp32.d,
        testsuite/gas/i386/x86-64-gotpcrel-no-relax.d,
        testsuite/gas/i386/x86-64-gotpcrel.d,
        testsuite/gas/i386/x86-64-ifunc.d,
        testsuite/gas/i386/x86-64-jump.d,
        testsuite/gas/i386/x86-64-lfence-byte.d,
        testsuite/gas/i386/x86-64-lfence-indbr-a.d,
        testsuite/gas/i386/x86-64-lfence-indbr-b.d,
        testsuite/gas/i386/x86-64-lfence-indbr-c.d,
        testsuite/gas/i386/x86-64-lfence-load.d,
        testsuite/gas/i386/x86-64-lfence-ret-a.d,
        testsuite/gas/i386/x86-64-lfence-ret-b.d,
        testsuite/gas/i386/x86-64-lfence-ret-c.d,
        testsuite/gas/i386/x86-64-lfence-ret-d.d,
        testsuite/gas/i386/x86-64-lfence-ret-e.d,
        testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.d,
        testsuite/gas/i386/x86-64-mpx-branch-1.d,
        testsuite/gas/i386/x86-64-mpx.d,
        testsuite/gas/i386/x86-64-nop-3.d,
        testsuite/gas/i386/x86-64-nop-4.d,
        testsuite/gas/i386/x86-64-nop-5.d,
        testsuite/gas/i386/x86-64-nops-7.d,
        testsuite/gas/i386/x86-64-notrack.d,
        testsuite/gas/i386/x86-64-opcode.d,
        testsuite/gas/i386/x86-64-relax-2.d,
        testsuite/gas/i386/x86-64-relax-3.d,
        testsuite/gas/i386/x86-64-relax-4.d,
        testsuite/gas/i386/x86-64-rtm.d,
        testsuite/gas/i386/x86-64-stack.d,
        testsuite/gas/i386/x86-64-unique.d,
        testsuite/gas/i386/x86_64-intel.d: Adjust expectations.

ld/
2020-07-XX  Jan Beulich  <[hidden email]>

        * testsuite/ld-i386/ibt-plt-1.d, testsuite/ld-i386/ibt-plt-2a.d,
        testsuite/ld-i386/ibt-plt-2c.d, testsuite/ld-i386/ibt-plt-3a.d,
        testsuite/ld-i386/ibt-plt-3c.d, testsuite/ld-i386/plt-pic.pd,
        testsuite/ld-i386/plt-pic2.dd, testsuite/ld-i386/plt.pd,
        testsuite/ld-i386/plt2.dd, testsuite/ld-i386/pr19636-1d.d,
        testsuite/ld-i386/pr19636-1l.d, testsuite/ld-i386/pr19636-2c.d,
        testsuite/ld-i386/pr20830.d, testsuite/ld-i386/vxworks1-lib.dd,
        testsuite/ld-i386/vxworks1.dd,
        testsuite/ld-ifunc/ifunc-2-i386-now.d,
        testsuite/ld-ifunc/ifunc-2-local-i386-now.d,
        testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d,
        testsuite/ld-ifunc/ifunc-2-x86-64-now.d,
        testsuite/ld-ifunc/ifunc-21-x86-64.d,
        testsuite/ld-ifunc/ifunc-22-x86-64.d,
        testsuite/ld-ifunc/pr17154-i386-now.d,
        testsuite/ld-ifunc/pr17154-i386.d,
        testsuite/ld-ifunc/pr17154-x86-64-now.d,
        testsuite/ld-ifunc/pr17154-x86-64.d,
        testsuite/ld-x86-64/align-branch-1.d,
        testsuite/ld-x86-64/bnd-branch-1-now.d,
        testsuite/ld-x86-64/bnd-branch-1.d,
        testsuite/ld-x86-64/bnd-ifunc-1-now.d,
        testsuite/ld-x86-64/bnd-ifunc-1.d,
        testsuite/ld-x86-64/bnd-ifunc-2-now.d,
        testsuite/ld-x86-64/bnd-ifunc-2.d,
        testsuite/ld-x86-64/bnd-plt-1-now.d,
        testsuite/ld-x86-64/bnd-plt-1.d,
        testsuite/ld-x86-64/call1a.d, testsuite/ld-x86-64/call1b.d,
        testsuite/ld-x86-64/call1d.d, testsuite/ld-x86-64/call1e.d,
        testsuite/ld-x86-64/call1f.d, testsuite/ld-x86-64/call1g.d,
        testsuite/ld-x86-64/call1h.d, testsuite/ld-x86-64/call1i.d,
        testsuite/ld-x86-64/gotpcrel1.dd,
        testsuite/ld-x86-64/hidden2.d,
        testsuite/ld-x86-64/ibt-plt-1-x32.d,
        testsuite/ld-x86-64/ibt-plt-1.d,
        testsuite/ld-x86-64/ibt-plt-2a-x32.d,
        testsuite/ld-x86-64/ibt-plt-2a.d,
        testsuite/ld-x86-64/ibt-plt-2c-x32.d,
        testsuite/ld-x86-64/ibt-plt-2c.d,
        testsuite/ld-x86-64/ibt-plt-3a-x32.d,
        testsuite/ld-x86-64/ibt-plt-3a.d,
        testsuite/ld-x86-64/ibt-plt-3c-x32.d,
        testsuite/ld-x86-64/ibt-plt-3c.d,
        testsuite/ld-x86-64/libno-plt-1b.dd,
        testsuite/ld-x86-64/mpx3.dd, testsuite/ld-x86-64/mpx3n.dd,
        testsuite/ld-x86-64/mpx4.dd, testsuite/ld-x86-64/mpx4n.dd,
        testsuite/ld-x86-64/no-plt-1a.dd,
        testsuite/ld-x86-64/no-plt-1b.dd,
        testsuite/ld-x86-64/no-plt-1c.dd,
        testsuite/ld-x86-64/no-plt-1d.dd,
        testsuite/ld-x86-64/no-plt-1e.dd,
        testsuite/ld-x86-64/no-plt-1f.dd,
        testsuite/ld-x86-64/no-plt-1g.dd,
        testsuite/ld-x86-64/plt-main-bnd.dd,
        testsuite/ld-x86-64/plt-main-ibt-x32.dd,
        testsuite/ld-x86-64/plt-main-ibt.dd,
        testsuite/ld-x86-64/plt.pd, testsuite/ld-x86-64/plt2.dd,
        testsuite/ld-x86-64/pr19609-5a.d,
        testsuite/ld-x86-64/pr19609-5b.d,
        testsuite/ld-x86-64/pr19609-5c.d,
        testsuite/ld-x86-64/pr19609-5e.d,
        testsuite/ld-x86-64/pr19609-7b.d,
        testsuite/ld-x86-64/pr19609-7d.d,
        testsuite/ld-x86-64/pr19636-2d.d,
        testsuite/ld-x86-64/pr19636-2l.d,
        testsuite/ld-x86-64/pr20253-1b.d,
        testsuite/ld-x86-64/pr20253-1d.d,
        testsuite/ld-x86-64/pr20253-1f.d,
        testsuite/ld-x86-64/pr20253-1h.d,
        testsuite/ld-x86-64/pr20253-1j.d,
        testsuite/ld-x86-64/pr20253-1l.d,
        testsuite/ld-x86-64/pr20830a-now.d,
        testsuite/ld-x86-64/pr20830a.d,
        testsuite/ld-x86-64/pr20830b-now.d,
        testsuite/ld-x86-64/pr20830b.d,
        testsuite/ld-x86-64/pr21038a-now.d,
        testsuite/ld-x86-64/pr21038a.d,
        testsuite/ld-x86-64/pr21038b-now.d,
        testsuite/ld-x86-64/pr21038b.d,
        testsuite/ld-x86-64/pr21038c-now.d,
        testsuite/ld-x86-64/pr21038c.d,
        testsuite/ld-x86-64/pr23930-x32.d,
        testsuite/ld-x86-64/pr23930.d,
        testsuite/ld-x86-64/pr25416-1a.d,
        testsuite/ld-x86-64/pr25416-2a.d,
        testsuite/ld-x86-64/pr26018.d,
        testsuite/ld-x86-64/protected2-k1om.d,
        testsuite/ld-x86-64/protected2-l1om.d,
        testsuite/ld-x86-64/protected2.d,
        testsuite/ld-x86-64/protected3.d,
        testsuite/ld-x86-64/protected8.d,
        testsuite/ld-x86-64/tlsbin.dd, testsuite/ld-x86-64/tlsbin2.dd,
        testsuite/ld-x86-64/tlsbindesc.dd,
        testsuite/ld-x86-64/tlsdesc.dd,
        testsuite/ld-x86-64/tlsdesc.pd,
        testsuite/ld-x86-64/tlsgd10.dd,
        testsuite/ld-x86-64/tlsgd7.dd, testsuite/ld-x86-64/tlsgd8.dd,
        testsuite/ld-x86-64/tlsgd9.dd,
        testsuite/ld-x86-64/tlsgdesc.dd,
        testsuite/ld-x86-64/tlsld3.dd, testsuite/ld-x86-64/tlsld4.dd,
        testsuite/ld-x86-64/tlspic.dd, testsuite/ld-x86-64/tlspic2.dd,
        testsuite/ld-x86-64/tlspie2b.d, testsuite/ld-x86-64/tlspie2c.d:
        Adjust expectations.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
        description. Drop '&' description. Use P for push of immediate,
        pushf/popf, enter, and leave. Use %LP for lret/retf.
        (dis386_twobyte): Use P for push/pop of fs/gs.
        (reg_table): Use P for push/pop. Use @ for near call/jmp.
        (x86_64_table): Use P for far call/jmp.
        (putop): Drop handling of 'U' and '&'. Move and adjust handling
        of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
        labels.
        (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
        and dqw_mode (unconditional).

---
I wonder whether retaining 'T' for just XBEGIN makes sense. '@' handling
could as well special case that one opcode (to emit 'w' even in Intel64
mode when there's an operand size prefix). Furthermore gas doesn't
accept any suffixes on it, so the question if whether assembler and
disassembler shouldn't be brought in line (in whichever direction).

--- a/gas/testsuite/gas/i386/disassem.d
+++ b/gas/testsuite/gas/i386/disassem.d
@@ -246,49 +246,49 @@ Disassembly of section \.text:
 [ ]*[a-f0-9]+:[ ]*c4 e1 f9 99[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popl   \(%ecx\)
+[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop    \(%ecx\)
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*6a 01[ ]*push   \$0x1
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*04 01[ ]*add    \$0x1,%al
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popl   \(%ecx\)
+[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop    \(%ecx\)
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*6a 01[ ]*push   \$0x1
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*04 01[ ]*add    \$0x1,%al
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popl   \(%ecx\)
+[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop    \(%ecx\)
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*6a 01[ ]*push   \$0x1
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*04 01[ ]*add    \$0x1,%al
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popl   \(%ecx\)
+[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop    \(%ecx\)
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*6a 01[ ]*push   \$0x1
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*04 01[ ]*add    \$0x1,%al
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popl   \(%ecx\)
+[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop    \(%ecx\)
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*6a 01[ ]*push   \$0x1
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*04 01[ ]*add    \$0x1,%al
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popl   \(%ecx\)
+[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop    \(%ecx\)
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*6a 01[ ]*push   \$0x1
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*04 01[ ]*add    \$0x1,%al
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popl   \(%ecx\)
+[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop    \(%ecx\)
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*6a 01[ ]*push   \$0x1
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*04 01[ ]*add    \$0x1,%al
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popl   \(%ecx\)
+[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop    \(%ecx\)
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*6a 01[ ]*push   \$0x1
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
--- a/gas/testsuite/gas/i386/ilp32/x86-64-branch.d
+++ b/gas/testsuite/gas/i386/ilp32/x86-64-branch.d
@@ -8,35 +8,35 @@
 Disassembly of section .text:
 
 0+ <.text>:
-[ ]*[a-f0-9]+: ff d0                 callq  \*%rax
-[ ]*[a-f0-9]+: ff d0                 callq  \*%rax
-[ ]*[a-f0-9]+: 66 ff d0             data16 callq \*%rax
-[ ]*[a-f0-9]+: 66 ff d0             data16 callq \*%rax
-[ ]*[a-f0-9]+: 66 ff 10             data16 callq \*\(%rax\)
-[ ]*[a-f0-9]+: ff e0                 jmpq   \*%rax
-[ ]*[a-f0-9]+: ff e0                 jmpq   \*%rax
-[ ]*[a-f0-9]+: 66 ff e0             data16 jmpq \*%rax
-[ ]*[a-f0-9]+: 66 ff e0             data16 jmpq \*%rax
-[ ]*[a-f0-9]+: 66 ff 20             data16 jmpq \*\(%rax\)
-[ ]*[a-f0-9]+: e8 00 00 00 00       callq  0x1f 1b: R_X86_64_PC32 \*ABS\*\+0x10003c
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   0x24 20: R_X86_64_PC32 \*ABS\*\+0x10003c
-[ ]*[a-f0-9]+: 66 e8 00 00 00 00     data16 callq 0x2a 26: R_X86_64_PLT32 foo-0x4
-[ ]*[a-f0-9]+: 66 e9 00 00 00 00     data16 jmpq 0x30 2c: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: ff d0                 call   \*%rax
+[ ]*[a-f0-9]+: ff d0                 call   \*%rax
+[ ]*[a-f0-9]+: 66 ff d0             data16 call \*%rax
+[ ]*[a-f0-9]+: 66 ff d0             data16 call \*%rax
+[ ]*[a-f0-9]+: 66 ff 10             data16 call \*\(%rax\)
+[ ]*[a-f0-9]+: ff e0                 jmp    \*%rax
+[ ]*[a-f0-9]+: ff e0                 jmp    \*%rax
+[ ]*[a-f0-9]+: 66 ff e0             data16 jmp \*%rax
+[ ]*[a-f0-9]+: 66 ff e0             data16 jmp \*%rax
+[ ]*[a-f0-9]+: 66 ff 20             data16 jmp \*\(%rax\)
+[ ]*[a-f0-9]+: e8 00 00 00 00       call   0x1f 1b: R_X86_64_PC32 \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    0x24 20: R_X86_64_PC32 \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: 66 e8 00 00 00 00     data16 call 0x2a 26: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: 66 e9 00 00 00 00     data16 jmp 0x30 2c: R_X86_64_PLT32 foo-0x4
 [ ]*[a-f0-9]+: 66 0f 82 00 00 00 00 data16 jb 0x37 33: R_X86_64_PLT32 foo-0x4
-[ ]*[a-f0-9]+: 66 c3                 data16 retq *
-[ ]*[a-f0-9]+: 66 c2 08 00           data16 retq \$0x8
-[ ]*[a-f0-9]+: ff d0                 callq  \*%rax
-[ ]*[a-f0-9]+: ff d0                 callq  \*%rax
-[ ]*[a-f0-9]+: 66 ff d0             data16 callq \*%rax
-[ ]*[a-f0-9]+: 66 ff d0             data16 callq \*%rax
-[ ]*[a-f0-9]+: 66 ff 10             data16 callq \*\(%rax\)
-[ ]*[a-f0-9]+: ff e0                 jmpq   \*%rax
-[ ]*[a-f0-9]+: ff e0                 jmpq   \*%rax
-[ ]*[a-f0-9]+: 66 ff e0             data16 jmpq \*%rax
-[ ]*[a-f0-9]+: 66 ff e0             data16 jmpq \*%rax
-[ ]*[a-f0-9]+: 66 ff 20             data16 jmpq \*\(%rax\)
-[ ]*[a-f0-9]+: e8 00 00 00 00       callq  0x[0-9a-f]* [0-9a-f]*: R_X86_64_PC32 \*ABS\*\+0x10003c
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   0x[0-9a-f]* [0-9a-f]*: R_X86_64_PC32 \*ABS\*\+0x10003c
-[ ]*[a-f0-9]+: 66 c3                 data16 retq *
-[ ]*[a-f0-9]+: 66 c2 08 00           data16 retq \$0x8
+[ ]*[a-f0-9]+: 66 c3                 data16 ret *
+[ ]*[a-f0-9]+: 66 c2 08 00           data16 ret \$0x8
+[ ]*[a-f0-9]+: ff d0                 call   \*%rax
+[ ]*[a-f0-9]+: ff d0                 call   \*%rax
+[ ]*[a-f0-9]+: 66 ff d0             data16 call \*%rax
+[ ]*[a-f0-9]+: 66 ff d0             data16 call \*%rax
+[ ]*[a-f0-9]+: 66 ff 10             data16 call \*\(%rax\)
+[ ]*[a-f0-9]+: ff e0                 jmp    \*%rax
+[ ]*[a-f0-9]+: ff e0                 jmp    \*%rax
+[ ]*[a-f0-9]+: 66 ff e0             data16 jmp \*%rax
+[ ]*[a-f0-9]+: 66 ff e0             data16 jmp \*%rax
+[ ]*[a-f0-9]+: 66 ff 20             data16 jmp \*\(%rax\)
+[ ]*[a-f0-9]+: e8 00 00 00 00       call   0x[0-9a-f]* [0-9a-f]*: R_X86_64_PC32 \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    0x[0-9a-f]* [0-9a-f]*: R_X86_64_PC32 \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: 66 c3                 data16 ret *
+[ ]*[a-f0-9]+: 66 c2 08 00           data16 ret \$0x8
 #pass
--- a/gas/testsuite/gas/i386/intel.d
+++ b/gas/testsuite/gas/i386/intel.d
@@ -141,7 +141,7 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 8c 90 90 90 90 90 [ ]*mov    %ss,-0x6f6f6f70\(%eax\)
 [ ]*[a-f0-9]+: 8d 90 90 90 90 90 [ ]*lea    -0x6f6f6f70\(%eax\),%edx
 [ ]*[a-f0-9]+: 8e 90 90 90 90 90 [ ]*mov    -0x6f6f6f70\(%eax\),%ss
-[ ]*[a-f0-9]+: 8f 80 90 90 90 90 [ ]*popl   -0x6f6f6f70\(%eax\)
+[ ]*[a-f0-9]+: 8f 80 90 90 90 90 [ ]*pop    -0x6f6f6f70\(%eax\)
 [ ]*[a-f0-9]+: 90 [ ]*nop
 [ ]*[a-f0-9]+: 91 [ ]*xchg   %eax,%ecx
 [ ]*[a-f0-9]+: 92 [ ]*xchg   %eax,%edx
--- a/gas/testsuite/gas/i386/jump16.d
+++ b/gas/testsuite/gas/i386/jump16.d
@@ -10,7 +10,7 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: eb fe                 jmp    (0x0|0 <.text>)
 [ ]*[a-f0-9]+: e9 f(e|b) ff             jmp    (0x3|0 <.text>) 3: (R_386_PC)?(DISP)?16 xxx
 [ ]*[a-f0-9]+: ff 26 00 00           jmp    \*0x0 7: (R_386_)?16 xxx
-[ ]*[a-f0-9]+: 66 ff e7             jmpl   \*%edi
+[ ]*[a-f0-9]+: 66 ff e7             jmp    \*%edi
 [ ]*[a-f0-9]+: 67 ff 27             jmp    \*\(%edi\)
 [ ]*[a-f0-9]+: 67 ff af 00 00 00 00 ljmp   \*0x0\(%edi\) 12: (R_386_)?(dir)?32 xxx
 [ ]*[a-f0-9]+: ff 2e 00 00           ljmp   \*0x0 18: (R_386_)?16 xxx
@@ -18,7 +18,7 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 e8 db ff ff ff     calll  (0x0|0 <.text>)
 [ ]*[a-f0-9]+: 66 e8 (fc|d5) ff ff ff     calll  (0x27|0 <.text>) 27: (R_386_PC)?(DISP)?32 xxx
 [ ]*[a-f0-9]+: 66 ff 16 00 00       calll  \*0x0 2e: (R_386_)?16 xxx
-[ ]*[a-f0-9]+: 66 ff d7             calll  \*%edi
+[ ]*[a-f0-9]+: 66 ff d7             call   \*%edi
 [ ]*[a-f0-9]+: 67 66 ff 17           calll  \*\(%edi\)
 [ ]*[a-f0-9]+: 67 66 ff 9f 00 00 00 00 lcalll \*0x0\(%edi\) 3b: (R_386_)?(dir)?32 xxx
 [ ]*[a-f0-9]+: 66 ff 1e 00 00       lcalll \*0x0 42: (R_386_)?16 xxx
--- a/gas/testsuite/gas/i386/lfence-load.d
+++ b/gas/testsuite/gas/i386/lfence-load.d
@@ -79,7 +79,7 @@ Disassembly of section .text:
  +[a-f0-9]+: 0f ae e8             lfence
  +[a-f0-9]+: 0f 0f 66 02 b0       pfcmpeq 0x2\(%esi\),%mm4
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 8f 00                 popl   \(%eax\)
+ +[a-f0-9]+: 8f 00                 pop    \(%eax\)
  +[a-f0-9]+: 0f ae e8             lfence
  +[a-f0-9]+: 58                   pop    %eax
  +[a-f0-9]+: 0f ae e8             lfence
--- a/gas/testsuite/gas/i386/noreg16.d
+++ b/gas/testsuite/gas/i386/noreg16.d
@@ -90,10 +90,10 @@ Disassembly of section .text:
  *[a-f0-9]+: ef                   out    %ax,\(%dx\)
  *[a-f0-9]+: 6f                   outsw  %ds:\(%si\),\(%dx\)
  *[a-f0-9]+: 6f                   outsw  %ds:\(%si\),\(%dx\)
- *[a-f0-9]+: 8f 07                 popw   \(%bx\)
+ *[a-f0-9]+: 8f 07                 pop    \(%bx\)
  *[a-f0-9]+: 07                   pop    %es
  *[a-f0-9]+: f3 0f ae 27           ptwrite \(%bx\)
- *[a-f0-9]+: ff 37                 pushw  \(%bx\)
+ *[a-f0-9]+: ff 37                 push   \(%bx\)
  *[a-f0-9]+: 06                   push   %es
  *[a-f0-9]+: d1 17                 rclw   \(%bx\)
  *[a-f0-9]+: c1 17 02             rclw   \$0x2,\(%bx\)
--- a/gas/testsuite/gas/i386/noreg32.d
+++ b/gas/testsuite/gas/i386/noreg32.d
@@ -96,10 +96,10 @@ Disassembly of section .text:
  *[a-f0-9]+: ef                   out    %eax,\(%dx\)
  *[a-f0-9]+: 6f                   outsl  %ds:\(%esi\),\(%dx\)
  *[a-f0-9]+: 6f                   outsl  %ds:\(%esi\),\(%dx\)
- *[a-f0-9]+: 8f 00                 popl   \(%eax\)
+ *[a-f0-9]+: 8f 00                 pop    \(%eax\)
  *[a-f0-9]+: 07                   pop    %es
  *[a-f0-9]+: f3 0f ae 20           ptwrite \(%eax\)
- *[a-f0-9]+: ff 30                 pushl  \(%eax\)
+ *[a-f0-9]+: ff 30                 push   \(%eax\)
  *[a-f0-9]+: 06                   push   %es
  *[a-f0-9]+: d1 10                 rcll   \(%eax\)
  *[a-f0-9]+: c1 10 02             rcll   \$0x2,\(%eax\)
--- a/gas/testsuite/gas/i386/noreg64-rex64.d
+++ b/gas/testsuite/gas/i386/noreg64-rex64.d
@@ -24,7 +24,7 @@ Disassembly of section .text:
  *[a-f0-9]+: 48 0f ba 38 01       btcq   \$0x1,\(%rax\)
  *[a-f0-9]+: 48 0f ba 30 01       btrq   \$0x1,\(%rax\)
  *[a-f0-9]+: 48 0f ba 28 01       btsq   \$0x1,\(%rax\)
- *[a-f0-9]+: 48 ff 10             rex\.W callq \*\(%rax\)
+ *[a-f0-9]+: 48 ff 10             rex\.W call \*\(%rax\)
  *[a-f0-9]+: 48 83 38 01           cmpq   \$0x1,\(%rax\)
  *[a-f0-9]+: 48 81 38 89 00 00 00 cmpq   \$0x89,\(%rax\)
  *[a-f0-9]+: 48 81 38 34 12 00 00 cmpq   \$0x1234,\(%rax\)
@@ -65,7 +65,7 @@ Disassembly of section .text:
  *[a-f0-9]+: 48 6d                 rex\.W insl \(%dx\),%es:\(%rdi\)
  *[a-f0-9]+: 48 6d                 rex\.W insl \(%dx\),%es:\(%rdi\)
  *[a-f0-9]+: 48 cf                 iretq *
- *[a-f0-9]+: 48 ff 20             rex\.W jmpq \*\(%rax\)
+ *[a-f0-9]+: 48 ff 20             rex\.W jmp \*\(%rax\)
  *[a-f0-9]+: 48 ff 18             rex\.W lcall \*\(%rax\)
  *[a-f0-9]+: 48 0f 01 10           rex\.W lgdt \(%rax\)
  *[a-f0-9]+: 48 0f 01 18           rex\.W lidt \(%rax\)
@@ -100,11 +100,11 @@ Disassembly of section .text:
  *[a-f0-9]+: 48 ef                 rex\.W out %eax,\(%dx\)
  *[a-f0-9]+: 48 6f                 rex\.W outsl %ds:\(%rsi\),\(%dx\)
  *[a-f0-9]+: 48 6f                 rex\.W outsl %ds:\(%rsi\),\(%dx\)
- *[a-f0-9]+: 48 8f 00             rex\.W popq \(%rax\)
- *[a-f0-9]+: 48 0f a1             rex\.W popq %fs
+ *[a-f0-9]+: 48 8f 00             rex\.W pop \(%rax\)
+ *[a-f0-9]+: 48 0f a1             rex\.W pop %fs
  *[a-f0-9]+: f3 48 0f ae 20       ptwriteq \(%rax\)
- *[a-f0-9]+: 48 ff 30             rex\.W pushq \(%rax\)
- *[a-f0-9]+: 48 0f a0             rex\.W pushq %fs
+ *[a-f0-9]+: 48 ff 30             rex\.W push \(%rax\)
+ *[a-f0-9]+: 48 0f a0             rex\.W push %fs
  *[a-f0-9]+: 48 d1 10             rclq   \(%rax\)
  *[a-f0-9]+: 48 c1 10 02           rclq   \$0x2,\(%rax\)
  *[a-f0-9]+: 48 d3 10             rclq   %cl,\(%rax\)
--- a/gas/testsuite/gas/i386/noreg64.d
+++ b/gas/testsuite/gas/i386/noreg64.d
@@ -23,7 +23,7 @@ Disassembly of section .text:
  *[a-f0-9]+: 0f ba 38 01           btcl   \$0x1,\(%rax\)
  *[a-f0-9]+: 0f ba 30 01           btrl   \$0x1,\(%rax\)
  *[a-f0-9]+: 0f ba 28 01           btsl   \$0x1,\(%rax\)
- *[a-f0-9]+: ff 10                 callq  \*\(%rax\)
+ *[a-f0-9]+: ff 10                 call   \*\(%rax\)
  *[a-f0-9]+: 83 38 01             cmpl   \$0x1,\(%rax\)
  *[a-f0-9]+: 81 38 89 00 00 00     cmpl   \$0x89,\(%rax\)
  *[a-f0-9]+: 81 38 34 12 00 00     cmpl   \$0x1234,\(%rax\)
@@ -65,7 +65,7 @@ Disassembly of section .text:
  *[a-f0-9]+: 6d                   insl   \(%dx\),%es:\(%rdi\)
  *[a-f0-9]+: 6d                   insl   \(%dx\),%es:\(%rdi\)
  *[a-f0-9]+: cf                   iret *
- *[a-f0-9]+: ff 20                 jmpq   \*\(%rax\)
+ *[a-f0-9]+: ff 20                 jmp    \*\(%rax\)
  *[a-f0-9]+: ff 18                 lcall  \*\(%rax\)
  *[a-f0-9]+: 0f 01 10             lgdt   \(%rax\)
  *[a-f0-9]+: 0f 01 18             lidt   \(%rax\)
@@ -102,11 +102,11 @@ Disassembly of section .text:
  *[a-f0-9]+: ef                   out    %eax,\(%dx\)
  *[a-f0-9]+: 6f                   outsl  %ds:\(%rsi\),\(%dx\)
  *[a-f0-9]+: 6f                   outsl  %ds:\(%rsi\),\(%dx\)
- *[a-f0-9]+: 8f 00                 popq   \(%rax\)
- *[a-f0-9]+: 0f a1                 popq   %fs
+ *[a-f0-9]+: 8f 00                 pop    \(%rax\)
+ *[a-f0-9]+: 0f a1                 pop    %fs
  *[a-f0-9]+: f3 0f ae 20           ptwritel \(%rax\)
- *[a-f0-9]+: ff 30                 pushq  \(%rax\)
- *[a-f0-9]+: 0f a0                 pushq  %fs
+ *[a-f0-9]+: ff 30                 push   \(%rax\)
+ *[a-f0-9]+: 0f a0                 push   %fs
  *[a-f0-9]+: d1 10                 rcll   \(%rax\)
  *[a-f0-9]+: c1 10 02             rcll   \$0x2,\(%rax\)
  *[a-f0-9]+: d3 10                 rcll   %cl,\(%rax\)
--- a/gas/testsuite/gas/i386/notrack.d
+++ b/gas/testsuite/gas/i386/notrack.d
@@ -8,45 +8,45 @@ Disassembly of section .text:
 
 0+ <_start>:
 [ ]*[a-f0-9]+: 3e ff d0             notrack call \*%eax
-[ ]*[a-f0-9]+: 3e 66 ff d0           notrack callw \*%ax
+[ ]*[a-f0-9]+: 3e 66 ff d0           notrack call \*%ax
 [ ]*[a-f0-9]+: 3e ff e0             notrack jmp \*%eax
-[ ]*[a-f0-9]+: 3e 66 ff e0           notrack jmpw \*%ax
+[ ]*[a-f0-9]+: 3e 66 ff e0           notrack jmp \*%ax
 [ ]*[a-f0-9]+: 3e ff 10             notrack call \*\(%eax\)
 [ ]*[a-f0-9]+: 3e 66 ff 10           notrack callw \*\(%eax\)
 [ ]*[a-f0-9]+: 3e ff 20             notrack jmp \*\(%eax\)
 [ ]*[a-f0-9]+: 3e 66 ff 20           notrack jmpw \*\(%eax\)
 [ ]*[a-f0-9]+: 3e f2 ff d0           notrack bnd call \*%eax
-[ ]*[a-f0-9]+: 3e 66 f2 ff d0       notrack bnd callw \*%ax
+[ ]*[a-f0-9]+: 3e 66 f2 ff d0       notrack bnd call \*%ax
 [ ]*[a-f0-9]+: 3e f2 ff e0           notrack bnd jmp \*%eax
-[ ]*[a-f0-9]+: 3e 66 f2 ff e0       notrack bnd jmpw \*%ax
+[ ]*[a-f0-9]+: 3e 66 f2 ff e0       notrack bnd jmp \*%ax
 [ ]*[a-f0-9]+: 3e f2 ff 10           notrack bnd call \*\(%eax\)
 [ ]*[a-f0-9]+: 3e 66 f2 ff 10       notrack bnd callw \*\(%eax\)
 [ ]*[a-f0-9]+: 3e f2 ff 20           notrack bnd jmp \*\(%eax\)
 [ ]*[a-f0-9]+: 3e 66 f2 ff 20       notrack bnd jmpw \*\(%eax\)
 [ ]*[a-f0-9]+: 3e f2 ff d0           notrack bnd call \*%eax
-[ ]*[a-f0-9]+: 3e 66 f2 ff d0       notrack bnd callw \*%ax
+[ ]*[a-f0-9]+: 3e 66 f2 ff d0       notrack bnd call \*%ax
 [ ]*[a-f0-9]+: 3e f2 ff 10           notrack bnd call \*\(%eax\)
 [ ]*[a-f0-9]+: 3e 66 f2 ff 10       notrack bnd callw \*\(%eax\)
 [ ]*[a-f0-9]+: 3e ff d0             notrack call \*%eax
-[ ]*[a-f0-9]+: 3e 66 ff d0           notrack callw \*%ax
+[ ]*[a-f0-9]+: 3e 66 ff d0           notrack call \*%ax
 [ ]*[a-f0-9]+: 3e ff e0             notrack jmp \*%eax
-[ ]*[a-f0-9]+: 3e 66 ff e0           notrack jmpw \*%ax
+[ ]*[a-f0-9]+: 3e 66 ff e0           notrack jmp \*%ax
 [ ]*[a-f0-9]+: 3e ff 10             notrack call \*\(%eax\)
 [ ]*[a-f0-9]+: 3e 66 ff 10           notrack callw \*\(%eax\)
 [ ]*[a-f0-9]+: 3e ff 20             notrack jmp \*\(%eax\)
 [ ]*[a-f0-9]+: 3e 66 ff 20           notrack jmpw \*\(%eax\)
 [ ]*[a-f0-9]+: 3e f2 ff d0           notrack bnd call \*%eax
-[ ]*[a-f0-9]+: 3e 66 f2 ff d0       notrack bnd callw \*%ax
+[ ]*[a-f0-9]+: 3e 66 f2 ff d0       notrack bnd call \*%ax
 [ ]*[a-f0-9]+: 3e f2 ff e0           notrack bnd jmp \*%eax
-[ ]*[a-f0-9]+: 3e 66 f2 ff e0       notrack bnd jmpw \*%ax
+[ ]*[a-f0-9]+: 3e 66 f2 ff e0       notrack bnd jmp \*%ax
 [ ]*[a-f0-9]+: 3e f2 ff 10           notrack bnd call \*\(%eax\)
 [ ]*[a-f0-9]+: 3e 66 f2 ff 10       notrack bnd callw \*\(%eax\)
 [ ]*[a-f0-9]+: 3e f2 ff 20           notrack bnd jmp \*\(%eax\)
 [ ]*[a-f0-9]+: 3e 66 f2 ff 20       notrack bnd jmpw \*\(%eax\)
 [ ]*[a-f0-9]+: 3e f2 ff d0           notrack bnd call \*%eax
-[ ]*[a-f0-9]+: 3e 66 f2 ff d0       notrack bnd callw \*%ax
+[ ]*[a-f0-9]+: 3e 66 f2 ff d0       notrack bnd call \*%ax
 [ ]*[a-f0-9]+: 3e f2 ff 10           notrack bnd call \*\(%eax\)
 [ ]*[a-f0-9]+: 3e 66 f2 ff 10       notrack bnd callw \*\(%eax\)
 [ ]*[a-f0-9]+: f2 3e ff d0           bnd notrack call \*%eax
-[ ]*[a-f0-9]+: 66 3e ff d0           notrack callw \*%ax
+[ ]*[a-f0-9]+: 66 3e ff d0           notrack call \*%ax
 #pass
--- a/gas/testsuite/gas/i386/opcode.d
+++ b/gas/testsuite/gas/i386/opcode.d
@@ -140,7 +140,7 @@ Disassembly of section .text:
  1b5: 8c 90 90 90 90 90 [ ]*mov    %ss,-0x6f6f6f70\(%eax\)
  1bb: 8d 90 90 90 90 90 [ ]*lea    -0x6f6f6f70\(%eax\),%edx
  1c1: 8e 90 90 90 90 90 [ ]*mov    -0x6f6f6f70\(%eax\),%ss
- 1c7: 8f 80 90 90 90 90 [ ]*popl   -0x6f6f6f70\(%eax\)
+ 1c7: 8f 80 90 90 90 90 [ ]*pop    -0x6f6f6f70\(%eax\)
  1cd: 90 [ ]*nop
  1ce: 91 [ ]*xchg   %eax,%ecx
  1cf: 92 [ ]*xchg   %eax,%edx
--- a/gas/testsuite/gas/i386/solaris/x86-64-branch-2.d
+++ b/gas/testsuite/gas/i386/solaris/x86-64-branch-2.d
@@ -9,12 +9,12 @@ Disassembly of section .text:
 
 0+ <bar-0xb>:
 [ ]*[a-f0-9]+: 66 e9 00 00           jmpw   4 <bar-0x7> 2: R_X86_64_PC16 foo-0x2
-[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 jmpq b <bar> 7: R_X86_64_PC32 foo-0x4
+[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 rex\.W jmp b <bar> 7: R_X86_64_PC32 foo-0x4
 
 0+b <bar>:
 [ ]*[a-f0-9]+: 89 c3                 mov    %eax,%ebx
 [ ]*[a-f0-9]+: 66 e8 00 00           callw  11 <bar\+0x6> f: R_X86_64_PC16 foo-0x2
-[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 callq 18 <bar\+0xd> 14: R_X86_64_PC32 foo-0x4
+[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 rex\.W call 18 <bar\+0xd> 14: R_X86_64_PC32 foo-0x4
 [ ]*[a-f0-9]+: 66 c3                 retw *
 [ ]*[a-f0-9]+: 66 c2 08 00           retw   \$0x8
 #pass
--- a/gas/testsuite/gas/i386/solaris/x86-64-jump.d
+++ b/gas/testsuite/gas/i386/solaris/x86-64-jump.d
@@ -9,19 +9,19 @@ Disassembly of section .text:
 
 0+ <.text>:
 [ ]*[a-f0-9]+: eb fe                 jmp    (0x0|0 <.text>)
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   0x7 3: R_X86_64_PC32 xxx-0x4
-[ ]*[a-f0-9]+: ff 24 25 00 00 00 00 jmpq   \*0x0 a: R_X86_64_32S xxx
-[ ]*[a-f0-9]+: ff e7                 jmpq   \*%rdi
-[ ]*[a-f0-9]+: ff 27                 jmpq   \*\(%rdi\)
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    0x7 3: R_X86_64_PC32 xxx-0x4
+[ ]*[a-f0-9]+: ff 24 25 00 00 00 00 jmp    \*0x0 a: R_X86_64_32S xxx
+[ ]*[a-f0-9]+: ff e7                 jmp    \*%rdi
+[ ]*[a-f0-9]+: ff 27                 jmp    \*\(%rdi\)
 [ ]*[a-f0-9]+: ff 2c bd 00 00 00 00 ljmp   \*0x0\(,%rdi,4\) 15: R_X86_64_32S xxx
 [ ]*[a-f0-9]+: 66 ff 2c bd 00 00 00 00 ljmpw  \*0x0\(,%rdi,4\) 1d: R_X86_64_32S xxx
 [ ]*[a-f0-9]+: ff 2c 25 00 00 00 00 ljmp   \*0x0 24: R_X86_64_32S xxx
 [ ]*[a-f0-9]+: 66 ff 2c 25 00 00 00 00 ljmpw  \*0x0 2c: R_X86_64_32S xxx
-[ ]*[a-f0-9]+: e8 cb ff ff ff       callq  0x0
-[ ]*[a-f0-9]+: e8 00 00 00 00       callq  0x3a 36: R_X86_64_PC32 xxx-0x4
-[ ]*[a-f0-9]+: ff 14 25 00 00 00 00 callq  \*0x0 3d: R_X86_64_32S xxx
-[ ]*[a-f0-9]+: ff d7                 callq  \*%rdi
-[ ]*[a-f0-9]+: ff 17                 callq  \*\(%rdi\)
+[ ]*[a-f0-9]+: e8 cb ff ff ff       call   0x0
+[ ]*[a-f0-9]+: e8 00 00 00 00       call   0x3a 36: R_X86_64_PC32 xxx-0x4
+[ ]*[a-f0-9]+: ff 14 25 00 00 00 00 call   \*0x0 3d: R_X86_64_32S xxx
+[ ]*[a-f0-9]+: ff d7                 call   \*%rdi
+[ ]*[a-f0-9]+: ff 17                 call   \*\(%rdi\)
 [ ]*[a-f0-9]+: ff 1c bd 00 00 00 00 lcall  \*0x0\(,%rdi,4\) 48: R_X86_64_32S xxx
 [ ]*[a-f0-9]+: 66 ff 1c bd 00 00 00 00 lcallw \*0x0\(,%rdi,4\) 50: R_X86_64_32S xxx
 [ ]*[a-f0-9]+: ff 1c 25 00 00 00 00 lcall  \*0x0 57: R_X86_64_32S xxx
@@ -33,14 +33,14 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 ff 13             callw  \*\(%rbx\)
 [ ]*[a-f0-9]+: 66 ff 1b             lcallw \*\(%rbx\)
 [ ]*[a-f0-9]+: ff 1b                 lcall  \*\(%rbx\)
-[ ]*[a-f0-9]+: ff 13                 callq  \*\(%rbx\)
-[ ]*[a-f0-9]+: ff 13                 callq  \*\(%rbx\)
+[ ]*[a-f0-9]+: ff 13                 call   \*\(%rbx\)
+[ ]*[a-f0-9]+: ff 13                 call   \*\(%rbx\)
 [ ]*[a-f0-9]+: ff 1b                 lcall  \*\(%rbx\)
 [ ]*[a-f0-9]+: 66 ff 23             jmpw   \*\(%rbx\)
 [ ]*[a-f0-9]+: 66 ff 2b             ljmpw  \*\(%rbx\)
 [ ]*[a-f0-9]+: ff 2b                 ljmp   \*\(%rbx\)
-[ ]*[a-f0-9]+: ff 23                 jmpq   \*\(%rbx\)
-[ ]*[a-f0-9]+: ff 23                 jmpq   \*\(%rbx\)
+[ ]*[a-f0-9]+: ff 23                 jmp    \*\(%rbx\)
+[ ]*[a-f0-9]+: ff 23                 jmp    \*\(%rbx\)
 [ ]*[a-f0-9]+: ff 2b                 ljmp   \*\(%rbx\)
 [ ]*[a-f0-9]+: eb 00                 jmp    0x[0-9a-f]*
 [ ]*[a-f0-9]+: 90                   nop
--- a/gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d
+++ b/gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d
@@ -9,23 +9,23 @@
 Disassembly of section .text:
 
 0+ <foo1-0x1c>:
-[ ]*[a-f0-9]+: f2 e8 00 00 00 00     bnd callq 6 <foo1-0x16> 2: R_X86_64_PC32 \*ABS\*\+0x10003c
-[ ]*[a-f0-9]+: f2 e9 00 00 00 00     bnd jmpq c <foo1-0x10> 8: R_X86_64_PC32 \*ABS\*\+0x10003c
-[ ]*[a-f0-9]+: 66 f2 48 e8 00 00 00 00 data16 bnd callq 14 <foo1-0x8> 10: R_X86_64_PC32 \*ABS\*\+0x10003c
-[ ]*[a-f0-9]+: 66 f2 48 e9 00 00 00 00 data16 bnd jmpq 1c <foo1> 18: R_X86_64_PC32 \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00     bnd call 6 <foo1-0x16> 2: R_X86_64_PC32 \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00     bnd jmp c <foo1-0x10> 8: R_X86_64_PC32 \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: 66 f2 48 e8 00 00 00 00 data16 bnd rex\.W call 14 <foo1-0x8> 10: R_X86_64_PC32 \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: 66 f2 48 e9 00 00 00 00 data16 bnd rex\.W jmp 1c <foo1> 18: R_X86_64_PC32 \*ABS\*\+0x10003c
 
 0+1c <foo1>:
 [ ]*[a-f0-9]+: f2 eb fd             bnd jmp 1c <foo1>
 [ ]*[a-f0-9]+: f2 72 fa             bnd jb 1c <foo1>
-[ ]*[a-f0-9]+: f2 e8 f4 ff ff ff     bnd callq 1c <foo1>
+[ ]*[a-f0-9]+: f2 e8 f4 ff ff ff     bnd call 1c <foo1>
 [ ]*[a-f0-9]+: f2 eb 09             bnd jmp 34 <foo2>
 [ ]*[a-f0-9]+: f2 72 06             bnd jb 34 <foo2>
-[ ]*[a-f0-9]+: f2 e8 00 00 00 00     bnd callq 34 <foo2>
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00     bnd call 34 <foo2>
 
 0+34 <foo2>:
-[ ]*[a-f0-9]+: f2 e9 00 00 00 00     bnd jmpq 3a <foo2\+0x6> 36: R_X86_64_PC32 foo-0x4
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00     bnd jmp 3a <foo2\+0x6> 36: R_X86_64_PC32 foo-0x4
 [ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 41 <foo2\+0xd> 3d: R_X86_64_PC32 foo-0x4
-[ ]*[a-f0-9]+: f2 e8 00 00 00 00     bnd callq 47 <foo2\+0x13> 43: R_X86_64_PC32 foo-0x4
-[ ]*[a-f0-9]+: f2 e9 00 00 00 00     bnd jmpq 4d <foo2\+0x19> 49: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00     bnd call 47 <foo2\+0x13> 43: R_X86_64_PC32 foo-0x4
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00     bnd jmp 4d <foo2\+0x19> 49: R_X86_64_PLT32 foo-0x4
 [ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 54 <foo2\+0x20> 50: R_X86_64_PLT32 foo-0x4
-[ ]*[a-f0-9]+: f2 e8 00 00 00 00     bnd callq 5a <foo2\+0x26> 56: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00     bnd call 5a <foo2\+0x26> 56: R_X86_64_PLT32 foo-0x4
--- a/gas/testsuite/gas/i386/solaris/x86-64-nop-3.d
+++ b/gas/testsuite/gas/i386/solaris/x86-64-nop-3.d
@@ -17,5 +17,5 @@ Disassembly of section .text:
 Disassembly of section .altinstr_replacement:
 
 0+ <.altinstr_replacement>:
- +[a-f0-9]+: e9 00 00 00 00       jmpq   5 <_start\+0x5> 1: R_X86_64_PC32 foo-0x4
+ +[a-f0-9]+: e9 00 00 00 00       jmp    5 <_start\+0x5> 1: R_X86_64_PC32 foo-0x4
 #pass
--- a/gas/testsuite/gas/i386/solaris/x86-64-nop-4.d
+++ b/gas/testsuite/gas/i386/solaris/x86-64-nop-4.d
@@ -20,5 +20,5 @@ Disassembly of section .altinstr_replace
  +[a-f0-9]+: 89 c0                 mov    %eax,%eax
  +[a-f0-9]+: 89 c0                 mov    %eax,%eax
  +[a-f0-9]+: 89 c0                 mov    %eax,%eax
- +[a-f0-9]+: e9 00 00 00 00       jmpq   b <_start\+0xb> 7: R_X86_64_PC32 foo-0x4
+ +[a-f0-9]+: e9 00 00 00 00       jmp    b <_start\+0xb> 7: R_X86_64_PC32 foo-0x4
 #pass
--- a/gas/testsuite/gas/i386/solaris/x86-64-nop-5.d
+++ b/gas/testsuite/gas/i386/solaris/x86-64-nop-5.d
@@ -23,5 +23,5 @@ Disassembly of section .altinstr_replace
  +[a-f0-9]+: 89 c0                 mov    %eax,%eax
  +[a-f0-9]+: 89 c0                 mov    %eax,%eax
  +[a-f0-9]+: 89 c0                 mov    %eax,%eax
- +[a-f0-9]+: e9 00 00 00 00       jmpq   d <_start\+0xd> 9: R_X86_64_PC32 foo-0x4
+ +[a-f0-9]+: e9 00 00 00 00       jmp    d <_start\+0xd> 9: R_X86_64_PC32 foo-0x4
 #pass
--- a/gas/testsuite/gas/i386/solaris/x86-64-relax-2.d
+++ b/gas/testsuite/gas/i386/solaris/x86-64-relax-2.d
@@ -10,25 +10,25 @@ Disassembly of section .text:
 0+ <foo>:
 [ ]*[a-f0-9]+: eb 24                 jmp    26 <local>
 [ ]*[a-f0-9]+: eb 1e                 jmp    22 <hidden_def>
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   9 <foo\+0x9> 5: R_X86_64_PC32 global_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   e <foo\+0xe> a: R_X86_64_PLT32 global_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   13 <foo\+0x13> f: R_X86_64_PC32 weak_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   18 <foo\+0x18> 14: R_X86_64_PC32 weak_hidden_undef-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   1d <foo\+0x1d> 19: R_X86_64_PC32 weak_hidden_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   22 <hidden_def> 1e: R_X86_64_PC32 hidden_undef-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    9 <foo\+0x9> 5: R_X86_64_PC32 global_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    e <foo\+0xe> a: R_X86_64_PLT32 global_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    13 <foo\+0x13> f: R_X86_64_PC32 weak_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    18 <foo\+0x18> 14: R_X86_64_PC32 weak_hidden_undef-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    1d <foo\+0x1d> 19: R_X86_64_PC32 weak_hidden_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    22 <hidden_def> 1e: R_X86_64_PC32 hidden_undef-0x4
 
 0+22 <hidden_def>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+23 <weak_hidden_def>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+24 <global_def>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+25 <weak_def>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+26 <local>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/gas/testsuite/gas/i386/solaris/x86-64-relax-3.d
+++ b/gas/testsuite/gas/i386/solaris/x86-64-relax-3.d
@@ -10,24 +10,24 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: eb 21                 jmp    23 <local>
 [ ]*[a-f0-9]+: eb 1b                 jmp    1f <hidden_def>
 [ ]*[a-f0-9]+: eb 1b                 jmp    21 <global_def>
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   b <foo\+0xb> 7: R_X86_64_PLT32 global_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   10 <foo\+0x10> c: R_X86_64_PC32 weak_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   15 <foo\+0x15> 11: R_X86_64_PC32 weak_hidden_undef-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   1a <foo\+0x1a> 16: R_X86_64_PC32 weak_hidden_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   1f <hidden_def> 1b: R_X86_64_PC32 hidden_undef-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    b <foo\+0xb> 7: R_X86_64_PLT32 global_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    10 <foo\+0x10> c: R_X86_64_PC32 weak_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    15 <foo\+0x15> 11: R_X86_64_PC32 weak_hidden_undef-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    1a <foo\+0x1a> 16: R_X86_64_PC32 weak_hidden_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    1f <hidden_def> 1b: R_X86_64_PC32 hidden_undef-0x4
 
 0+1f <hidden_def>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+20 <weak_hidden_def>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+21 <global_def>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+22 <weak_def>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+23 <local>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-1a.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-1a.d
@@ -73,5 +73,5 @@ Disassembly of section .text:
   be: 89 b5 50 fb ff ff     mov    %esi,-0x4b0\(%rbp\)
   c4: eb c2                 jmp    (0x)?88( .*)?
   c6: 5d                   pop    %rbp
-  c7: c3                   retq  
+  c7: c3                   ret *
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-1b.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-1b.d
@@ -73,5 +73,5 @@ Disassembly of section .text:
   be: 89 b5 50 fb ff ff     mov    %esi,-0x4b0\(%rbp\)
   c4: eb c2                 jmp    (0x)?88( .*)?
   c6: 5d                   pop    %rbp
-  c7: c3                   retq  
+  c7: c3                   ret *
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-1c.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-1c.d
@@ -73,5 +73,5 @@ Disassembly of section .text:
   be: 89 b5 50 fb ff ff     mov    %esi,-0x4b0\(%rbp\)
   c4: eb c2                 jmp    (0x)?88( .*)?
   c6: 5d                   pop    %rbp
-  c7: c3                   retq  
+  c7: c3                   ret *
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-1d.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-1d.d
@@ -72,5 +72,5 @@ Disassembly of section .text:
   bc: 89 b5 50 fb ff ff     mov    %esi,-0x4b0\(%rbp\)
   c2: eb c2                 jmp    (0x)?86( .*)?
   c4: 5d                   pop    %rbp
-  c5: c3                   retq  
+  c5: c3                   ret *
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-1e.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-1e.d
@@ -72,5 +72,5 @@ Disassembly of section .text:
   b9: 89 b5 50 fb ff ff     mov    %esi,-0x4b0\(%rbp\)
   bf: eb c2                 jmp    (0x)?83( .*)?
   c1: 5d                   pop    %rbp
-  c2: c3                   retq  
+  c2: c3                   ret *
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-1f.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-1f.d
@@ -73,5 +73,5 @@ Disassembly of section .text:
   bb: 89 b5 50 fb ff ff     mov    %esi,-0x4b0\(%rbp\)
   c1: eb c2                 jmp    (0x)?85( .*)?
   c3: 5d                   pop    %rbp
-  c4: c3                   retq  
+  c4: c3                   ret *
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-1g.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-1g.d
@@ -73,5 +73,5 @@ Disassembly of section .text:
   be: 89 b5 50 fb ff ff     mov    %esi,-0x4b0\(%rbp\)
   c4: eb c2                 jmp    (0x)?88( .*)?
   c6: 5d                   pop    %rbp
-  c7: c3                   retq  
+  c7: c3                   ret *
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-1h.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-1h.d
@@ -72,5 +72,5 @@ Disassembly of section .text:
   b8: 89 b5 50 fb ff ff     mov    %esi,-0x4b0\(%rbp\)
   be: eb c2                 jmp    (0x)?82( .*)?
   c0: 5d                   pop    %rbp
-  c1: c3                   retq  
+  c1: c3                   ret *
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-1i.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-1i.d
@@ -76,5 +76,5 @@ Disassembly of section .text:
   be: 89 b5 50 fb ff ff     mov    %esi,-0x4b0\(%rbp\)
   c4: eb c2                 jmp    (0x)?88( .*)?
   c6: 5d                   pop    %rbp
-  c7: c3                   retq  
+  c7: c3                   ret *
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-2a.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-2a.d
@@ -18,7 +18,7 @@ Disassembly of section .text:
   15: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   18: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   1b: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  1e: ff e0                 jmpq   \*%rax
+  1e: ff e0                 jmp    \*%rax
   20: 55                   push   %rbp
   21: 55                   push   %rbp
   22: 64 89 04 25 01 00 00 00 mov    %eax,%fs:0x1
@@ -28,7 +28,7 @@ Disassembly of section .text:
   33: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   36: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   39: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  3c: ff d0                 callq  \*%rax
+  3c: ff d0                 call   \*%rax
   3e: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   41: 55                   push   %rbp
   42: 55                   push   %rbp
@@ -37,7 +37,7 @@ Disassembly of section .text:
   4e: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   51: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   54: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  57: e8 [0-9a-f ]+       callq  .*
+  57: e8 [0-9a-f ]+       call   .*
   5c: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   5f: 55                   push   %rbp
   60: 55                   push   %rbp
@@ -45,6 +45,6 @@ Disassembly of section .text:
   62: 64 89 04 25 01 00 00 00 mov    %eax,%fs:0x1
   6a: 48 89 e5             mov    %rsp,%rbp
   6d: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  70: ff 14 25 00 00 00 00 callq  \*0x0
+  70: ff 14 25 00 00 00 00 call   \*0x0
   77: 55                   push   %rbp
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-2b.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-2b.d
@@ -18,7 +18,7 @@ Disassembly of section .text:
   17: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   1a: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   1d: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  20: ff e0                 jmpq   \*%rax
+  20: ff e0                 jmp    \*%rax
   22: 2e 2e 55             cs cs push %rbp
   25: 55                   push   %rbp
   26: 64 89 04 25 01 00 00 00 mov    %eax,%fs:0x1
@@ -28,7 +28,7 @@ Disassembly of section .text:
   37: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   3a: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   3d: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  40: ff d0                 callq  \*%rax
+  40: ff d0                 call   \*%rax
   42: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   45: 55                   push   %rbp
   46: 55                   push   %rbp
@@ -37,7 +37,7 @@ Disassembly of section .text:
   52: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   55: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   58: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  5b: e8 [0-9a-f ]+       callq  .*
+  5b: e8 [0-9a-f ]+       call   .*
   60: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   63: 55                   push   %rbp
   64: 55                   push   %rbp
@@ -45,6 +45,6 @@ Disassembly of section .text:
   66: 64 89 04 25 01 00 00 00 mov    %eax,%fs:0x1
   6e: 48 89 e5             mov    %rsp,%rbp
   71: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  74: ff 14 25 00 00 00 00 callq  \*0x0
+  74: ff 14 25 00 00 00 00 call   \*0x0
   7b: 55                   push   %rbp
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-2c.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-2c.d
@@ -18,7 +18,7 @@ Disassembly of section .text:
   17: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   1a: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   1d: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  20: ff e0                 jmpq   \*%rax
+  20: ff e0                 jmp    \*%rax
   22: 2e 2e 55             cs cs push %rbp
   25: 55                   push   %rbp
   26: 64 89 04 25 01 00 00 00 mov    %eax,%fs:0x1
@@ -28,7 +28,7 @@ Disassembly of section .text:
   37: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   3a: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   3d: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  40: ff d0                 callq  \*%rax
+  40: ff d0                 call   \*%rax
   42: 2e 2e 2e 2e 2e 89 75 f4 cs cs cs cs mov %esi,%cs:-0xc\(%rbp\)
   4a: 55                   push   %rbp
   4b: 55                   push   %rbp
@@ -37,7 +37,7 @@ Disassembly of section .text:
   57: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   5a: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   5d: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  60: e8 [0-9a-f ]+       callq  .*
+  60: e8 [0-9a-f ]+       call   .*
   65: 2e 2e 2e 2e 2e 89 75 f4 cs cs cs cs mov %esi,%cs:-0xc\(%rbp\)
   6d: 2e 2e 55             cs cs push %rbp
   70: 55                   push   %rbp
@@ -45,6 +45,6 @@ Disassembly of section .text:
   72: 64 89 04 25 01 00 00 00 mov    %eax,%fs:0x1
   7a: 48 89 e5             mov    %rsp,%rbp
   7d: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  80: ff 14 25 00 00 00 00 callq  \*0x0
+  80: ff 14 25 00 00 00 00 call   \*0x0
   87: 55                   push   %rbp
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-3.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-3.d
@@ -17,7 +17,7 @@ Disassembly of section .text:
   15: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   18: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   1b: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  1e: e8 00 00 00 00       callq  23 <foo\+0x23>
+  1e: e8 00 00 00 00       call   23 <foo\+0x23>
   23: 55                   push   %rbp
   24: 55                   push   %rbp
   25: 64 89 04 25 01 00 00 00 mov    %eax,%fs:0x1
@@ -27,6 +27,6 @@ Disassembly of section .text:
   36: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   39: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   3c: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  3f: ff 15 00 00 00 00     callq  \*0x0\(%rip\)        # 45 <foo\+0x45>
+  3f: ff 15 00 00 00 00     call   \*0x0\(%rip\)        # 45 <foo\+0x45>
   45: 89 75 f4             mov    %esi,-0xc\(%rbp\)
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-4a.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-4a.d
@@ -17,7 +17,7 @@ Disassembly of section .text:
   16: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   19: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   1c: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  1f: c3                   retq  
+  1f: c3                   ret *
   20: 55                   push   %rbp
   21: 64 89 04 25 01 00 00 00 mov    %eax,%fs:0x1
   29: 55                   push   %rbp
@@ -28,6 +28,6 @@ Disassembly of section .text:
   34: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   37: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   3a: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  3d: c2 1e 00             retq   \$0x1e
+  3d: c2 1e 00             ret    \$0x1e
   40: 55                   push   %rbp
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-4b.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-4b.d
@@ -17,7 +17,7 @@ Disassembly of section .text:
   17: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   1a: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   1d: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  20: c3                   retq  
+  20: c3                   ret *
   21: 2e 2e 55             cs cs push %rbp
   24: 64 89 04 25 01 00 00 00 mov    %eax,%fs:0x1
   2c: 55                   push   %rbp
@@ -28,6 +28,6 @@ Disassembly of section .text:
   37: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   3a: 89 75 f4             mov    %esi,-0xc\(%rbp\)
   3d: 89 75 f4             mov    %esi,-0xc\(%rbp\)
-  40: c2 1e 00             retq   \$0x1e
+  40: c2 1e 00             ret    \$0x1e
   43: 55                   push   %rbp
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-5.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-5.d
@@ -33,7 +33,7 @@ Disassembly of section .text:
   38: c1 e9 02             shr    \$0x2,%ecx
   3b: c1 e9 02             shr    \$0x2,%ecx
   3e: f6 c2 02             test   \$0x2,%dl
-  41: e8 00 00 00 00       callq  (0x)?46( .*)?
+  41: e8 00 00 00 00       call   (0x)?46( .*)?
   46: 75 e3                 jne    (0x)?2b( .*)?
   48: 31 c0                 xor    %eax,%eax
 #pass
--- a/gas/testsuite/gas/i386/x86-64-align-branch-6.d
+++ b/gas/testsuite/gas/i386/x86-64-align-branch-6.d
@@ -15,5 +15,5 @@ Disassembly of section .text:
  +[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data16 nopw %cs:0x0\(%rax,%rax,1\)
  +[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl   0x0\(%rax\)
  +[a-f0-9]+: f2 73 bf             bnd jae 0 <_start>
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 #pass
--- a/gas/testsuite/gas/i386/x86-64-branch-2.d
+++ b/gas/testsuite/gas/i386/x86-64-branch-2.d
@@ -9,12 +9,12 @@ Disassembly of section .text:
 
 0+ <bar-0xb>:
 [ ]*[a-f0-9]+: 66 e9 00 00           jmpw   4 <bar-0x7> 2: R_X86_64_PC16 foo-0x2
-[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 jmpq b <bar> 7: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 rex\.W jmp b <bar> 7: R_X86_64_PLT32 foo-0x4
 
 0+b <bar>:
 [ ]*[a-f0-9]+: 89 c3                 mov    %eax,%ebx
 [ ]*[a-f0-9]+: 66 e8 00 00           callw  11 <bar\+0x6> f: R_X86_64_PC16 foo-0x2
-[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 callq 18 <bar\+0xd> 14: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 rex\.W call 18 <bar\+0xd> 14: R_X86_64_PLT32 foo-0x4
 [ ]*[a-f0-9]+: 66 c3                 retw *
 [ ]*[a-f0-9]+: 66 c2 08 00           retw   \$0x8
 #pass
--- a/gas/testsuite/gas/i386/x86-64-branch-3.d
+++ b/gas/testsuite/gas/i386/x86-64-branch-3.d
@@ -8,15 +8,15 @@
 Disassembly of section .text:
 
 0+ <bar-0xd>:
-[ ]*[a-f0-9]+: 66 e9 00 00 00 00     data16 jmpq 6 <bar-0x7> 2: R_X86_64_PLT32 foo-0x4
-[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 rex\.W jmpq d <bar> 9: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: 66 e9 00 00 00 00     data16 jmp 6 <bar-0x7> 2: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: 66 48 e9 00 00 00 00 data16 rex\.W jmp d <bar> 9: R_X86_64_PLT32 foo-0x4
 
 0+d <bar>:
 [ ]*[a-f0-9]+: 89 c3                 mov    %eax,%ebx
-[ ]*[a-f0-9]+: 66 e8 00 00 00 00     data16 callq 15 <bar\+0x8> 11: R_X86_64_PLT32 foo-0x4
-[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 rex\.W callq 1c <bar\+0xf> 18: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: 66 e8 00 00 00 00     data16 call 15 <bar\+0x8> 11: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 rex\.W call 1c <bar\+0xf> 18: R_X86_64_PLT32 foo-0x4
 [ ]*[a-f0-9]+: 66 c7 f8 00 00       xbeginw 21 <bar\+0x14> 1f: R_X86_64_PC16 foo-0x2
-[ ]*[a-f0-9]+: 66 48 c7 f8 00 00 00 00 data16 xbeginq 29 <bar\+0x1c> 25: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: 66 48 c7 f8 00 00 00 00 data16 rex\.W xbegin 29 <bar\+0x1c> 25: R_X86_64_PLT32 foo-0x4
 [ ]*[a-f0-9]+: 48 ff 18             lcallq \*\(%rax\)
 [ ]*[a-f0-9]+: 48 ff 29             ljmpq  \*\(%rcx\)
 #pass
--- a/gas/testsuite/gas/i386/x86-64-branch.d
+++ b/gas/testsuite/gas/i386/x86-64-branch.d
@@ -7,35 +7,35 @@
 Disassembly of section .text:
 
 0+ <.text>:
-[ ]*[a-f0-9]+: ff d0                 callq  \*%rax
-[ ]*[a-f0-9]+: ff d0                 callq  \*%rax
-[ ]*[a-f0-9]+: 66 ff d0             data16 callq \*%rax
-[ ]*[a-f0-9]+: 66 ff d0             data16 callq \*%rax
-[ ]*[a-f0-9]+: 66 ff 10             data16 callq \*\(%rax\)
-[ ]*[a-f0-9]+: ff e0                 jmpq   \*%rax
-[ ]*[a-f0-9]+: ff e0                 jmpq   \*%rax
-[ ]*[a-f0-9]+: 66 ff e0             data16 jmpq \*%rax
-[ ]*[a-f0-9]+: 66 ff e0             data16 jmpq \*%rax
-[ ]*[a-f0-9]+: 66 ff 20             data16 jmpq \*\(%rax\)
-[ ]*[a-f0-9]+: e8 (00|5b) 00 (00|10) 00       callq  (0x1f|10007a <.text\+0x10007a>)
-[ ]*[a-f0-9]+: e9 (00|60) 00 (00|10) 00       jmpq   (0x24|100084 <.text\+0x100084>)
-[ ]*[a-f0-9]+: 66 e8 00 00 00 00     data16 callq (0x2a|2a <.text\+0x2a>)
-[ ]*[a-f0-9]+: 66 e9 00 00 00 00     data16 jmpq (0x30|30 <.text\+0x30>)
+[ ]*[a-f0-9]+: ff d0                 call   \*%rax
+[ ]*[a-f0-9]+: ff d0                 call   \*%rax
+[ ]*[a-f0-9]+: 66 ff d0             data16 call \*%rax
+[ ]*[a-f0-9]+: 66 ff d0             data16 call \*%rax
+[ ]*[a-f0-9]+: 66 ff 10             data16 call \*\(%rax\)
+[ ]*[a-f0-9]+: ff e0                 jmp    \*%rax
+[ ]*[a-f0-9]+: ff e0                 jmp    \*%rax
+[ ]*[a-f0-9]+: 66 ff e0             data16 jmp \*%rax
+[ ]*[a-f0-9]+: 66 ff e0             data16 jmp \*%rax
+[ ]*[a-f0-9]+: 66 ff 20             data16 jmp \*\(%rax\)
+[ ]*[a-f0-9]+: e8 (00|5b) 00 (00|10) 00       call   (0x1f|10007a <.text\+0x10007a>)
+[ ]*[a-f0-9]+: e9 (00|60) 00 (00|10) 00       jmp    (0x24|100084 <.text\+0x100084>)
+[ ]*[a-f0-9]+: 66 e8 00 00 00 00     data16 call (0x2a|2a <.text\+0x2a>)
+[ ]*[a-f0-9]+: 66 e9 00 00 00 00     data16 jmp (0x30|30 <.text\+0x30>)
 [ ]*[a-f0-9]+: 66 0f 82 00 00 00 00 data16 jb (0x37|37 <.text\+0x37>)
-[ ]*[a-f0-9]+: 66 c3                 data16 retq *
-[ ]*[a-f0-9]+: 66 c2 08 00           data16 retq \$0x8
-[ ]*[a-f0-9]+: ff d0                 callq  \*%rax
-[ ]*[a-f0-9]+: ff d0                 callq  \*%rax
-[ ]*[a-f0-9]+: 66 ff d0             data16 callq \*%rax
-[ ]*[a-f0-9]+: 66 ff d0             data16 callq \*%rax
-[ ]*[a-f0-9]+: 66 ff 10             data16 callq \*\(%rax\)
-[ ]*[a-f0-9]+: ff e0                 jmpq   \*%rax
-[ ]*[a-f0-9]+: ff e0                 jmpq   \*%rax
-[ ]*[a-f0-9]+: 66 ff e0             data16 jmpq \*%rax
-[ ]*[a-f0-9]+: 66 ff e0             data16 jmpq \*%rax
-[ ]*[a-f0-9]+: 66 ff 20             data16 jmpq \*\(%rax\)
-[ ]*[a-f0-9]+: e8 .. 00 (00|10) 00       callq  (0x[0-9a-f]*|100[0-9a-f]* <.text\+0x100[0-9a-f]*>)
-[ ]*[a-f0-9]+: e9 .. 00 (00|10) 00       jmpq   (0x[0-9a-f]*|100[0-9a-f]* <.text\+0x100[0-9a-f]*>)
-[ ]*[a-f0-9]+: 66 c3                 data16 retq *
-[ ]*[a-f0-9]+: 66 c2 08 00           data16 retq \$0x8
+[ ]*[a-f0-9]+: 66 c3                 data16 ret *
+[ ]*[a-f0-9]+: 66 c2 08 00           data16 ret \$0x8
+[ ]*[a-f0-9]+: ff d0                 call   \*%rax
+[ ]*[a-f0-9]+: ff d0                 call   \*%rax
+[ ]*[a-f0-9]+: 66 ff d0             data16 call \*%rax
+[ ]*[a-f0-9]+: 66 ff d0             data16 call \*%rax
+[ ]*[a-f0-9]+: 66 ff 10             data16 call \*\(%rax\)
+[ ]*[a-f0-9]+: ff e0                 jmp    \*%rax
+[ ]*[a-f0-9]+: ff e0                 jmp    \*%rax
+[ ]*[a-f0-9]+: 66 ff e0             data16 jmp \*%rax
+[ ]*[a-f0-9]+: 66 ff e0             data16 jmp \*%rax
+[ ]*[a-f0-9]+: 66 ff 20             data16 jmp \*\(%rax\)
+[ ]*[a-f0-9]+: e8 .. 00 (00|10) 00       call   (0x[0-9a-f]*|100[0-9a-f]* <.text\+0x100[0-9a-f]*>)
+[ ]*[a-f0-9]+: e9 .. 00 (00|10) 00       jmp    (0x[0-9a-f]*|100[0-9a-f]* <.text\+0x100[0-9a-f]*>)
+[ ]*[a-f0-9]+: 66 c3                 data16 ret *
+[ ]*[a-f0-9]+: 66 c2 08 00           data16 ret \$0x8
 #pass
--- a/gas/testsuite/gas/i386/x86-64-disassem.d
+++ b/gas/testsuite/gas/i386/x86-64-disassem.d
@@ -246,51 +246,51 @@ Disassembly of section \.text:
 [ ]*[a-f0-9]+:[ ]*c4 e1 f9 99[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popq   \(%rcx\)
+[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop    \(%rcx\)
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*6a 01[ ]*pushq  \$0x1
+[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push   \$0x1
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*04 01[ ]*add    \$0x1,%al
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popq   \(%rcx\)
+[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop    \(%rcx\)
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*6a 01[ ]*pushq  \$0x1
+[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push   \$0x1
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*04 01[ ]*add    \$0x1,%al
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popq   \(%rcx\)
+[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop    \(%rcx\)
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*6a 01[ ]*pushq  \$0x1
+[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push   \$0x1
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*04 01[ ]*add    \$0x1,%al
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popq   \(%rcx\)
+[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop    \(%rcx\)
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*6a 01[ ]*pushq  \$0x1
+[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push   \$0x1
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*04 01[ ]*add    \$0x1,%al
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popq   \(%rcx\)
+[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop    \(%rcx\)
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*6a 01[ ]*pushq  \$0x1
+[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push   \$0x1
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*04 01[ ]*add    \$0x1,%al
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popq   \(%rcx\)
+[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop    \(%rcx\)
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*6a 01[ ]*pushq  \$0x1
+[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push   \$0x1
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*04 01[ ]*add    \$0x1,%al
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popq   \(%rcx\)
+[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop    \(%rcx\)
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*6a 01[ ]*pushq  \$0x1
+[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push   \$0x1
 [ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*04 01[ ]*add    \$0x1,%al
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*8f 01[ ]*popq   \(%rcx\)
+[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop    \(%rcx\)
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*6a 01[ ]*pushq  \$0x1
+[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push   \$0x1
 [ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*04 01[ ]*add    \$0x1,%al
 [ ]*[a-f0-9]+:[ ]*c5 f8 92[ ]*\(bad\)[ ]*
@@ -346,9 +346,9 @@ Disassembly of section \.text:
 [ ]*[a-f0-9]+:[ ]*62 72 ad 08 1c[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*01 01[ ]*add[ ]*%eax,\(%rcx\)
 [ ]*[a-f0-9]+:[ ]*62 f3 7d 28 1b[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c8 25 62 f3[ ]*enterq[ ]*\$0x6225,\$0xf3
+[ ]*[a-f0-9]+:[ ]*c8 25 62 f3[ ]*enter *\$0x6225,\$0xf3
 [ ]*[a-f0-9]+:[ ]*62 f3 75 08 23[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c2 25 62[ ]*retq[ ]*\$0x6225
+[ ]*[a-f0-9]+:[ ]*c2 25 62[ ]*ret *\$0x6225
 [ ]*[a-f0-9]+:[ ]*62 f2 7d 28 5b[ ]*\(bad\)[ ]*
 [ ]*[a-f0-9]+:[ ]*41 37[ ]*rex.B \(bad\)[ ]*
 #pass
--- a/gas/testsuite/gas/i386/x86-64-disp32.d
+++ b/gas/testsuite/gas/i386/x86-64-disp32.d
@@ -18,7 +18,7 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%rax\),%xmm3
 [ ]*[a-f0-9]+: eb 07                 jmp    30 <foo>
 [ ]*[a-f0-9]+: eb 05                 jmp    30 <foo>
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   30 <foo>
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    30 <foo>
 
 0+30 <foo>:
 [ ]*[a-f0-9]+: 89 18                 mov    %ebx,\(%rax\)
--- a/gas/testsuite/gas/i386/x86-64-gotpcrel-no-relax.d
+++ b/gas/testsuite/gas/i386/x86-64-gotpcrel-no-relax.d
@@ -1,4 +1,5 @@
 #source: x86-64-gotpcrel.s
+#name: x86-64 gotpcrel (no relax)
 #as: -mrelax-relocations=no
 #objdump: -dwr
 
@@ -12,16 +13,16 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 48 8b 04 25 00 00 00 00 mov    0x0,%rax b: R_X86_64_GOTPCREL foo
 [ ]*[a-f0-9]+: 48 8b 05 00 00 00 00 mov    0x0\(%rip\),%rax        # 16 <_start\+0x16> 12: R_X86_64_GOTPCREL foo-0x4
 [ ]*[a-f0-9]+: 48 8b 81 00 00 00 00 mov    0x0\(%rcx\),%rax 19: R_X86_64_GOTPCREL foo
-[ ]*[a-f0-9]+: ff 15 00 00 00 00     callq  \*0x0\(%rip\)        # 23 <_start\+0x23> 1f: R_X86_64_GOTPCREL foo-0x4
-[ ]*[a-f0-9]+: ff 90 00 00 00 00     callq  \*0x0\(%rax\) 25: R_X86_64_GOTPCREL foo
-[ ]*[a-f0-9]+: ff 25 00 00 00 00     jmpq   \*0x0\(%rip\)        # 2f <_start\+0x2f> 2b: R_X86_64_GOTPCREL foo-0x4
-[ ]*[a-f0-9]+: ff a1 00 00 00 00     jmpq   \*0x0\(%rcx\) 31: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: ff 15 00 00 00 00     call   \*0x0\(%rip\)        # 23 <_start\+0x23> 1f: R_X86_64_GOTPCREL foo-0x4
+[ ]*[a-f0-9]+: ff 90 00 00 00 00     call   \*0x0\(%rax\) 25: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: ff 25 00 00 00 00     jmp    \*0x0\(%rip\)        # 2f <_start\+0x2f> 2b: R_X86_64_GOTPCREL foo-0x4
+[ ]*[a-f0-9]+: ff a1 00 00 00 00     jmp    \*0x0\(%rcx\) 31: R_X86_64_GOTPCREL foo
 [ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov    \$0x0,%rax 38: R_X86_64_GOTPCREL foo
 [ ]*[a-f0-9]+: 48 8b 04 25 00 00 00 00 mov    0x0,%rax 40: R_X86_64_GOTPCREL foo
 [ ]*[a-f0-9]+: 48 8b 05 00 00 00 00 mov    0x0\(%rip\),%rax        # 4b <_start\+0x4b> 47: R_X86_64_GOTPCREL foo-0x4
 [ ]*[a-f0-9]+: 48 8b 81 00 00 00 00 mov    0x0\(%rcx\),%rax 4e: R_X86_64_GOTPCREL foo
-[ ]*[a-f0-9]+: ff 15 00 00 00 00     callq  \*0x0\(%rip\)        # 58 <_start\+0x58> 54: R_X86_64_GOTPCREL foo-0x4
-[ ]*[a-f0-9]+: ff 90 00 00 00 00     callq  \*0x0\(%rax\) 5a: R_X86_64_GOTPCREL foo
-[ ]*[a-f0-9]+: ff 25 00 00 00 00     jmpq   \*0x0\(%rip\)        # 64 <_start\+0x64> 60: R_X86_64_GOTPCREL foo-0x4
-[ ]*[a-f0-9]+: ff a1 00 00 00 00     jmpq   \*0x0\(%rcx\) 66: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: ff 15 00 00 00 00     call   \*0x0\(%rip\)        # 58 <_start\+0x58> 54: R_X86_64_GOTPCREL foo-0x4
+[ ]*[a-f0-9]+: ff 90 00 00 00 00     call   \*0x0\(%rax\) 5a: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: ff 25 00 00 00 00     jmp    \*0x0\(%rip\)        # 64 <_start\+0x64> 60: R_X86_64_GOTPCREL foo-0x4
+[ ]*[a-f0-9]+: ff a1 00 00 00 00     jmp    \*0x0\(%rcx\) 66: R_X86_64_GOTPCREL foo
 #pass
--- a/gas/testsuite/gas/i386/x86-64-gotpcrel.d
+++ b/gas/testsuite/gas/i386/x86-64-gotpcrel.d
@@ -1,5 +1,6 @@
 #as: -mrelax-relocations=yes
 #objdump: -dwr
+#name: x86-64 gotpcrel
 
 .*: +file format .*
 
@@ -11,16 +12,16 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 48 8b 04 25 00 00 00 00 mov    0x0,%rax b: R_X86_64_GOTPCREL foo
 [ ]*[a-f0-9]+: 48 8b 05 00 00 00 00 mov    0x0\(%rip\),%rax        # 16 <_start\+0x16> 12: R_X86_64_REX_GOTPCRELX foo-0x4
 [ ]*[a-f0-9]+: 48 8b 81 00 00 00 00 mov    0x0\(%rcx\),%rax 19: R_X86_64_GOTPCREL foo
-[ ]*[a-f0-9]+: ff 15 00 00 00 00     callq  \*0x0\(%rip\)        # 23 <_start\+0x23> 1f: R_X86_64_GOTPCRELX foo-0x4
-[ ]*[a-f0-9]+: ff 90 00 00 00 00     callq  \*0x0\(%rax\) 25: R_X86_64_GOTPCREL foo
-[ ]*[a-f0-9]+: ff 25 00 00 00 00     jmpq   \*0x0\(%rip\)        # 2f <_start\+0x2f> 2b: R_X86_64_GOTPCRELX foo-0x4
-[ ]*[a-f0-9]+: ff a1 00 00 00 00     jmpq   \*0x0\(%rcx\) 31: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: ff 15 00 00 00 00     call   \*0x0\(%rip\)        # 23 <_start\+0x23> 1f: R_X86_64_GOTPCRELX foo-0x4
+[ ]*[a-f0-9]+: ff 90 00 00 00 00     call   \*0x0\(%rax\) 25: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: ff 25 00 00 00 00     jmp    \*0x0\(%rip\)        # 2f <_start\+0x2f> 2b: R_X86_64_GOTPCRELX foo-0x4
+[ ]*[a-f0-9]+: ff a1 00 00 00 00     jmp    \*0x0\(%rcx\) 31: R_X86_64_GOTPCREL foo
 [ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov    \$0x0,%rax 38: R_X86_64_GOTPCREL foo
 [ ]*[a-f0-9]+: 48 8b 04 25 00 00 00 00 mov    0x0,%rax 40: R_X86_64_GOTPCREL foo
 [ ]*[a-f0-9]+: 48 8b 05 00 00 00 00 mov    0x0\(%rip\),%rax        # 4b <_start\+0x4b> 47: R_X86_64_REX_GOTPCRELX foo-0x4
 [ ]*[a-f0-9]+: 48 8b 81 00 00 00 00 mov    0x0\(%rcx\),%rax 4e: R_X86_64_GOTPCREL foo
-[ ]*[a-f0-9]+: ff 15 00 00 00 00     callq  \*0x0\(%rip\)        # 58 <_start\+0x58> 54: R_X86_64_GOTPCRELX foo-0x4
-[ ]*[a-f0-9]+: ff 90 00 00 00 00     callq  \*0x0\(%rax\) 5a: R_X86_64_GOTPCREL foo
-[ ]*[a-f0-9]+: ff 25 00 00 00 00     jmpq   \*0x0\(%rip\)        # 64 <_start\+0x64> 60: R_X86_64_GOTPCRELX foo-0x4
-[ ]*[a-f0-9]+: ff a1 00 00 00 00     jmpq   \*0x0\(%rcx\) 66: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: ff 15 00 00 00 00     call   \*0x0\(%rip\)        # 58 <_start\+0x58> 54: R_X86_64_GOTPCRELX foo-0x4
+[ ]*[a-f0-9]+: ff 90 00 00 00 00     call   \*0x0\(%rax\) 5a: R_X86_64_GOTPCREL foo
+[ ]*[a-f0-9]+: ff 25 00 00 00 00     jmp    \*0x0\(%rip\)        # 64 <_start\+0x64> 60: R_X86_64_GOTPCRELX foo-0x4
+[ ]*[a-f0-9]+: ff a1 00 00 00 00     jmp    \*0x0\(%rcx\) 66: R_X86_64_GOTPCREL foo
 #pass
--- a/gas/testsuite/gas/i386/x86-64-ifunc.d
+++ b/gas/testsuite/gas/i386/x86-64-ifunc.d
@@ -7,14 +7,14 @@
 Disassembly of section .text:
 
 0+ <foo>:
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   5 <ifunc> 1: R_X86_64_PLT32 ifunc(\+0xf+c|-0x4)
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    5 <ifunc> 1: R_X86_64_PLT32 ifunc(\+0xf+c|-0x4)
 
 0+5 <ifunc>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+6 <bar>:
 [ ]*[a-f0-9]+: eb 00                 jmp    8 <normal>
 
 0+8 <normal>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/gas/testsuite/gas/i386/x86-64-jump.d
+++ b/gas/testsuite/gas/i386/x86-64-jump.d
@@ -9,19 +9,19 @@ Disassembly of section .text:
 
 0+ <.text>:
 [ ]*[a-f0-9]+: eb fe                 jmp    (0x0|0 <.text>)
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   0x7 3: R_X86_64_PLT32 xxx-0x4
-[ ]*[a-f0-9]+: ff 24 25 00 00 00 00 jmpq   \*0x0 a: R_X86_64_32S xxx
-[ ]*[a-f0-9]+: ff e7                 jmpq   \*%rdi
-[ ]*[a-f0-9]+: ff 27                 jmpq   \*\(%rdi\)
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    0x7 3: R_X86_64_PLT32 xxx-0x4
+[ ]*[a-f0-9]+: ff 24 25 00 00 00 00 jmp    \*0x0 a: R_X86_64_32S xxx
+[ ]*[a-f0-9]+: ff e7                 jmp    \*%rdi
+[ ]*[a-f0-9]+: ff 27                 jmp    \*\(%rdi\)
 [ ]*[a-f0-9]+: ff 2c bd 00 00 00 00 ljmp   \*0x0\(,%rdi,4\) 15: R_X86_64_32S xxx
 [ ]*[a-f0-9]+: 66 ff 2c bd 00 00 00 00 ljmpw  \*0x0\(,%rdi,4\) 1d: R_X86_64_32S xxx
 [ ]*[a-f0-9]+: ff 2c 25 00 00 00 00 ljmp   \*0x0 24: R_X86_64_32S xxx
 [ ]*[a-f0-9]+: 66 ff 2c 25 00 00 00 00 ljmpw  \*0x0 2c: R_X86_64_32S xxx
-[ ]*[a-f0-9]+: e8 cb ff ff ff       callq  0x0
-[ ]*[a-f0-9]+: e8 00 00 00 00       callq  0x3a 36: R_X86_64_PLT32 xxx-0x4
-[ ]*[a-f0-9]+: ff 14 25 00 00 00 00 callq  \*0x0 3d: R_X86_64_32S xxx
-[ ]*[a-f0-9]+: ff d7                 callq  \*%rdi
-[ ]*[a-f0-9]+: ff 17                 callq  \*\(%rdi\)
+[ ]*[a-f0-9]+: e8 cb ff ff ff       call   0x0
+[ ]*[a-f0-9]+: e8 00 00 00 00       call   0x3a 36: R_X86_64_PLT32 xxx-0x4
+[ ]*[a-f0-9]+: ff 14 25 00 00 00 00 call   \*0x0 3d: R_X86_64_32S xxx
+[ ]*[a-f0-9]+: ff d7                 call   \*%rdi
+[ ]*[a-f0-9]+: ff 17                 call   \*\(%rdi\)
 [ ]*[a-f0-9]+: ff 1c bd 00 00 00 00 lcall  \*0x0\(,%rdi,4\) 48: R_X86_64_32S xxx
 [ ]*[a-f0-9]+: 66 ff 1c bd 00 00 00 00 lcallw \*0x0\(,%rdi,4\) 50: R_X86_64_32S xxx
 [ ]*[a-f0-9]+: ff 1c 25 00 00 00 00 lcall  \*0x0 57: R_X86_64_32S xxx
@@ -33,14 +33,14 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 ff 13             callw  \*\(%rbx\)
 [ ]*[a-f0-9]+: 66 ff 1b             lcallw \*\(%rbx\)
 [ ]*[a-f0-9]+: ff 1b                 lcall  \*\(%rbx\)
-[ ]*[a-f0-9]+: ff 13                 callq  \*\(%rbx\)
-[ ]*[a-f0-9]+: ff 13                 callq  \*\(%rbx\)
+[ ]*[a-f0-9]+: ff 13                 call   \*\(%rbx\)
+[ ]*[a-f0-9]+: ff 13                 call   \*\(%rbx\)
 [ ]*[a-f0-9]+: ff 1b                 lcall  \*\(%rbx\)
 [ ]*[a-f0-9]+: 66 ff 23             jmpw   \*\(%rbx\)
 [ ]*[a-f0-9]+: 66 ff 2b             ljmpw  \*\(%rbx\)
 [ ]*[a-f0-9]+: ff 2b                 ljmp   \*\(%rbx\)
-[ ]*[a-f0-9]+: ff 23                 jmpq   \*\(%rbx\)
-[ ]*[a-f0-9]+: ff 23                 jmpq   \*\(%rbx\)
+[ ]*[a-f0-9]+: ff 23                 jmp    \*\(%rbx\)
+[ ]*[a-f0-9]+: ff 23                 jmp    \*\(%rbx\)
 [ ]*[a-f0-9]+: ff 2b                 ljmp   \*\(%rbx\)
 [ ]*[a-f0-9]+: eb 00                 jmp    0x[0-9a-f]*
 [ ]*[a-f0-9]+: 90                   nop
--- a/gas/testsuite/gas/i386/x86-64-lfence-byte.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-byte.d
@@ -12,19 +12,19 @@ Disassembly of section .text:
  +[a-f0-9]+: f3 aa                 rep stos %al,%es:\(%rdi\)
  +[a-f0-9]+: 48 83 0c 24 00       orq    \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: f3 c3                 repz retq
- +[a-f0-9]+: f3 c3                 repz retq
- +[a-f0-9]+: f3 c3                 repz retq
+ +[a-f0-9]+: f3 c3                 repz ret *
+ +[a-f0-9]+: f3 c3                 repz ret *
+ +[a-f0-9]+: f3 c3                 repz ret *
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: ff d0                 callq  \*%rax
- +[a-f0-9]+: f3 c3                 repz retq
+ +[a-f0-9]+: ff d0                 call   \*%rax
+ +[a-f0-9]+: f3 c3                 repz ret *
  +[a-f0-9]+: 66 66 c3             data16 retw
- +[a-f0-9]+: f3 c3                 repz retq
+ +[a-f0-9]+: f3 c3                 repz ret *
  +[a-f0-9]+: 9b                   fwait
  +[a-f0-9]+: 48 83 0c 24 00       orq    \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: f3 c3                 repz retq
- +[a-f0-9]+: f3 c3                 repz retq
- +[a-f0-9]+: c3                   retq  
- +[a-f0-9]+: f3 ff d0             repz callq \*%rax
+ +[a-f0-9]+: f3 c3                 repz ret *
+ +[a-f0-9]+: f3 c3                 repz ret *
+ +[a-f0-9]+: c3                   ret *
+ +[a-f0-9]+: f3 ff d0             repz call \*%rax
 #pass
--- a/gas/testsuite/gas/i386/x86-64-lfence-indbr-a.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-indbr-a.d
@@ -11,11 +11,11 @@ Disassembly of section .text:
 
 0+ <_start>:
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: ff d2                 callq  \*%rdx
+ +[a-f0-9]+: ff d2                 call   \*%rdx
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: ff e2                 jmpq   \*%rdx
- +[a-f0-9]+: ff 12                 callq  \*\(%rdx\)
- +[a-f0-9]+: ff 22                 jmpq   \*\(%rdx\)
- +[a-f0-9]+: ff 14 25 00 00 00 00 callq  \*0x0
- +[a-f0-9]+: ff 24 25 00 00 00 00 jmpq   \*0x0
+ +[a-f0-9]+: ff e2                 jmp    \*%rdx
+ +[a-f0-9]+: ff 12                 call   \*\(%rdx\)
+ +[a-f0-9]+: ff 22                 jmp    \*\(%rdx\)
+ +[a-f0-9]+: ff 14 25 00 00 00 00 call   \*0x0
+ +[a-f0-9]+: ff 24 25 00 00 00 00 jmp    \*0x0
 #pass
--- a/gas/testsuite/gas/i386/x86-64-lfence-indbr-b.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-indbr-b.d
@@ -10,11 +10,11 @@ Disassembly of section .text:
 
 0+ <_start>:
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: ff d2                 callq  \*%rdx
+ +[a-f0-9]+: ff d2                 call   \*%rdx
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: ff e2                 jmpq   \*%rdx
- +[a-f0-9]+: ff 12                 callq  \*\(%rdx\)
- +[a-f0-9]+: ff 22                 jmpq   \*\(%rdx\)
- +[a-f0-9]+: ff 14 25 00 00 00 00 callq  \*0x0
- +[a-f0-9]+: ff 24 25 00 00 00 00 jmpq   \*0x0
+ +[a-f0-9]+: ff e2                 jmp    \*%rdx
+ +[a-f0-9]+: ff 12                 call   \*\(%rdx\)
+ +[a-f0-9]+: ff 22                 jmp    \*\(%rdx\)
+ +[a-f0-9]+: ff 14 25 00 00 00 00 call   \*0x0
+ +[a-f0-9]+: ff 24 25 00 00 00 00 jmp    \*0x0
 #pass
--- a/gas/testsuite/gas/i386/x86-64-lfence-indbr-c.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-indbr-c.d
@@ -10,10 +10,10 @@
 Disassembly of section .text:
 
 0+ <_start>:
- +[a-f0-9]+: ff d2                 callq  \*%rdx
- +[a-f0-9]+: ff e2                 jmpq   \*%rdx
- +[a-f0-9]+: ff 12                 callq  \*\(%rdx\)
- +[a-f0-9]+: ff 22                 jmpq   \*\(%rdx\)
- +[a-f0-9]+: ff 14 25 00 00 00 00 callq  \*0x0
- +[a-f0-9]+: ff 24 25 00 00 00 00 jmpq   \*0x0
+ +[a-f0-9]+: ff d2                 call   \*%rdx
+ +[a-f0-9]+: ff e2                 jmp    \*%rdx
+ +[a-f0-9]+: ff 12                 call   \*\(%rdx\)
+ +[a-f0-9]+: ff 22                 jmp    \*\(%rdx\)
+ +[a-f0-9]+: ff 14 25 00 00 00 00 call   \*0x0
+ +[a-f0-9]+: ff 24 25 00 00 00 00 jmp    \*0x0
 #pass
--- a/gas/testsuite/gas/i386/x86-64-lfence-load.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-load.d
@@ -33,9 +33,9 @@ Disassembly of section .text:
  +[a-f0-9]+: 0f 18 55 00           prefetcht1 0x0\(%rbp\)
  +[a-f0-9]+: 0f 18 5d 00           prefetcht2 0x0\(%rbp\)
  +[a-f0-9]+: 0f 0d 4d 00           prefetchw 0x0\(%rbp\)
- +[a-f0-9]+: 0f a1                 popq   %fs
+ +[a-f0-9]+: 0f a1                 pop    %fs
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 9d                   popfq  
+ +[a-f0-9]+: 9d                   popf *
  +[a-f0-9]+: 0f ae e8             lfence
  +[a-f0-9]+: d7                   xlat   %ds:\(%rbx\)
  +[a-f0-9]+: 0f ae e8             lfence
@@ -79,7 +79,7 @@ Disassembly of section .text:
  +[a-f0-9]+: 0f ae e8             lfence
  +[a-f0-9]+: 0f 0f 66 02 b0       pfcmpeq 0x2\(%rsi\),%mm4
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 8f 00                 popq   \(%rax\)
+ +[a-f0-9]+: 8f 00                 pop    \(%rax\)
  +[a-f0-9]+: 0f ae e8             lfence
  +[a-f0-9]+: 58                   pop    %rax
  +[a-f0-9]+: 0f ae e8             lfence
@@ -100,7 +100,7 @@ Disassembly of section .text:
  +[a-f0-9]+: f7 29                 imull  \(%rcx\)
  +[a-f0-9]+: 0f ae e8             lfence
  +[a-f0-9]+: 48 8d 04 40           lea    \(%rax,%rax,2\),%rax
- +[a-f0-9]+: c9                   leaveq
+ +[a-f0-9]+: c9                   leave *
  +[a-f0-9]+: 6e                   outsb  %ds:\(%rsi\),\(%dx\)
  +[a-f0-9]+: 0f ae e8             lfence
  +[a-f0-9]+: ac                   lods   %ds:\(%rsi\),%al
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-a.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-a.d
@@ -11,20 +11,20 @@ Disassembly of section .text:
 0+ <_start>:
  +[a-f0-9]+: 48 83 0c 24 00       orq    \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 c3                 data16 retq
+ +[a-f0-9]+: 66 c3                 data16 ret *
  +[a-f0-9]+: 48 83 0c 24 00       orq    \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 c2 14 00           data16 retq \$0x14
+ +[a-f0-9]+: 66 c2 14 00           data16 ret \$0x14
  +[a-f0-9]+: 48 83 0c 24 00       orq    \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
  +[a-f0-9]+: 48 83 0c 24 00       orq    \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: c2 1e 00             retq   \$0x1e
+ +[a-f0-9]+: c2 1e 00             ret    \$0x1e
  +[a-f0-9]+: 48 83 0c 24 00       orq    \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 48 c3             data16 rex.W retq
+ +[a-f0-9]+: 66 48 c3             data16 rex\.W ret *
  +[a-f0-9]+: 48 83 0c 24 00       orq    \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 48 c2 28 00       data16 rex.W retq \$0x28
+ +[a-f0-9]+: 66 48 c2 28 00       data16 rex\.W ret \$0x28
 #pass
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-b.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-b.d
@@ -12,25 +12,25 @@ Disassembly of section .text:
  +[a-f0-9]+: 48 f7 14 24           notq   \(%rsp\)
  +[a-f0-9]+: 48 f7 14 24           notq   \(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 c3                 data16 retq
+ +[a-f0-9]+: 66 c3                 data16 ret *
  +[a-f0-9]+: 48 f7 14 24           notq   \(%rsp\)
  +[a-f0-9]+: 48 f7 14 24           notq   \(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 c2 14 00           data16 retq \$0x14
+ +[a-f0-9]+: 66 c2 14 00           data16 ret \$0x14
  +[a-f0-9]+: 48 f7 14 24           notq   \(%rsp\)
  +[a-f0-9]+: 48 f7 14 24           notq   \(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
  +[a-f0-9]+: 48 f7 14 24           notq   \(%rsp\)
  +[a-f0-9]+: 48 f7 14 24           notq   \(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: c2 1e 00             retq   \$0x1e
+ +[a-f0-9]+: c2 1e 00             ret    \$0x1e
  +[a-f0-9]+: 48 f7 14 24           notq   \(%rsp\)
  +[a-f0-9]+: 48 f7 14 24           notq   \(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 48 c3             data16 rex.W retq
+ +[a-f0-9]+: 66 48 c3             data16 rex\.W ret *
  +[a-f0-9]+: 48 f7 14 24           notq   \(%rsp\)
  +[a-f0-9]+: 48 f7 14 24           notq   \(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 48 c2 28 00       data16 rex.W retq \$0x28
+ +[a-f0-9]+: 66 48 c2 28 00       data16 rex\.W ret \$0x28
 #pass
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-c.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-c.d
@@ -10,20 +10,20 @@ Disassembly of section .text:
 0+ <_start>:
  +[a-f0-9]+: 48 83 0c 24 00       orq    \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 c3                 data16 retq
+ +[a-f0-9]+: 66 c3                 data16 ret *
  +[a-f0-9]+: 48 83 0c 24 00       orq    \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 c2 14 00           data16 retq \$0x14
+ +[a-f0-9]+: 66 c2 14 00           data16 ret \$0x14
  +[a-f0-9]+: 48 83 0c 24 00       orq    \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
  +[a-f0-9]+: 48 83 0c 24 00       orq    \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: c2 1e 00             retq   \$0x1e
+ +[a-f0-9]+: c2 1e 00             ret    \$0x1e
  +[a-f0-9]+: 48 83 0c 24 00       orq    \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 48 c3             data16 rex.W retq
+ +[a-f0-9]+: 66 48 c3             data16 rex\.W ret *
  +[a-f0-9]+: 48 83 0c 24 00       orq    \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 48 c2 28 00       data16 rex.W retq \$0x28
+ +[a-f0-9]+: 66 48 c2 28 00       data16 rex\.W ret \$0x28
 #pass
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-d.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-d.d
@@ -11,20 +11,20 @@ Disassembly of section .text:
 0+ <_start>:
  +[a-f0-9]+: 48 c1 24 24 00       shlq   \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 c3                 data16 retq
+ +[a-f0-9]+: 66 c3                 data16 ret *
  +[a-f0-9]+: 48 c1 24 24 00       shlq   \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 c2 14 00           data16 retq \$0x14
+ +[a-f0-9]+: 66 c2 14 00           data16 ret \$0x14
  +[a-f0-9]+: 48 c1 24 24 00       shlq   \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
  +[a-f0-9]+: 48 c1 24 24 00       shlq   \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: c2 1e 00             retq   \$0x1e
+ +[a-f0-9]+: c2 1e 00             ret    \$0x1e
  +[a-f0-9]+: 48 c1 24 24 00       shlq   \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 48 c3             data16 rex.W retq
+ +[a-f0-9]+: 66 48 c3             data16 rex\.W ret *
  +[a-f0-9]+: 48 c1 24 24 00       shlq   \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 48 c2 28 00       data16 rex.W retq \$0x28
+ +[a-f0-9]+: 66 48 c2 28 00       data16 rex\.W ret \$0x28
 #pass
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-e.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-e.d
@@ -11,20 +11,20 @@ Disassembly of section .text:
 0+ <_start>:
  +[a-f0-9]+: 48 c1 24 24 00       shlq   \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 c3                 data16 retq
+ +[a-f0-9]+: 66 c3                 data16 ret *
  +[a-f0-9]+: 48 c1 24 24 00       shlq   \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 c2 14 00           data16 retq \$0x14
+ +[a-f0-9]+: 66 c2 14 00           data16 ret \$0x14
  +[a-f0-9]+: 48 c1 24 24 00       shlq   \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
  +[a-f0-9]+: 48 c1 24 24 00       shlq   \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: c2 1e 00             retq   \$0x1e
+ +[a-f0-9]+: c2 1e 00             ret    \$0x1e
  +[a-f0-9]+: 48 c1 24 24 00       shlq   \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 48 c3             data16 rex.W retq
+ +[a-f0-9]+: 66 48 c3             data16 rex\.W ret *
  +[a-f0-9]+: 48 c1 24 24 00       shlq   \$0x0,\(%rsp\)
  +[a-f0-9]+: 0f ae e8             lfence
- +[a-f0-9]+: 66 48 c2 28 00       data16 rex.W retq \$0x28
+ +[a-f0-9]+: 66 48 c2 28 00       data16 rex\.W ret \$0x28
 #pass
--- a/gas/testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.d
+++ b/gas/testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.d
@@ -9,19 +9,19 @@
 Disassembly of section .text:
 
 0+ <.*>:
-[ ]*[a-f0-9]+: f2 e8 0e 00 00 00     bnd callq 14 <foo>
-[ ]*[a-f0-9]+: f2 ff 10             bnd callq \*\(%rax\)
+[ ]*[a-f0-9]+: f2 e8 0e 00 00 00     bnd call 14 <foo>
+[ ]*[a-f0-9]+: f2 ff 10             bnd call \*\(%rax\)
 [ ]*[a-f0-9]+: f2 74 08             bnd je 14 <foo>
 [ ]*[a-f0-9]+: f2 eb 05             bnd jmp 14 <foo>
-[ ]*[a-f0-9]+: f2 ff 23             bnd jmpq \*\(%rbx\)
-[ ]*[a-f0-9]+: f2 c3                 bnd retq
+[ ]*[a-f0-9]+: f2 ff 23             bnd jmp \*\(%rbx\)
+[ ]*[a-f0-9]+: f2 c3                 bnd ret *
 
 0+14 <foo>:
-[ ]*[a-f0-9]+: f2 c3                 bnd retq
-[ ]*[a-f0-9]+: f2 c3                 bnd retq
-[ ]*[a-f0-9]+: f2 c3                 bnd retq
-[ ]*[a-f0-9]+: f2 c3                 bnd retq
-[ ]*[a-f0-9]+: f2 e8 f2 ff ff ff     bnd callq 14 <foo>
+[ ]*[a-f0-9]+: f2 c3                 bnd ret *
+[ ]*[a-f0-9]+: f2 c3                 bnd ret *
+[ ]*[a-f0-9]+: f2 c3                 bnd ret *
+[ ]*[a-f0-9]+: f2 c3                 bnd ret *
+[ ]*[a-f0-9]+: f2 e8 f2 ff ff ff     bnd call 14 <foo>
 [ ]*[a-f0-9]+: 48 01 c3             add    %rax,%rbx
 [ ]*[a-f0-9]+: e2 ed                 loop   14 <foo>
 #pass
--- a/gas/testsuite/gas/i386/x86-64-mpx-branch-1.d
+++ b/gas/testsuite/gas/i386/x86-64-mpx-branch-1.d
@@ -9,23 +9,23 @@
 Disassembly of section .text:
 
 0+ <foo1-0x1c>:
-[ ]*[a-f0-9]+: f2 e8 00 00 00 00     bnd callq 6 <foo1-0x16> 2: R_X86_64_PC32 \*ABS\*\+0x10003c
-[ ]*[a-f0-9]+: f2 e9 00 00 00 00     bnd jmpq c <foo1-0x10> 8: R_X86_64_PC32 \*ABS\*\+0x10003c
-[ ]*[a-f0-9]+: 66 f2 48 e8 00 00 00 00 data16 bnd callq 14 <foo1-0x8> 10: R_X86_64_PC32 \*ABS\*\+0x10003c
-[ ]*[a-f0-9]+: 66 f2 48 e9 00 00 00 00 data16 bnd jmpq 1c <foo1> 18: R_X86_64_PC32 \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00     bnd call 6 <foo1-0x16> 2: R_X86_64_PC32 \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00     bnd jmp c <foo1-0x10> 8: R_X86_64_PC32 \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: 66 f2 48 e8 00 00 00 00 data16 bnd rex\.W call 14 <foo1-0x8> 10: R_X86_64_PC32 \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: 66 f2 48 e9 00 00 00 00 data16 bnd rex\.W jmp 1c <foo1> 18: R_X86_64_PC32 \*ABS\*\+0x10003c
 
 0+1c <foo1>:
 [ ]*[a-f0-9]+: f2 eb fd             bnd jmp 1c <foo1>
 [ ]*[a-f0-9]+: f2 72 fa             bnd jb 1c <foo1>
-[ ]*[a-f0-9]+: f2 e8 f4 ff ff ff     bnd callq 1c <foo1>
+[ ]*[a-f0-9]+: f2 e8 f4 ff ff ff     bnd call 1c <foo1>
 [ ]*[a-f0-9]+: f2 eb 09             bnd jmp 34 <foo2>
 [ ]*[a-f0-9]+: f2 72 06             bnd jb 34 <foo2>
-[ ]*[a-f0-9]+: f2 e8 00 00 00 00     bnd callq 34 <foo2>
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00     bnd call 34 <foo2>
 
 0+34 <foo2>:
-[ ]*[a-f0-9]+: f2 e9 00 00 00 00     bnd jmpq 3a <foo2\+0x6> 36: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00     bnd jmp 3a <foo2\+0x6> 36: R_X86_64_PLT32 foo-0x4
 [ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 41 <foo2\+0xd> 3d: R_X86_64_PLT32 foo-0x4
-[ ]*[a-f0-9]+: f2 e8 00 00 00 00     bnd callq 47 <foo2\+0x13> 43: R_X86_64_PLT32 foo-0x4
-[ ]*[a-f0-9]+: f2 e9 00 00 00 00     bnd jmpq 4d <foo2\+0x19> 49: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00     bnd call 47 <foo2\+0x13> 43: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00     bnd jmp 4d <foo2\+0x19> 49: R_X86_64_PLT32 foo-0x4
 [ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 54 <foo2\+0x20> 50: R_X86_64_PLT32 foo-0x4
-[ ]*[a-f0-9]+: f2 e8 00 00 00 00     bnd callq 5a <foo2\+0x26> 56: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00     bnd call 5a <foo2\+0x26> 56: R_X86_64_PLT32 foo-0x4
--- a/gas/testsuite/gas/i386/x86-64-mpx.d
+++ b/gas/testsuite/gas/i386/x86-64-mpx.d
@@ -85,14 +85,14 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 0f 1a 14 1d 03 00 00 00 bndldx 0x3\(,%rbx,1\),%bnd2
 [ ]*[a-f0-9]+: 42 0f 1a 14 25 03 00 00 00 bndldx 0x3\(,%r12,1\),%bnd2
 [ ]*[a-f0-9]+: 0f 1a 0a             bndldx \(%rdx\),%bnd1
-[ ]*[a-f0-9]+: f2 e8 25 02 00 00     bnd callq 416 <foo>
-[ ]*[a-f0-9]+: f2 ff 10             bnd callq \*\(%rax\)
-[ ]*[a-f0-9]+: f2 41 ff 13           bnd callq \*\(%r11\)
+[ ]*[a-f0-9]+: f2 e8 25 02 00 00     bnd call 416 <foo>
+[ ]*[a-f0-9]+: f2 ff 10             bnd call \*\(%rax\)
+[ ]*[a-f0-9]+: f2 41 ff 13           bnd call \*\(%r11\)
 [ ]*[a-f0-9]+: f2 0f 84 17 02 00 00 bnd je 416 <foo>
-[ ]*[a-f0-9]+: f2 e9 11 02 00 00     bnd jmpq 416 <foo>
-[ ]*[a-f0-9]+: f2 ff 21             bnd jmpq \*\(%rcx\)
-[ ]*[a-f0-9]+: f2 41 ff 24 24       bnd jmpq \*\(%r12\)
-[ ]*[a-f0-9]+: f2 c3                 bnd retq
+[ ]*[a-f0-9]+: f2 e9 11 02 00 00     bnd jmp 416 <foo>
+[ ]*[a-f0-9]+: f2 ff 21             bnd jmp \*\(%rcx\)
+[ ]*[a-f0-9]+: f2 41 ff 24 24       bnd jmp \*\(%r12\)
+[ ]*[a-f0-9]+: f2 c3                 bnd ret *
 [ ]*[a-f0-9]+: f3 41 0f 1b 0b       bndmk  \(%r11\),%bnd1
 [ ]*[a-f0-9]+: f3 0f 1b 08           bndmk  \(%rax\),%bnd1
 [ ]*[a-f0-9]+: f3 0f 1b 0c 25 99 03 00 00 bndmk  0x399,%bnd1
@@ -171,17 +171,17 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 0f 1a 14 1d 03 00 00 00 bndldx 0x3\(,%rbx,1\),%bnd2
 [ ]*[a-f0-9]+: 42 0f 1a 14 25 03 00 00 00 bndldx 0x3\(,%r12,1\),%bnd2
 [ ]*[a-f0-9]+: 0f 1a 0a             bndldx \(%rdx\),%bnd1
-[ ]*[a-f0-9]+: f2 e8 16 00 00 00     bnd callq 416 <foo>
-[ ]*[a-f0-9]+: f2 ff d0             bnd callq \*%rax
-[ ]*[a-f0-9]+: f2 41 ff d3           bnd callq \*%r11
+[ ]*[a-f0-9]+: f2 e8 16 00 00 00     bnd call 416 <foo>
+[ ]*[a-f0-9]+: f2 ff d0             bnd call \*%rax
+[ ]*[a-f0-9]+: f2 41 ff d3           bnd call \*%r11
 [ ]*[a-f0-9]+: f2 74 0c             bnd je 416 <foo>
 [ ]*[a-f0-9]+: f2 eb 09             bnd jmp 416 <foo>
-[ ]*[a-f0-9]+: f2 ff e1             bnd jmpq \*%rcx
-[ ]*[a-f0-9]+: f2 41 ff e4           bnd jmpq \*%r12
-[ ]*[a-f0-9]+: f2 c3                 bnd retq
+[ ]*[a-f0-9]+: f2 ff e1             bnd jmp \*%rcx
+[ ]*[a-f0-9]+: f2 41 ff e4           bnd jmp \*%r12
+[ ]*[a-f0-9]+: f2 c3                 bnd ret *
 
 [a-f0-9]+ <foo>:
-[ ]*[a-f0-9]+: f2 c3                 bnd retq
+[ ]*[a-f0-9]+: f2 c3                 bnd ret *
 
 [a-f0-9]+ <bad>:
 [ ]*[a-f0-9]+: 0f 1a 30             bndldx \(%rax\),\(bad\)
--- a/gas/testsuite/gas/i386/x86-64-nop-3.d
+++ b/gas/testsuite/gas/i386/x86-64-nop-3.d
@@ -18,5 +18,5 @@ Disassembly of section .text:
 Disassembly of section .altinstr_replacement:
 
 0+ <.altinstr_replacement>:
- +[a-f0-9]+: e9 00 00 00 00       jmpq   5 <_start\+0x5> 1: R_X86_64_PLT32 foo-0x4
+ +[a-f0-9]+: e9 00 00 00 00       jmp    5 <_start\+0x5> 1: R_X86_64_PLT32 foo-0x4
 #pass
--- a/gas/testsuite/gas/i386/x86-64-nop-4.d
+++ b/gas/testsuite/gas/i386/x86-64-nop-4.d
@@ -21,5 +21,5 @@ Disassembly of section .altinstr_replace
  +[a-f0-9]+: 89 c0                 mov    %eax,%eax
  +[a-f0-9]+: 89 c0                 mov    %eax,%eax
  +[a-f0-9]+: 89 c0                 mov    %eax,%eax
- +[a-f0-9]+: e9 00 00 00 00       jmpq   b <_start\+0xb> 7: R_X86_64_PLT32 foo-0x4
+ +[a-f0-9]+: e9 00 00 00 00       jmp    b <_start\+0xb> 7: R_X86_64_PLT32 foo-0x4
 #pass
--- a/gas/testsuite/gas/i386/x86-64-nop-5.d
+++ b/gas/testsuite/gas/i386/x86-64-nop-5.d
@@ -24,5 +24,5 @@ Disassembly of section .altinstr_replace
  +[a-f0-9]+: 89 c0                 mov    %eax,%eax
  +[a-f0-9]+: 89 c0                 mov    %eax,%eax
  +[a-f0-9]+: 89 c0                 mov    %eax,%eax
- +[a-f0-9]+: e9 00 00 00 00       jmpq   d <_start\+0xd> 9: R_X86_64_PLT32 foo-0x4
+ +[a-f0-9]+: e9 00 00 00 00       jmp    d <_start\+0xd> 9: R_X86_64_PLT32 foo-0x4
 #pass
--- a/gas/testsuite/gas/i386/x86-64-nops-7.d
+++ b/gas/testsuite/gas/i386/x86-64-nops-7.d
@@ -9,7 +9,7 @@ Disassembly of section .text:
 
 0+ <_start>:
  +[a-f0-9]+: 31 c0                 xor    %eax,%eax
- +[a-f0-9]+: e9 f9 01 00 00       jmpq   200 <func1>
+ +[a-f0-9]+: e9 f9 01 00 00       jmp    200 <func1>
  +[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data16 nopw %cs:0x0\(%rax,%rax,1\)
  +[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data16 nopw %cs:0x0\(%rax,%rax,1\)
  +[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data16 nopw %cs:0x0\(%rax,%rax,1\)
@@ -59,7 +59,7 @@ Disassembly of section .text:
 
 0+200 <func1>:
  +[a-f0-9]+: 31 db                 xor    %ebx,%ebx
- +[a-f0-9]+: e9 f9 00 00 00       jmpq   300 <func2>
+ +[a-f0-9]+: e9 f9 00 00 00       jmp    300 <func2>
  +[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data16 nopw %cs:0x0\(%rax,%rax,1\)
  +[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data16 nopw %cs:0x0\(%rax,%rax,1\)
  +[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data16 nopw %cs:0x0\(%rax,%rax,1\)
--- a/gas/testsuite/gas/i386/x86-64-notrack.d
+++ b/gas/testsuite/gas/i386/x86-64-notrack.d
@@ -7,67 +7,67 @@
 Disassembly of section .text:
 
 0+ <_start>:
-[ ]*[a-f0-9]+: 3e ff d0             notrack callq \*%rax
-[ ]*[a-f0-9]+: 3e 41 ff d0           notrack callq \*%r8
-[ ]*[a-f0-9]+: 3e ff e0             notrack jmpq \*%rax
-[ ]*[a-f0-9]+: 3e 41 ff e0           notrack jmpq \*%r8
-[ ]*[a-f0-9]+: 3e ff 10             notrack callq \*\(%rax\)
-[ ]*[a-f0-9]+: 3e 41 ff 10           notrack callq \*\(%r8\)
-[ ]*[a-f0-9]+: 3e ff 20             notrack jmpq \*\(%rax\)
-[ ]*[a-f0-9]+: 3e 41 ff 20           notrack jmpq \*\(%r8\)
-[ ]*[a-f0-9]+: 3e 67 ff 10           notrack callq \*\(%eax\)
-[ ]*[a-f0-9]+: 3e 67 41 ff 10       notrack callq \*\(%r8d\)
-[ ]*[a-f0-9]+: 3e 67 ff 20           notrack jmpq \*\(%eax\)
-[ ]*[a-f0-9]+: 3e 67 41 ff 20       notrack jmpq \*\(%r8d\)
-[ ]*[a-f0-9]+: 3e f2 ff d0           notrack bnd callq \*%rax
-[ ]*[a-f0-9]+: 3e f2 41 ff d0       notrack bnd callq \*%r8
-[ ]*[a-f0-9]+: 3e f2 ff e0           notrack bnd jmpq \*%rax
-[ ]*[a-f0-9]+: 3e f2 41 ff e0       notrack bnd jmpq \*%r8
-[ ]*[a-f0-9]+: 3e f2 ff 10           notrack bnd callq \*\(%rax\)
-[ ]*[a-f0-9]+: 3e f2 41 ff 10       notrack bnd callq \*\(%r8\)
-[ ]*[a-f0-9]+: 3e f2 ff 20           notrack bnd jmpq \*\(%rax\)
-[ ]*[a-f0-9]+: 3e f2 41 ff 20       notrack bnd jmpq \*\(%r8\)
-[ ]*[a-f0-9]+: 3e 67 f2 ff 10       notrack bnd callq \*\(%eax\)
-[ ]*[a-f0-9]+: 3e 67 f2 41 ff 10     notrack bnd callq \*\(%r8d\)
-[ ]*[a-f0-9]+: 3e 67 f2 ff 20       notrack bnd jmpq \*\(%eax\)
-[ ]*[a-f0-9]+: 3e 67 f2 41 ff 20     notrack bnd jmpq \*\(%r8d\)
-[ ]*[a-f0-9]+: 3e f2 ff d0           notrack bnd callq \*%rax
-[ ]*[a-f0-9]+: 3e f2 41 ff d0       notrack bnd callq \*%r8
-[ ]*[a-f0-9]+: 3e f2 ff 10           notrack bnd callq \*\(%rax\)
-[ ]*[a-f0-9]+: 3e f2 41 ff 10       notrack bnd callq \*\(%r8\)
-[ ]*[a-f0-9]+: 3e 67 f2 ff 10       notrack bnd callq \*\(%eax\)
-[ ]*[a-f0-9]+: 3e 67 f2 41 ff 10     notrack bnd callq \*\(%r8d\)
-[ ]*[a-f0-9]+: 3e ff d0             notrack callq \*%rax
-[ ]*[a-f0-9]+: 3e 41 ff d0           notrack callq \*%r8
-[ ]*[a-f0-9]+: 3e ff e0             notrack jmpq \*%rax
-[ ]*[a-f0-9]+: 3e 41 ff e0           notrack jmpq \*%r8
-[ ]*[a-f0-9]+: 3e ff 10             notrack callq \*\(%rax\)
-[ ]*[a-f0-9]+: 3e 41 ff 10           notrack callq \*\(%r8\)
-[ ]*[a-f0-9]+: 3e ff 20             notrack jmpq \*\(%rax\)
-[ ]*[a-f0-9]+: 3e 41 ff 20           notrack jmpq \*\(%r8\)
-[ ]*[a-f0-9]+: 3e 67 ff 10           notrack callq \*\(%eax\)
-[ ]*[a-f0-9]+: 3e 67 41 ff 10       notrack callq \*\(%r8d\)
-[ ]*[a-f0-9]+: 3e 67 ff 20           notrack jmpq \*\(%eax\)
-[ ]*[a-f0-9]+: 3e 67 41 ff 20       notrack jmpq \*\(%r8d\)
-[ ]*[a-f0-9]+: 3e f2 ff d0           notrack bnd callq \*%rax
-[ ]*[a-f0-9]+: 3e f2 41 ff d0       notrack bnd callq \*%r8
-[ ]*[a-f0-9]+: 3e f2 ff e0           notrack bnd jmpq \*%rax
-[ ]*[a-f0-9]+: 3e f2 41 ff e0       notrack bnd jmpq \*%r8
-[ ]*[a-f0-9]+: 3e f2 ff 10           notrack bnd callq \*\(%rax\)
-[ ]*[a-f0-9]+: 3e f2 41 ff 10       notrack bnd callq \*\(%r8\)
-[ ]*[a-f0-9]+: 3e f2 ff 20           notrack bnd jmpq \*\(%rax\)
-[ ]*[a-f0-9]+: 3e f2 41 ff 20       notrack bnd jmpq \*\(%r8\)
-[ ]*[a-f0-9]+: 3e 67 f2 ff 10       notrack bnd callq \*\(%eax\)
-[ ]*[a-f0-9]+: 3e 67 f2 41 ff 10     notrack bnd callq \*\(%r8d\)
-[ ]*[a-f0-9]+: 3e 67 f2 ff 20       notrack bnd jmpq \*\(%eax\)
-[ ]*[a-f0-9]+: 3e 67 f2 41 ff 20     notrack bnd jmpq \*\(%r8d\)
-[ ]*[a-f0-9]+: 3e f2 ff d0           notrack bnd callq \*%rax
-[ ]*[a-f0-9]+: 3e f2 41 ff d0       notrack bnd callq \*%r8
-[ ]*[a-f0-9]+: 3e f2 ff 10           notrack bnd callq \*\(%rax\)
-[ ]*[a-f0-9]+: 3e f2 41 ff 10       notrack bnd callq \*\(%r8\)
-[ ]*[a-f0-9]+: 3e 67 f2 ff 10       notrack bnd callq \*\(%eax\)
-[ ]*[a-f0-9]+: 3e 67 f2 41 ff 10     notrack bnd callq \*\(%r8d\)
-[ ]*[a-f0-9]+: f2 3e ff d0           bnd notrack callq \*%rax
-[ ]*[a-f0-9]+: 3e 66 ff d0           ds callw \*%ax
-[ ]*[a-f0-9]+: 66 3e ff d0           ds callw \*%ax
+[ ]*[a-f0-9]+: 3e ff d0             notrack call \*%rax
+[ ]*[a-f0-9]+: 3e 41 ff d0           notrack call \*%r8
+[ ]*[a-f0-9]+: 3e ff e0             notrack jmp \*%rax
+[ ]*[a-f0-9]+: 3e 41 ff e0           notrack jmp \*%r8
+[ ]*[a-f0-9]+: 3e ff 10             notrack call \*\(%rax\)
+[ ]*[a-f0-9]+: 3e 41 ff 10           notrack call \*\(%r8\)
+[ ]*[a-f0-9]+: 3e ff 20             notrack jmp \*\(%rax\)
+[ ]*[a-f0-9]+: 3e 41 ff 20           notrack jmp \*\(%r8\)
+[ ]*[a-f0-9]+: 3e 67 ff 10           notrack call \*\(%eax\)
+[ ]*[a-f0-9]+: 3e 67 41 ff 10       notrack call \*\(%r8d\)
+[ ]*[a-f0-9]+: 3e 67 ff 20           notrack jmp \*\(%eax\)
+[ ]*[a-f0-9]+: 3e 67 41 ff 20       notrack jmp \*\(%r8d\)
+[ ]*[a-f0-9]+: 3e f2 ff d0           notrack bnd call \*%rax
+[ ]*[a-f0-9]+: 3e f2 41 ff d0       notrack bnd call \*%r8
+[ ]*[a-f0-9]+: 3e f2 ff e0           notrack bnd jmp \*%rax
+[ ]*[a-f0-9]+: 3e f2 41 ff e0       notrack bnd jmp \*%r8
+[ ]*[a-f0-9]+: 3e f2 ff 10           notrack bnd call \*\(%rax\)
+[ ]*[a-f0-9]+: 3e f2 41 ff 10       notrack bnd call \*\(%r8\)
+[ ]*[a-f0-9]+: 3e f2 ff 20           notrack bnd jmp \*\(%rax\)
+[ ]*[a-f0-9]+: 3e f2 41 ff 20       notrack bnd jmp \*\(%r8\)
+[ ]*[a-f0-9]+: 3e 67 f2 ff 10       notrack bnd call \*\(%eax\)
+[ ]*[a-f0-9]+: 3e 67 f2 41 ff 10     notrack bnd call \*\(%r8d\)
+[ ]*[a-f0-9]+: 3e 67 f2 ff 20       notrack bnd jmp \*\(%eax\)
+[ ]*[a-f0-9]+: 3e 67 f2 41 ff 20     notrack bnd jmp \*\(%r8d\)
+[ ]*[a-f0-9]+: 3e f2 ff d0           notrack bnd call \*%rax
+[ ]*[a-f0-9]+: 3e f2 41 ff d0       notrack bnd call \*%r8
+[ ]*[a-f0-9]+: 3e f2 ff 10           notrack bnd call \*\(%rax\)
+[ ]*[a-f0-9]+: 3e f2 41 ff 10       notrack bnd call \*\(%r8\)
+[ ]*[a-f0-9]+: 3e 67 f2 ff 10       notrack bnd call \*\(%eax\)
+[ ]*[a-f0-9]+: 3e 67 f2 41 ff 10     notrack bnd call \*\(%r8d\)
+[ ]*[a-f0-9]+: 3e ff d0             notrack call \*%rax
+[ ]*[a-f0-9]+: 3e 41 ff d0           notrack call \*%r8
+[ ]*[a-f0-9]+: 3e ff e0             notrack jmp \*%rax
+[ ]*[a-f0-9]+: 3e 41 ff e0           notrack jmp \*%r8
+[ ]*[a-f0-9]+: 3e ff 10             notrack call \*\(%rax\)
+[ ]*[a-f0-9]+: 3e 41 ff 10           notrack call \*\(%r8\)
+[ ]*[a-f0-9]+: 3e ff 20             notrack jmp \*\(%rax\)
+[ ]*[a-f0-9]+: 3e 41 ff 20           notrack jmp \*\(%r8\)
+[ ]*[a-f0-9]+: 3e 67 ff 10           notrack call \*\(%eax\)
+[ ]*[a-f0-9]+: 3e 67 41 ff 10       notrack call \*\(%r8d\)
+[ ]*[a-f0-9]+: 3e 67 ff 20           notrack jmp \*\(%eax\)
+[ ]*[a-f0-9]+: 3e 67 41 ff 20       notrack jmp \*\(%r8d\)
+[ ]*[a-f0-9]+: 3e f2 ff d0           notrack bnd call \*%rax
+[ ]*[a-f0-9]+: 3e f2 41 ff d0       notrack bnd call \*%r8
+[ ]*[a-f0-9]+: 3e f2 ff e0           notrack bnd jmp \*%rax
+[ ]*[a-f0-9]+: 3e f2 41 ff e0       notrack bnd jmp \*%r8
+[ ]*[a-f0-9]+: 3e f2 ff 10           notrack bnd call \*\(%rax\)
+[ ]*[a-f0-9]+: 3e f2 41 ff 10       notrack bnd call \*\(%r8\)
+[ ]*[a-f0-9]+: 3e f2 ff 20           notrack bnd jmp \*\(%rax\)
+[ ]*[a-f0-9]+: 3e f2 41 ff 20       notrack bnd jmp \*\(%r8\)
+[ ]*[a-f0-9]+: 3e 67 f2 ff 10       notrack bnd call \*\(%eax\)
+[ ]*[a-f0-9]+: 3e 67 f2 41 ff 10     notrack bnd call \*\(%r8d\)
+[ ]*[a-f0-9]+: 3e 67 f2 ff 20       notrack bnd jmp \*\(%eax\)
+[ ]*[a-f0-9]+: 3e 67 f2 41 ff 20     notrack bnd jmp \*\(%r8d\)
+[ ]*[a-f0-9]+: 3e f2 ff d0           notrack bnd call \*%rax
+[ ]*[a-f0-9]+: 3e f2 41 ff d0       notrack bnd call \*%r8
+[ ]*[a-f0-9]+: 3e f2 ff 10           notrack bnd call \*\(%rax\)
+[ ]*[a-f0-9]+: 3e f2 41 ff 10       notrack bnd call \*\(%r8\)
+[ ]*[a-f0-9]+: 3e 67 f2 ff 10       notrack bnd call \*\(%eax\)
+[ ]*[a-f0-9]+: 3e 67 f2 41 ff 10     notrack bnd call \*\(%r8d\)
+[ ]*[a-f0-9]+: f2 3e ff d0           bnd notrack call \*%rax
+[ ]*[a-f0-9]+: 3e 66 ff d0           ds call \*%ax
+[ ]*[a-f0-9]+: 66 3e ff d0           ds call \*%ax
 #pass
--- a/gas/testsuite/gas/i386/x86-64-opcode.d
+++ b/gas/testsuite/gas/i386/x86-64-opcode.d
@@ -7,13 +7,13 @@
 Disassembly of section .text:
 
 0+ <.text>:
-[ ]*[a-f0-9]+: 41 ff 10             callq  \*\(%r8\)
-[ ]*[a-f0-9]+: ff 10                 callq  \*\(%rax\)
-[ ]*[a-f0-9]+: 41 ff 10             callq  \*\(%r8\)
-[ ]*[a-f0-9]+: ff 10                 callq  \*\(%rax\)
+[ ]*[a-f0-9]+: 41 ff 10             call   \*\(%r8\)
+[ ]*[a-f0-9]+: ff 10                 call   \*\(%rax\)
+[ ]*[a-f0-9]+: 41 ff 10             call   \*\(%r8\)
+[ ]*[a-f0-9]+: ff 10                 call   \*\(%rax\)
 [ ]*[a-f0-9]+: cb                   lret  
 [ ]*[a-f0-9]+: 48 cb                 lretq *
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 [ ]*[a-f0-9]+: cf                   iret  
 [ ]*[a-f0-9]+: 66 cf                 iretw  
 [ ]*[a-f0-9]+: 48 cf                 iretq  
@@ -265,22 +265,22 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 0f 7f 00             movq   %mm0,\(%rax\)
 [ ]*[a-f0-9]+: 41 0f 7f 38           movq   %mm7,\(%r8\)
 [ ]*[a-f0-9]+: 0f 7f 38             movq   %mm7,\(%rax\)
-[ ]*[a-f0-9]+: 41 8f 00             popq   \(%r8\)
-[ ]*[a-f0-9]+: 8f 00                 popq   \(%rax\)
-[ ]*[a-f0-9]+: 0f a1                 popq   %fs
-[ ]*[a-f0-9]+: 0f a1                 popq   %fs
-[ ]*[a-f0-9]+: 0f a9                 popq   %gs
-[ ]*[a-f0-9]+: 0f a9                 popq   %gs
-[ ]*[a-f0-9]+: 9d                   popfq  
-[ ]*[a-f0-9]+: 9d                   popfq  
-[ ]*[a-f0-9]+: 41 ff 30             pushq  \(%r8\)
-[ ]*[a-f0-9]+: ff 30                 pushq  \(%rax\)
-[ ]*[a-f0-9]+: 0f a0                 pushq  %fs
-[ ]*[a-f0-9]+: 0f a0                 pushq  %fs
-[ ]*[a-f0-9]+: 0f a8                 pushq  %gs
-[ ]*[a-f0-9]+: 0f a8                 pushq  %gs
-[ ]*[a-f0-9]+: 9c                   pushfq
-[ ]*[a-f0-9]+: 9c                   pushfq
+[ ]*[a-f0-9]+: 41 8f 00             pop    \(%r8\)
+[ ]*[a-f0-9]+: 8f 00                 pop    \(%rax\)
+[ ]*[a-f0-9]+: 0f a1                 pop    %fs
+[ ]*[a-f0-9]+: 0f a1                 pop    %fs
+[ ]*[a-f0-9]+: 0f a9                 pop    %gs
+[ ]*[a-f0-9]+: 0f a9                 pop    %gs
+[ ]*[a-f0-9]+: 9d                   popf *
+[ ]*[a-f0-9]+: 9d                   popf *
+[ ]*[a-f0-9]+: 41 ff 30             push   \(%r8\)
+[ ]*[a-f0-9]+: ff 30                 push   \(%rax\)
+[ ]*[a-f0-9]+: 0f a0                 push   %fs
+[ ]*[a-f0-9]+: 0f a0                 push   %fs
+[ ]*[a-f0-9]+: 0f a8                 push   %gs
+[ ]*[a-f0-9]+: 0f a8                 push   %gs
+[ ]*[a-f0-9]+: 9c                   pushf *
+[ ]*[a-f0-9]+: 9c                   pushf *
 [ ]*[a-f0-9]+: 0f 77                 emms  
 [ ]*[a-f0-9]+: 0f 0e                 femms  
 [ ]*[a-f0-9]+: 0f 08                 invd  
--- a/gas/testsuite/gas/i386/x86-64-relax-2.d
+++ b/gas/testsuite/gas/i386/x86-64-relax-2.d
@@ -11,25 +11,25 @@ Disassembly of section .text:
 0+ <foo>:
 [ ]*[a-f0-9]+: eb 24                 jmp    26 <local>
 [ ]*[a-f0-9]+: eb 1e                 jmp    22 <hidden_def>
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   9 <foo\+0x9> 5: R_X86_64_PLT32 global_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   e <foo\+0xe> a: R_X86_64_PLT32 global_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   13 <foo\+0x13> f: R_X86_64_PLT32 weak_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   18 <foo\+0x18> 14: R_X86_64_PLT32 weak_hidden_undef-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   1d <foo\+0x1d> 19: R_X86_64_PLT32 weak_hidden_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   22 <hidden_def> 1e: R_X86_64_PLT32 hidden_undef-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    9 <foo\+0x9> 5: R_X86_64_PLT32 global_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    e <foo\+0xe> a: R_X86_64_PLT32 global_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    13 <foo\+0x13> f: R_X86_64_PLT32 weak_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    18 <foo\+0x18> 14: R_X86_64_PLT32 weak_hidden_undef-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    1d <foo\+0x1d> 19: R_X86_64_PLT32 weak_hidden_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    22 <hidden_def> 1e: R_X86_64_PLT32 hidden_undef-0x4
 
 0+22 <hidden_def>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+23 <weak_hidden_def>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+24 <global_def>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+25 <weak_def>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+26 <local>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/gas/testsuite/gas/i386/x86-64-relax-3.d
+++ b/gas/testsuite/gas/i386/x86-64-relax-3.d
@@ -11,24 +11,24 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: eb 21                 jmp    23 <local>
 [ ]*[a-f0-9]+: eb 1b                 jmp    1f <hidden_def>
 [ ]*[a-f0-9]+: eb 1b                 jmp    21 <global_def>
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   b <foo\+0xb> 7: R_X86_64_PLT32 global_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   10 <foo\+0x10> c: R_X86_64_PLT32 weak_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   15 <foo\+0x15> 11: R_X86_64_PLT32 weak_hidden_undef-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   1a <foo\+0x1a> 16: R_X86_64_PLT32 weak_hidden_def-0x4
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   1f <hidden_def> 1b: R_X86_64_PLT32 hidden_undef-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    b <foo\+0xb> 7: R_X86_64_PLT32 global_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    10 <foo\+0x10> c: R_X86_64_PLT32 weak_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    15 <foo\+0x15> 11: R_X86_64_PLT32 weak_hidden_undef-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    1a <foo\+0x1a> 16: R_X86_64_PLT32 weak_hidden_def-0x4
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    1f <hidden_def> 1b: R_X86_64_PLT32 hidden_undef-0x4
 
 0+1f <hidden_def>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+20 <weak_hidden_def>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+21 <global_def>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+22 <weak_def>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+23 <local>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/gas/testsuite/gas/i386/x86-64-relax-4.d
+++ b/gas/testsuite/gas/i386/x86-64-relax-4.d
@@ -7,11 +7,11 @@
 Disassembly of section .text:
 
 0+ <printk>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 Disassembly of section .init.text:
 
 0+ <foo>:
- +[a-f0-9]+: e8 00 00 00 00       callq  5 <foo\+0x5> 1: R_X86_64_PLT32 .text-0x4
+ +[a-f0-9]+: e8 00 00 00 00       call   5 <foo\+0x5> 1: R_X86_64_PLT32 .text-0x4
  +[a-f0-9]+: 48 8d 05 00 00 00 00 lea    0x0\(%rip\),%rax        # c <foo\+0xc> 8: R_X86_64_PC32 .text-0x4
 #pass
--- a/gas/testsuite/gas/i386/x86-64-rtm.d
+++ b/gas/testsuite/gas/i386/x86-64-rtm.d
@@ -8,12 +8,12 @@ Disassembly of section .text:
 
 0+ <foo>:
 [ ]*[a-f0-9]+: c6 f8 08             xabort \$0x8
-[ ]*[a-f0-9]+: c7 f8 fa ff ff ff     xbeginq 3 <foo\+0x3>
-[ ]*[a-f0-9]+: c7 f8 00 00 00 00     xbeginq f <foo\+0xf>
+[ ]*[a-f0-9]+: c7 f8 fa ff ff ff     xbegin 3 <foo\+0x3>
+[ ]*[a-f0-9]+: c7 f8 00 00 00 00     xbegin f <foo\+0xf>
 [ ]*[a-f0-9]+: 0f 01 d5             xend  
 [ ]*[a-f0-9]+: c6 f8 08             xabort \$0x8
-[ ]*[a-f0-9]+: c7 f8 fa ff ff ff     xbeginq 15 <foo\+0x15>
-[ ]*[a-f0-9]+: c7 f8 00 00 00 00     xbeginq 21 <foo\+0x21>
+[ ]*[a-f0-9]+: c7 f8 fa ff ff ff     xbegin 15 <foo\+0x15>
+[ ]*[a-f0-9]+: c7 f8 00 00 00 00     xbegin 21 <foo\+0x21>
 [ ]*[a-f0-9]+: 0f 01 d5             xend  
 [ ]*[a-f0-9]+: 0f 01 d6             xtest  
 #pass
--- a/gas/testsuite/gas/i386/x86-64-stack.d
+++ b/gas/testsuite/gas/i386/x86-64-stack.d
@@ -18,52 +18,52 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 8f c0             pop    %ax
 [ ]*[a-f0-9]+: 48 8f c0             rex.W pop %rax
 [ ]*[a-f0-9]+: 66 48 8f c0           data16 rex.W pop %rax
-[ ]*[a-f0-9]+: 8f 00                 popq   \(%rax\)
+[ ]*[a-f0-9]+: 8f 00                 pop    \(%rax\)
 [ ]*[a-f0-9]+: 66 8f 00             popw   \(%rax\)
-[ ]*[a-f0-9]+: 48 8f 00             rex.W popq \(%rax\)
-[ ]*[a-f0-9]+: 66 48 8f 00           data16 rex.W popq \(%rax\)
-[ ]*[a-f0-9]+: ff d0                 callq  \*%rax
-[ ]*[a-f0-9]+: 66 ff d0             callw  \*%ax
-[ ]*[a-f0-9]+: 48 ff d0             rex.W callq \*%rax
-[ ]*[a-f0-9]+: 66 48 ff d0           data16 rex.W callq \*%rax
-[ ]*[a-f0-9]+: ff 10                 callq  \*\(%rax\)
+[ ]*[a-f0-9]+: 48 8f 00             rex\.W pop \(%rax\)
+[ ]*[a-f0-9]+: 66 48 8f 00           data16 rex\.W pop \(%rax\)
+[ ]*[a-f0-9]+: ff d0                 call   \*%rax
+[ ]*[a-f0-9]+: 66 ff d0             call   \*%ax
+[ ]*[a-f0-9]+: 48 ff d0             rex\.W call \*%rax
+[ ]*[a-f0-9]+: 66 48 ff d0           data16 rex\.W call \*%rax
+[ ]*[a-f0-9]+: ff 10                 call   \*\(%rax\)
 [ ]*[a-f0-9]+: 66 ff 10             callw  \*\(%rax\)
-[ ]*[a-f0-9]+: 48 ff 10             rex.W callq \*\(%rax\)
-[ ]*[a-f0-9]+: 66 48 ff 10           data16 rex.W callq \*\(%rax\)
-[ ]*[a-f0-9]+: ff e0                 jmpq   \*%rax
-[ ]*[a-f0-9]+: 66 ff e0             jmpw   \*%ax
-[ ]*[a-f0-9]+: 48 ff e0             rex.W jmpq \*%rax
-[ ]*[a-f0-9]+: 66 48 ff e0           data16 rex.W jmpq \*%rax
-[ ]*[a-f0-9]+: ff 20                 jmpq   \*\(%rax\)
+[ ]*[a-f0-9]+: 48 ff 10             rex\.W call \*\(%rax\)
+[ ]*[a-f0-9]+: 66 48 ff 10           data16 rex\.W call \*\(%rax\)
+[ ]*[a-f0-9]+: ff e0                 jmp    \*%rax
+[ ]*[a-f0-9]+: 66 ff e0             jmp    \*%ax
+[ ]*[a-f0-9]+: 48 ff e0             rex\.W jmp \*%rax
+[ ]*[a-f0-9]+: 66 48 ff e0           data16 rex\.W jmp \*%rax
+[ ]*[a-f0-9]+: ff 20                 jmp    \*\(%rax\)
 [ ]*[a-f0-9]+: 66 ff 20             jmpw   \*\(%rax\)
-[ ]*[a-f0-9]+: 48 ff 20             rex.W jmpq \*\(%rax\)
-[ ]*[a-f0-9]+: 66 48 ff 20           data16 rex.W jmpq \*\(%rax\)
+[ ]*[a-f0-9]+: 48 ff 20             rex\.W jmp \*\(%rax\)
+[ ]*[a-f0-9]+: 66 48 ff 20           data16 rex\.W jmp \*\(%rax\)
 [ ]*[a-f0-9]+: ff f0                 push   %rax
 [ ]*[a-f0-9]+: 66 ff f0             push   %ax
 [ ]*[a-f0-9]+: 48 ff f0             rex.W push %rax
 [ ]*[a-f0-9]+: 66 48 ff f0           data16 rex.W push %rax
-[ ]*[a-f0-9]+: ff 30                 pushq  \(%rax\)
+[ ]*[a-f0-9]+: ff 30                 push   \(%rax\)
 [ ]*[a-f0-9]+: 66 ff 30             pushw  \(%rax\)
-[ ]*[a-f0-9]+: 48 ff 30             rex.W pushq \(%rax\)
-[ ]*[a-f0-9]+: 66 48 ff 30           data16 rex.W pushq \(%rax\)
-[ ]*[a-f0-9]+: 6a ff                 pushq  \$0xffffffffffffffff
+[ ]*[a-f0-9]+: 48 ff 30             rex\.W push \(%rax\)
+[ ]*[a-f0-9]+: 66 48 ff 30           data16 rex\.W push \(%rax\)
+[ ]*[a-f0-9]+: 6a ff                 push   \$0xffffffffffffffff
 [ ]*[a-f0-9]+: 66 6a ff             pushw  \$0xffff
-[ ]*[a-f0-9]+: 48 6a ff             rex.W pushq \$0xffffffffffffffff
-[ ]*[a-f0-9]+: 66 48 6a ff           data16 rex.W pushq \$0xffffffffffffffff
-[ ]*[a-f0-9]+: 68 01 02 03 04       pushq  \$0x4030201
+[ ]*[a-f0-9]+: 48 6a ff             rex\.W push \$0xffffffffffffffff
+[ ]*[a-f0-9]+: 66 48 6a ff           data16 rex\.W push \$0xffffffffffffffff
+[ ]*[a-f0-9]+: 68 01 02 03 04       push   \$0x4030201
 [ ]*[a-f0-9]+: 66 68 01 02           pushw  \$0x201
 [ ]*[a-f0-9]+: 03 04 48             add    \(%rax,%rcx,2\),%eax
-[ ]*[a-f0-9]+: 68 01 02 03 04       pushq  \$0x4030201
-[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data16 rex.W pushq \$0x4030201
-[ ]*[a-f0-9]+: 0f a8                 pushq  %gs
+[ ]*[a-f0-9]+: 68 01 02 03 04       push   \$0x4030201
+[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data16 rex\.W push \$0x4030201
+[ ]*[a-f0-9]+: 0f a8                 push   %gs
 [ ]*[a-f0-9]+: 66 0f a8             pushw  %gs
-[ ]*[a-f0-9]+: 48 0f a8             rex.W pushq %gs
-[ ]*[a-f0-9]+: 66 48 0f a8           data16 rex.W pushq %gs
-[ ]*[a-f0-9]+: 41 0f a8             rex.B pushq %gs
+[ ]*[a-f0-9]+: 48 0f a8             rex\.W push %gs
+[ ]*[a-f0-9]+: 66 48 0f a8           data16 rex\.W push %gs
+[ ]*[a-f0-9]+: 41 0f a8             rex.B push %gs
 [ ]*[a-f0-9]+: 66 41 0f a8           rex.B pushw %gs
 [ ]*[a-f0-9]+: 48                   rex.W
-[ ]*[a-f0-9]+: 41 0f a8             rex.B pushq %gs
+[ ]*[a-f0-9]+: 41 0f a8             rex.B push %gs
 [ ]*[a-f0-9]+: 66 48                 data16 rex.W
-[ ]*[a-f0-9]+: 41 0f a8             rex.B pushq %gs
+[ ]*[a-f0-9]+: 41 0f a8             rex.B push %gs
 [ ]*[a-f0-9]+: 90                   nop
 #pass
--- a/gas/testsuite/gas/i386/x86-64-unique.d
+++ b/gas/testsuite/gas/i386/x86-64-unique.d
@@ -8,26 +8,26 @@ Disassembly of section .text:
 
 0+ <foo>:
  +[a-f0-9]+: 89 c3                 mov    %eax,%ebx
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 Disassembly of section .text:
 
 0+ <bar>:
  +[a-f0-9]+: 31 c3                 xor    %eax,%ebx
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 Disassembly of section .text:
 
 0+ <foo1>:
  +[a-f0-9]+: 89 c3                 mov    %eax,%ebx
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 Disassembly of section .text:
 
 0+ <bar1>:
  +[a-f0-9]+: 01 c3                 add    %eax,%ebx
  +[a-f0-9]+: 90                   nop
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 Disassembly of section .text:
 
@@ -36,7 +36,7 @@ Disassembly of section .text:
  +[a-f0-9]+: 90                   nop
  +[a-f0-9]+: 90                   nop
  +[a-f0-9]+: 90                   nop
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 Disassembly of section .text:
 
@@ -44,5 +44,5 @@ Disassembly of section .text:
  +[a-f0-9]+: 31 c3                 xor    %eax,%ebx
  +[a-f0-9]+: 90                   nop
  +[a-f0-9]+: 90                   nop
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 #pass
--- a/gas/testsuite/gas/i386/x86_64-intel.d
+++ b/gas/testsuite/gas/i386/x86_64-intel.d
@@ -111,8 +111,8 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 ca 02 00           retfw  0x2
 [ ]*[a-f0-9]+: cb                   retf *
 [ ]*[a-f0-9]+: ca 04 00             retf   0x4
-[ ]*[a-f0-9]+: 48 cb                 rex\.W retf *
-[ ]*[a-f0-9]+: 48 ca 08 00           rex\.W retf 0x8
+[ ]*[a-f0-9]+: 48 cb                 retfq *
+[ ]*[a-f0-9]+: 48 ca 08 00           retfq  0x8
 
 [0-9a-f]+ <bar>:
 [ ]*[a-f0-9]+: b0 00                 mov    al,0x0
--- a/ld/testsuite/ld-i386/ibt-plt-1.d
+++ b/ld/testsuite/ld-i386/ibt-plt-1.d
@@ -8,7 +8,7 @@
 Disassembly of section .plt:
 
 [a-f0-9]+ <.plt>:
- +[a-f0-9]+: ff b3 04 00 00 00     pushl  0x4\(%ebx\)
+ +[a-f0-9]+: ff b3 04 00 00 00     push   0x4\(%ebx\)
  +[a-f0-9]+: ff a3 08 00 00 00     jmp    \*0x8\(%ebx\)
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%eax\)
  +[a-f0-9]+: f3 0f 1e fb           endbr32
--- a/ld/testsuite/ld-i386/ibt-plt-2a.d
+++ b/ld/testsuite/ld-i386/ibt-plt-2a.d
@@ -9,7 +9,7 @@
 Disassembly of section .plt:
 
 0+140 <.plt>:
- +[a-f0-9]+: ff b3 04 00 00 00     pushl  0x4\(%ebx\)
+ +[a-f0-9]+: ff b3 04 00 00 00     push   0x4\(%ebx\)
  +[a-f0-9]+: ff a3 08 00 00 00     jmp    \*0x8\(%ebx\)
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%eax\)
  +[a-f0-9]+: f3 0f 1e fb           endbr32
--- a/ld/testsuite/ld-i386/ibt-plt-2c.d
+++ b/ld/testsuite/ld-i386/ibt-plt-2c.d
@@ -9,7 +9,7 @@
 Disassembly of section .plt:
 
 [a-f0-9]+ <.plt>:
- +[a-f0-9]+: ff b3 04 00 00 00     pushl  0x4\(%ebx\)
+ +[a-f0-9]+: ff b3 04 00 00 00     push   0x4\(%ebx\)
  +[a-f0-9]+: ff a3 08 00 00 00     jmp    \*0x8\(%ebx\)
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%eax\)
  +[a-f0-9]+: f3 0f 1e fb           endbr32
--- a/ld/testsuite/ld-i386/ibt-plt-3a.d
+++ b/ld/testsuite/ld-i386/ibt-plt-3a.d
@@ -9,7 +9,7 @@
 Disassembly of section .plt:
 
 0+140 <.plt>:
- +[a-f0-9]+: ff b3 04 00 00 00     pushl  0x4\(%ebx\)
+ +[a-f0-9]+: ff b3 04 00 00 00     push   0x4\(%ebx\)
  +[a-f0-9]+: ff a3 08 00 00 00     jmp    \*0x8\(%ebx\)
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%eax\)
  +[a-f0-9]+: f3 0f 1e fb           endbr32
--- a/ld/testsuite/ld-i386/ibt-plt-3c.d
+++ b/ld/testsuite/ld-i386/ibt-plt-3c.d
@@ -9,7 +9,7 @@
 Disassembly of section .plt:
 
 0+140 <.plt>:
- +[a-f0-9]+: ff b3 04 00 00 00     pushl  0x4\(%ebx\)
+ +[a-f0-9]+: ff b3 04 00 00 00     push   0x4\(%ebx\)
  +[a-f0-9]+: ff a3 08 00 00 00     jmp    \*0x8\(%ebx\)
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%eax\)
  +[a-f0-9]+: f3 0f 1e fb           endbr32
--- a/ld/testsuite/ld-i386/plt-pic.pd
+++ b/ld/testsuite/ld-i386/plt-pic.pd
@@ -9,7 +9,7 @@
 Disassembly of section .plt:
 
 [0-9a-f]+ <.plt>:
- +[0-9a-f]+: ff b3 04 00 00 00     pushl  0x4\(%ebx\)
+ +[0-9a-f]+: ff b3 04 00 00 00     push   0x4\(%ebx\)
  +[0-9a-f]+: ff a3 08 00 00 00     jmp    \*0x8\(%ebx\)
 #...
 
--- a/ld/testsuite/ld-i386/plt-pic2.dd
+++ b/ld/testsuite/ld-i386/plt-pic2.dd
@@ -10,7 +10,7 @@
 Disassembly of section .plt:
 
 .* <.plt>:
- +[a-f0-9]+: ff b3 04 00 00 00     pushl  0x4\(%ebx\)
+ +[a-f0-9]+: ff b3 04 00 00 00     push   0x4\(%ebx\)
  +[a-f0-9]+: ff a3 08 00 00 00     jmp    \*0x8\(%ebx\)
  +[a-f0-9]+: 00 00                 add    %al,\(%eax\)
  ...
--- a/ld/testsuite/ld-i386/plt.pd
+++ b/ld/testsuite/ld-i386/plt.pd
@@ -9,7 +9,7 @@
 Disassembly of section .plt:
 
 [0-9a-f]+ <.plt>:
- +[0-9a-f]+: ff 35 ([0-9a-f]{2} ){4} * pushl  0x[0-9a-f]+
+ +[0-9a-f]+: ff 35 ([0-9a-f]{2} ){4} * push   0x[0-9a-f]+
  +[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmp    \*0x[0-9a-f]+
 #...
 
--- a/ld/testsuite/ld-i386/plt2.dd
+++ b/ld/testsuite/ld-i386/plt2.dd
@@ -10,7 +10,7 @@
 Disassembly of section .plt:
 
 0+8048160 <.plt>:
- +[a-f0-9]+: ff 35 40 92 04 08     pushl  0x8049240
+ +[a-f0-9]+: ff 35 40 92 04 08     push   0x8049240
  +[a-f0-9]+: ff 25 44 92 04 08     jmp    \*0x8049244
  +[a-f0-9]+: 00 00                 add    %al,\(%eax\)
  ...
--- a/ld/testsuite/ld-i386/pr19636-1d.d
+++ b/ld/testsuite/ld-i386/pr19636-1d.d
@@ -9,7 +9,7 @@
 Disassembly of section .plt:
 
 .* <.plt>:
-[ ]*[a-f0-9]+: ff b3 04 00 00 00     pushl  0x4\(%ebx\)
+[ ]*[a-f0-9]+: ff b3 04 00 00 00     push   0x4\(%ebx\)
 [ ]*[a-f0-9]+: ff a3 08 00 00 00     jmp    \*0x8\(%ebx\)
 [ ]*[a-f0-9]+: 00 00                 add    %al,\(%eax\)
 [ ]*[a-f0-9]+: 00 00                 add    %al,\(%eax\)
--- a/ld/testsuite/ld-i386/pr19636-1l.d
+++ b/ld/testsuite/ld-i386/pr19636-1l.d
@@ -10,7 +10,7 @@
 Disassembly of section .plt:
 
 .* <.plt>:
-[ ]*[a-f0-9]+: ff b3 04 00 00 00     pushl  0x4\(%ebx\)
+[ ]*[a-f0-9]+: ff b3 04 00 00 00     push   0x4\(%ebx\)
 [ ]*[a-f0-9]+: ff a3 08 00 00 00     jmp    \*0x8\(%ebx\)
 [ ]*[a-f0-9]+: 00 00                 add    %al,\(%eax\)
 [ ]*[a-f0-9]+: 00 00                 add    %al,\(%eax\)
--- a/ld/testsuite/ld-i386/pr19636-2c.d
+++ b/ld/testsuite/ld-i386/pr19636-2c.d
@@ -9,7 +9,7 @@
 Disassembly of section .plt:
 
 .* <.plt>:
-[ ]*[a-f0-9]+: ff b3 04 00 00 00     pushl  0x4\(%ebx\)
+[ ]*[a-f0-9]+: ff b3 04 00 00 00     push   0x4\(%ebx\)
 [ ]*[a-f0-9]+: ff a3 08 00 00 00     jmp    \*0x8\(%ebx\)
 [ ]*[a-f0-9]+: 00 00                 add    %al,\(%eax\)
 [ ]*[a-f0-9]+: 00 00                 add    %al,\(%eax\)
--- a/ld/testsuite/ld-i386/pr20830.d
+++ b/ld/testsuite/ld-i386/pr20830.d
@@ -41,7 +41,7 @@ Contents of the .eh_frame section:
 Disassembly of section .plt:
 
 0+110 <.plt>:
- +[a-f0-9]+: ff b3 04 00 00 00     pushl  0x4\(%ebx\)
+ +[a-f0-9]+: ff b3 04 00 00 00     push   0x4\(%ebx\)
  +[a-f0-9]+: ff a3 08 00 00 00     jmp    \*0x8\(%ebx\)
  +[a-f0-9]+: 00 00                 add    %al,\(%eax\)
  ...
--- a/ld/testsuite/ld-i386/vxworks1-lib.dd
+++ b/ld/testsuite/ld-i386/vxworks1-lib.dd
@@ -4,7 +4,7 @@
 Disassembly of section \.plt:
 
 00080800 <_PROCEDURE_LINKAGE_TABLE_>:
-   80800: ff b3 04 00 00 00     pushl  0x4\(%ebx\)
+   80800: ff b3 04 00 00 00     push   0x4\(%ebx\)
    80806: ff a3 08 00 00 00     jmp    \*0x8\(%ebx\)
    8080c: 90                   nop
    8080d: 90                   nop
--- a/ld/testsuite/ld-i386/vxworks1.dd
+++ b/ld/testsuite/ld-i386/vxworks1.dd
@@ -4,7 +4,7 @@
 Disassembly of section \.plt:
 
 00080800 <_PROCEDURE_LINKAGE_TABLE_>:
-   80800: ff 35 04 14 08 00     pushl  0x81404
+   80800: ff 35 04 14 08 00     push   0x81404
  80802: R_386_32 _GLOBAL_OFFSET_TABLE_
    80806: ff 25 08 14 08 00     jmp    \*0x81408
  80808: R_386_32 _GLOBAL_OFFSET_TABLE_
--- a/ld/testsuite/ld-ifunc/ifunc-2-i386-now.d
+++ b/ld/testsuite/ld-ifunc/ifunc-2-i386-now.d
@@ -11,7 +11,7 @@
 Disassembly of section .plt:
 
 0+f0 <.plt>:
- +[a-f0-9]+: ff b3 04 00 00 00     pushl  0x4\(%ebx\)
+ +[a-f0-9]+: ff b3 04 00 00 00     push   0x4\(%ebx\)
  +[a-f0-9]+: ff a3 08 00 00 00     jmp    \*0x8\(%ebx\)
  +[a-f0-9]+: 00 00                 add    %al,\(%eax\)
  ...
--- a/ld/testsuite/ld-ifunc/ifunc-2-local-i386-now.d
+++ b/ld/testsuite/ld-ifunc/ifunc-2-local-i386-now.d
@@ -11,7 +11,7 @@
 Disassembly of section .plt:
 
 0+e0 <.plt>:
- +[a-f0-9]+: ff b3 04 00 00 00     pushl  0x4\(%ebx\)
+ +[a-f0-9]+: ff b3 04 00 00 00     push   0x4\(%ebx\)
  +[a-f0-9]+: ff a3 08 00 00 00     jmp    \*0x8\(%ebx\)
  +[a-f0-9]+: 00 00                 add    %al,\(%eax\)
  ...
--- a/ld/testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d
+++ b/ld/testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d
@@ -10,22 +10,22 @@
 Disassembly of section .plt:
 
 0+170 <.plt>:
- +[a-f0-9]+: ff 35 42 01 20 00     pushq  0x200142\(%rip\)        # 2002b8 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 44 01 20 00     jmpq   \*0x200144\(%rip\)        # 2002c0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 42 01 20 00     push   0x200142\(%rip\)        # 2002b8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 44 01 20 00     jmp    \*0x200144\(%rip\)        # 2002c0 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
 
 0+180 <\*ABS\*\+0x190@plt>:
- +[a-f0-9]+: ff 25 42 01 20 00     jmpq   \*0x200142\(%rip\)        # 2002c8 <_GLOBAL_OFFSET_TABLE_\+0x18>
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: e9 e0 ff ff ff       jmpq   170 <.plt>
+ +[a-f0-9]+: ff 25 42 01 20 00     jmp    \*0x200142\(%rip\)        # 2002c8 <_GLOBAL_OFFSET_TABLE_\+0x18>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: e9 e0 ff ff ff       jmp    170 <.plt>
 
 Disassembly of section .text:
 
 0+190 <foo>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 0+191 <bar>:
- +[a-f0-9]+: e8 ea ff ff ff       callq  180 <\*ABS\*\+0x190@plt>
+ +[a-f0-9]+: e8 ea ff ff ff       call   180 <\*ABS\*\+0x190@plt>
  +[a-f0-9]+: 48 8d 05 e3 ff ff ff lea    -0x1d\(%rip\),%rax        # 180 <\*ABS\*\+0x190@plt>
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-ifunc/ifunc-2-x86-64-now.d
+++ b/ld/testsuite/ld-ifunc/ifunc-2-x86-64-now.d
@@ -10,22 +10,22 @@
 Disassembly of section .plt:
 
 0+170 <.plt>:
- +[a-f0-9]+: ff 35 42 01 20 00     pushq  0x200142\(%rip\)        # 2002b8 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 44 01 20 00     jmpq   \*0x200144\(%rip\)        # 2002c0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 42 01 20 00     push   0x200142\(%rip\)        # 2002b8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 44 01 20 00     jmp    \*0x200144\(%rip\)        # 2002c0 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
 
 0+180 <\*ABS\*\+0x190@plt>:
- +[a-f0-9]+: ff 25 42 01 20 00     jmpq   \*0x200142\(%rip\)        # 2002c8 <_GLOBAL_OFFSET_TABLE_\+0x18>
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: e9 e0 ff ff ff       jmpq   170 <.plt>
+ +[a-f0-9]+: ff 25 42 01 20 00     jmp    \*0x200142\(%rip\)        # 2002c8 <_GLOBAL_OFFSET_TABLE_\+0x18>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: e9 e0 ff ff ff       jmp    170 <.plt>
 
 Disassembly of section .text:
 
 0+190 <foo>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 0+191 <bar>:
- +[a-f0-9]+: e8 ea ff ff ff       callq  180 <\*ABS\*\+0x190@plt>
+ +[a-f0-9]+: e8 ea ff ff ff       call   180 <\*ABS\*\+0x190@plt>
  +[a-f0-9]+: 48 8d 05 e3 ff ff ff lea    -0x1d\(%rip\),%rax        # 180 <\*ABS\*\+0x190@plt>
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d
+++ b/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d
@@ -9,16 +9,16 @@
 Disassembly of section .text:
 
 0+4000c8 <__start>:
- +[a-f0-9]+: ff 15 2a 00 20 00     callq  \*0x20002a\(%rip\)        # 6000f8 <.got>
- +[a-f0-9]+: ff 25 24 00 20 00     jmpq   \*0x200024\(%rip\)        # 6000f8 <.got>
+ +[a-f0-9]+: ff 15 2a 00 20 00     call   \*0x20002a\(%rip\)        # 6000f8 <.got>
+ +[a-f0-9]+: ff 25 24 00 20 00     jmp    \*0x200024\(%rip\)        # 6000f8 <.got>
  +[a-f0-9]+: 48 03 05 1d 00 20 00 add    0x20001d\(%rip\),%rax        # 6000f8 <.got>
  +[a-f0-9]+: 48 8b 05 16 00 20 00 mov    0x200016\(%rip\),%rax        # 6000f8 <.got>
  +[a-f0-9]+: 48 85 05 0f 00 20 00 test   %rax,0x20000f\(%rip\)        # 6000f8 <.got>
  +[a-f0-9]+: 48 c7 c0 f1 00 40 00 mov    \$0x4000f1,%rax
 
 0+4000f0 <foo>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 0+4000f1 <bar>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d
+++ b/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d
@@ -9,16 +9,16 @@
 Disassembly of section .text:
 
 0+4000c8 <__start>:
- +[a-f0-9]+: ff 15 2a 00 20 00     callq  \*0x20002a\(%rip\)        # 6000f8 <.got>
- +[a-f0-9]+: ff 25 24 00 20 00     jmpq   \*0x200024\(%rip\)        # 6000f8 <.got>
+ +[a-f0-9]+: ff 15 2a 00 20 00     call   \*0x20002a\(%rip\)        # 6000f8 <.got>
+ +[a-f0-9]+: ff 25 24 00 20 00     jmp    \*0x200024\(%rip\)        # 6000f8 <.got>
  +[a-f0-9]+: 48 03 05 1d 00 20 00 add    0x20001d\(%rip\),%rax        # 6000f8 <.got>
  +[a-f0-9]+: 48 8b 05 16 00 20 00 mov    0x200016\(%rip\),%rax        # 6000f8 <.got>
  +[a-f0-9]+: 48 85 05 0f 00 20 00 test   %rax,0x20000f\(%rip\)        # 6000f8 <.got>
  +[a-f0-9]+: 48 c7 c0 f1 00 40 00 mov    \$0x4000f1,%rax
 
 0+4000f0 <foo>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 0+4000f1 <bar>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-ifunc/pr17154-i386-now.d
+++ b/ld/testsuite/ld-ifunc/pr17154-i386-now.d
@@ -11,7 +11,7 @@
 Disassembly of section .plt:
 
 0+180 <.plt>:
- +[a-f0-9]+: ff b3 04 00 00 00     pushl  0x4\(%ebx\)
+ +[a-f0-9]+: ff b3 04 00 00 00     push   0x4\(%ebx\)
  +[a-f0-9]+: ff a3 08 00 00 00     jmp    \*0x8\(%ebx\)
  +[a-f0-9]+: 00 00                 add    %al,\(%eax\)
  ...
--- a/ld/testsuite/ld-ifunc/pr17154-i386.d
+++ b/ld/testsuite/ld-ifunc/pr17154-i386.d
@@ -7,7 +7,7 @@
 
 #...
 0+180 <.*>:
-[ ]*[a-f0-9]+: ff b3 04 00 00 00     pushl  0x4\(%ebx\)
+[ ]*[a-f0-9]+: ff b3 04 00 00 00     push   0x4\(%ebx\)
 [ ]*[a-f0-9]+: ff a3 08 00 00 00     jmp    \*0x8\(%ebx\)
 [ ]*[a-f0-9]+: 00 00                 add    %al,\(%eax\)
  ...
--- a/ld/testsuite/ld-ifunc/pr17154-x86-64-now.d
+++ b/ld/testsuite/ld-ifunc/pr17154-x86-64-now.d
@@ -10,41 +10,41 @@
 Disassembly of section .plt:
 
 0+240 <.plt>:
- +[a-f0-9]+: ff 35 7a 01 20 00     pushq  0x20017a\(%rip\)        # 2003c0 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 7c 01 20 00     jmpq   \*0x20017c\(%rip\)        # 2003c8 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 7a 01 20 00     push   0x20017a\(%rip\)        # 2003c0 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 7c 01 20 00     jmp    \*0x20017c\(%rip\)        # 2003c8 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
 
 0+250 <\*ABS\*\+0x29a@plt>:
- +[a-f0-9]+: ff 25 7a 01 20 00     jmpq   \*0x20017a\(%rip\)        # 2003d0 <_GLOBAL_OFFSET_TABLE_\+0x18>
- +[a-f0-9]+: 68 03 00 00 00       pushq  \$0x3
- +[a-f0-9]+: e9 e0 ff ff ff       jmpq   240 <.plt>
+ +[a-f0-9]+: ff 25 7a 01 20 00     jmp    \*0x20017a\(%rip\)        # 2003d0 <_GLOBAL_OFFSET_TABLE_\+0x18>
+ +[a-f0-9]+: 68 03 00 00 00       push   \$0x3
+ +[a-f0-9]+: e9 e0 ff ff ff       jmp    240 <.plt>
 
 0+260 <func1@plt>:
- +[a-f0-9]+: ff 25 72 01 20 00     jmpq   \*0x200172\(%rip\)        # 2003d8 <func1>
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: e9 d0 ff ff ff       jmpq   240 <.plt>
+ +[a-f0-9]+: ff 25 72 01 20 00     jmp    \*0x200172\(%rip\)        # 2003d8 <func1>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: e9 d0 ff ff ff       jmp    240 <.plt>
 
 0+270 <func2@plt>:
- +[a-f0-9]+: ff 25 6a 01 20 00     jmpq   \*0x20016a\(%rip\)        # 2003e0 <func2>
- +[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
- +[a-f0-9]+: e9 c0 ff ff ff       jmpq   240 <.plt>
+ +[a-f0-9]+: ff 25 6a 01 20 00     jmp    \*0x20016a\(%rip\)        # 2003e0 <func2>
+ +[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+ +[a-f0-9]+: e9 c0 ff ff ff       jmp    240 <.plt>
 
 0+280 <\*ABS\*\+0x290@plt>:
- +[a-f0-9]+: ff 25 62 01 20 00     jmpq   \*0x200162\(%rip\)        # 2003e8 <_GLOBAL_OFFSET_TABLE_\+0x30>
- +[a-f0-9]+: 68 02 00 00 00       pushq  \$0x2
- +[a-f0-9]+: e9 b0 ff ff ff       jmpq   240 <.plt>
+ +[a-f0-9]+: ff 25 62 01 20 00     jmp    \*0x200162\(%rip\)        # 2003e8 <_GLOBAL_OFFSET_TABLE_\+0x30>
+ +[a-f0-9]+: 68 02 00 00 00       push   \$0x2
+ +[a-f0-9]+: e9 b0 ff ff ff       jmp    240 <.plt>
 
 Disassembly of section .text:
 
 0+290 <resolve1>:
- +[a-f0-9]+: e8 cb ff ff ff       callq  260 <func1@plt>
+ +[a-f0-9]+: e8 cb ff ff ff       call   260 <func1@plt>
 
 0+295 <g1>:
- +[a-f0-9]+: e9 e6 ff ff ff       jmpq   280 <\*ABS\*\+0x290@plt>
+ +[a-f0-9]+: e9 e6 ff ff ff       jmp    280 <\*ABS\*\+0x290@plt>
 
 0+29a <resolve2>:
- +[a-f0-9]+: e8 d1 ff ff ff       callq  270 <func2@plt>
+ +[a-f0-9]+: e8 d1 ff ff ff       call   270 <func2@plt>
 
 0+29f <g2>:
- +[a-f0-9]+: e9 ac ff ff ff       jmpq   250 <\*ABS\*\+0x29a@plt>
+ +[a-f0-9]+: e9 ac ff ff ff       jmp    250 <\*ABS\*\+0x29a@plt>
 #pass
--- a/ld/testsuite/ld-ifunc/pr17154-x86-64.d
+++ b/ld/testsuite/ld-ifunc/pr17154-x86-64.d
@@ -6,41 +6,41 @@
 
 #...
 0+240 <.*>:
- +[a-f0-9]+: ff 35 5a 01 20 00     pushq  0x20015a\(%rip\)        # 2003a0 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 5c 01 20 00     jmpq   \*0x20015c\(%rip\)        # 2003a8 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 5a 01 20 00     push   0x20015a\(%rip\)        # 2003a0 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 5c 01 20 00     jmp    \*0x20015c\(%rip\)        # 2003a8 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
 
 0+250 <\*ABS\*\+0x29a@plt>:
- +[a-f0-9]+: ff 25 5a 01 20 00     jmpq   \*0x20015a\(%rip\)        # 2003b0 <_GLOBAL_OFFSET_TABLE_\+0x18>
- +[a-f0-9]+: 68 03 00 00 00       pushq  \$0x3
- +[a-f0-9]+: e9 e0 ff ff ff       jmpq   240 <.plt>
+ +[a-f0-9]+: ff 25 5a 01 20 00     jmp    \*0x20015a\(%rip\)        # 2003b0 <_GLOBAL_OFFSET_TABLE_\+0x18>
+ +[a-f0-9]+: 68 03 00 00 00       push   \$0x3
+ +[a-f0-9]+: e9 e0 ff ff ff       jmp    240 <.plt>
 
 0+260 <func1@plt>:
- +[a-f0-9]+: ff 25 52 01 20 00     jmpq   \*0x200152\(%rip\)        # 2003b8 <func1>
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: e9 d0 ff ff ff       jmpq   240 <.plt>
+ +[a-f0-9]+: ff 25 52 01 20 00     jmp    \*0x200152\(%rip\)        # 2003b8 <func1>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: e9 d0 ff ff ff       jmp    240 <.plt>
 
 0+270 <func2@plt>:
- +[a-f0-9]+: ff 25 4a 01 20 00     jmpq   \*0x20014a\(%rip\)        # 2003c0 <func2>
- +[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
- +[a-f0-9]+: e9 c0 ff ff ff       jmpq   240 <.plt>
+ +[a-f0-9]+: ff 25 4a 01 20 00     jmp    \*0x20014a\(%rip\)        # 2003c0 <func2>
+ +[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+ +[a-f0-9]+: e9 c0 ff ff ff       jmp    240 <.plt>
 
 0+280 <\*ABS\*\+0x290@plt>:
- +[a-f0-9]+: ff 25 42 01 20 00     jmpq   \*0x200142\(%rip\)        # 2003c8 <_GLOBAL_OFFSET_TABLE_\+0x30>
- +[a-f0-9]+: 68 02 00 00 00       pushq  \$0x2
- +[a-f0-9]+: e9 b0 ff ff ff       jmpq   240 <.plt>
+ +[a-f0-9]+: ff 25 42 01 20 00     jmp    \*0x200142\(%rip\)        # 2003c8 <_GLOBAL_OFFSET_TABLE_\+0x30>
+ +[a-f0-9]+: 68 02 00 00 00       push   \$0x2
+ +[a-f0-9]+: e9 b0 ff ff ff       jmp    240 <.plt>
 
 Disassembly of section .text:
 
 0+290 <resolve1>:
- +[a-f0-9]+: e8 cb ff ff ff       callq  260 <func1@plt>
+ +[a-f0-9]+: e8 cb ff ff ff       call   260 <func1@plt>
 
 0+295 <g1>:
- +[a-f0-9]+: e9 e6 ff ff ff       jmpq   280 <\*ABS\*\+0x290@plt>
+ +[a-f0-9]+: e9 e6 ff ff ff       jmp    280 <\*ABS\*\+0x290@plt>
 
 0+29a <resolve2>:
- +[a-f0-9]+: e8 d1 ff ff ff       callq  270 <func2@plt>
+ +[a-f0-9]+: e8 d1 ff ff ff       call   270 <func2@plt>
 
 0+29f <g2>:
- +[a-f0-9]+: e9 ac ff ff ff       jmpq   250 <\*ABS\*\+0x29a@plt>
+ +[a-f0-9]+: e9 ac ff ff ff       jmp    250 <\*ABS\*\+0x29a@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/align-branch-1.d
+++ b/ld/testsuite/ld-x86-64/align-branch-1.d
@@ -16,5 +16,5 @@ Disassembly of section .text:
  +[a-f0-9]+: 2e 2e 2e 2e 48 8b 98 fc ff ff ff cs cs cs mov %cs:-0x4\(%rax\),%rbx
  +[a-f0-9]+: 48 85 db             test   %rbx,%rbx
  +[a-f0-9]+: 74 00                 je     [a-f0-9]+ <_start\+0x25>
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/bnd-branch-1-now.d
+++ b/ld/testsuite/ld-x86-64/bnd-branch-1-now.d
@@ -9,37 +9,37 @@
 Disassembly of section .plt:
 
 0+230 <.plt>:
- +[a-f0-9]+: ff 35 82 01 20 00     pushq  0x200182\(%rip\)        # 2003b8 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 84 01 20 00     jmpq   \*0x200184\(%rip\)        # 2003c0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 82 01 20 00     push   0x200182\(%rip\)        # 2003b8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 84 01 20 00     jmp    \*0x200184\(%rip\)        # 2003c0 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
 
 0+240 <foo2@plt>:
- +[a-f0-9]+: ff 25 82 01 20 00     jmpq   \*0x200182\(%rip\)        # 2003c8 <foo2>
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: e9 e0 ff ff ff       jmpq   230 <.plt>
+ +[a-f0-9]+: ff 25 82 01 20 00     jmp    \*0x200182\(%rip\)        # 2003c8 <foo2>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: e9 e0 ff ff ff       jmp    230 <.plt>
 
 0+250 <foo3@plt>:
- +[a-f0-9]+: ff 25 7a 01 20 00     jmpq   \*0x20017a\(%rip\)        # 2003d0 <foo3>
- +[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
- +[a-f0-9]+: e9 d0 ff ff ff       jmpq   230 <.plt>
+ +[a-f0-9]+: ff 25 7a 01 20 00     jmp    \*0x20017a\(%rip\)        # 2003d0 <foo3>
+ +[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+ +[a-f0-9]+: e9 d0 ff ff ff       jmp    230 <.plt>
 
 0+260 <foo1@plt>:
- +[a-f0-9]+: ff 25 72 01 20 00     jmpq   \*0x200172\(%rip\)        # 2003d8 <foo1>
- +[a-f0-9]+: 68 02 00 00 00       pushq  \$0x2
- +[a-f0-9]+: e9 c0 ff ff ff       jmpq   230 <.plt>
+ +[a-f0-9]+: ff 25 72 01 20 00     jmp    \*0x200172\(%rip\)        # 2003d8 <foo1>
+ +[a-f0-9]+: 68 02 00 00 00       push   \$0x2
+ +[a-f0-9]+: e9 c0 ff ff ff       jmp    230 <.plt>
 
 0+270 <foo4@plt>:
- +[a-f0-9]+: ff 25 6a 01 20 00     jmpq   \*0x20016a\(%rip\)        # 2003e0 <foo4>
- +[a-f0-9]+: 68 03 00 00 00       pushq  \$0x3
- +[a-f0-9]+: e9 b0 ff ff ff       jmpq   230 <.plt>
+ +[a-f0-9]+: ff 25 6a 01 20 00     jmp    \*0x20016a\(%rip\)        # 2003e0 <foo4>
+ +[a-f0-9]+: 68 03 00 00 00       push   \$0x3
+ +[a-f0-9]+: e9 b0 ff ff ff       jmp    230 <.plt>
 
 Disassembly of section .text:
 
 0+280 <_start>:
- +[a-f0-9]+: f2 e9 da ff ff ff     bnd jmpq 260 <foo1@plt>
- +[a-f0-9]+: e8 b5 ff ff ff       callq  240 <foo2@plt>
- +[a-f0-9]+: e9 c0 ff ff ff       jmpq   250 <foo3@plt>
- +[a-f0-9]+: e8 db ff ff ff       callq  270 <foo4@plt>
- +[a-f0-9]+: f2 e8 b5 ff ff ff     bnd callq 250 <foo3@plt>
- +[a-f0-9]+: e9 d0 ff ff ff       jmpq   270 <foo4@plt>
+ +[a-f0-9]+: f2 e9 da ff ff ff     bnd jmp 260 <foo1@plt>
+ +[a-f0-9]+: e8 b5 ff ff ff       call   240 <foo2@plt>
+ +[a-f0-9]+: e9 c0 ff ff ff       jmp    250 <foo3@plt>
+ +[a-f0-9]+: e8 db ff ff ff       call   270 <foo4@plt>
+ +[a-f0-9]+: f2 e8 b5 ff ff ff     bnd call 250 <foo3@plt>
+ +[a-f0-9]+: e9 d0 ff ff ff       jmp    270 <foo4@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/bnd-branch-1.d
+++ b/ld/testsuite/ld-x86-64/bnd-branch-1.d
@@ -10,10 +10,10 @@ Disassembly of section .text:
 
 #...
 [a-f0-9]+ <_start>:
-[ ]*[a-f0-9]+: f2 e9 [a-f0-9]+ ff ff ff     bnd jmpq [a-f0-9]+ <foo1@plt>
-[ ]*[a-f0-9]+: e8 [a-f0-9]+ ff ff ff       callq  [a-f0-9]+ <foo2@plt>
-[ ]*[a-f0-9]+: e9 [a-f0-9]+ ff ff ff       jmpq   [a-f0-9]+ <foo3@plt>
-[ ]*[a-f0-9]+: e8 [a-f0-9]+ ff ff ff       callq  [a-f0-9]+ <foo4@plt>
-[ ]*[a-f0-9]+: f2 e8 [a-f0-9]+ ff ff ff     bnd callq [a-f0-9]+ <foo3@plt>
-[ ]*[a-f0-9]+: e9 [a-f0-9]+ ff ff ff       jmpq   [a-f0-9]+ <foo4@plt>
+[ ]*[a-f0-9]+: f2 e9 [a-f0-9]+ ff ff ff     bnd jmp [a-f0-9]+ <foo1@plt>
+[ ]*[a-f0-9]+: e8 [a-f0-9]+ ff ff ff       call   [a-f0-9]+ <foo2@plt>
+[ ]*[a-f0-9]+: e9 [a-f0-9]+ ff ff ff       jmp    [a-f0-9]+ <foo3@plt>
+[ ]*[a-f0-9]+: e8 [a-f0-9]+ ff ff ff       call   [a-f0-9]+ <foo4@plt>
+[ ]*[a-f0-9]+: f2 e8 [a-f0-9]+ ff ff ff     bnd call [a-f0-9]+ <foo3@plt>
+[ ]*[a-f0-9]+: e9 [a-f0-9]+ ff ff ff       jmp    [a-f0-9]+ <foo4@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/bnd-ifunc-1-now.d
+++ b/ld/testsuite/ld-x86-64/bnd-ifunc-1-now.d
@@ -9,25 +9,25 @@
 Disassembly of section .plt:
 
 0+170 <.plt>:
- +[a-f0-9]+: ff 35 4a 01 20 00     pushq  0x20014a\(%rip\)        # 2002c0 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 4b 01 20 00 bnd jmpq \*0x20014b\(%rip\)        # 2002c8 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 4a 01 20 00     push   0x20014a\(%rip\)        # 2002c0 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 4b 01 20 00 bnd jmp \*0x20014b\(%rip\)        # 2002c8 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmpq 170 <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmp 170 <.plt>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .plt.sec:
 
 0+190 <\*ABS\*\+0x198@plt>:
- +[a-f0-9]+: f2 ff 25 39 01 20 00 bnd jmpq \*0x200139\(%rip\)        # 2002d0 <_GLOBAL_OFFSET_TABLE_\+0x18>
+ +[a-f0-9]+: f2 ff 25 39 01 20 00 bnd jmp \*0x200139\(%rip\)        # 2002d0 <_GLOBAL_OFFSET_TABLE_\+0x18>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .text:
 
 0+198 <foo>:
- +[a-f0-9]+: f2 c3                 bnd retq
+ +[a-f0-9]+: f2 c3                 bnd ret *
 
 0+19a <bar>:
- +[a-f0-9]+: f2 e8 f0 ff ff ff     bnd callq 190 <\*ABS\*\+0x198@plt>
- +[a-f0-9]+: f2 c3                 bnd retq
+ +[a-f0-9]+: f2 e8 f0 ff ff ff     bnd call 190 <\*ABS\*\+0x198@plt>
+ +[a-f0-9]+: f2 c3                 bnd ret *
 #pass
--- a/ld/testsuite/ld-x86-64/bnd-ifunc-1.d
+++ b/ld/testsuite/ld-x86-64/bnd-ifunc-1.d
@@ -3,5 +3,5 @@
 #objdump: -dw
 
 #...
-[ ]*[a-f0-9]+: f2 e8 f0 ff ff ff     bnd callq [a-f0-9]+ <\*ABS\*\+0x[a-f0-9]+@plt>
+[ ]*[a-f0-9]+: f2 e8 f0 ff ff ff     bnd call [a-f0-9]+ <\*ABS\*\+0x[a-f0-9]+@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/bnd-ifunc-2-now.d
+++ b/ld/testsuite/ld-x86-64/bnd-ifunc-2-now.d
@@ -9,51 +9,51 @@
 Disassembly of section .plt:
 
 0+240 <.plt>:
- +[a-f0-9]+: ff 35 9a 01 20 00     pushq  0x20019a\(%rip\)        # 2003e0 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 9b 01 20 00 bnd jmpq \*0x20019b\(%rip\)        # 2003e8 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 9a 01 20 00     push   0x20019a\(%rip\)        # 2003e0 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 9b 01 20 00 bnd jmp \*0x20019b\(%rip\)        # 2003e8 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
- +[a-f0-9]+: 68 03 00 00 00       pushq  \$0x3
- +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmpq 240 <.plt>
+ +[a-f0-9]+: 68 03 00 00 00       push   \$0x3
+ +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmp 240 <.plt>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: f2 e9 d5 ff ff ff     bnd jmpq 240 <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: f2 e9 d5 ff ff ff     bnd jmp 240 <.plt>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
- +[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
- +[a-f0-9]+: f2 e9 c5 ff ff ff     bnd jmpq 240 <.plt>
+ +[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+ +[a-f0-9]+: f2 e9 c5 ff ff ff     bnd jmp 240 <.plt>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
- +[a-f0-9]+: 68 02 00 00 00       pushq  \$0x2
- +[a-f0-9]+: f2 e9 b5 ff ff ff     bnd jmpq 240 <.plt>
+ +[a-f0-9]+: 68 02 00 00 00       push   \$0x2
+ +[a-f0-9]+: f2 e9 b5 ff ff ff     bnd jmp 240 <.plt>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .plt.sec:
 
 0+290 <\*ABS\*\+0x2bc@plt>:
- +[a-f0-9]+: f2 ff 25 59 01 20 00 bnd jmpq \*0x200159\(%rip\)        # 2003f0 <_GLOBAL_OFFSET_TABLE_\+0x18>
+ +[a-f0-9]+: f2 ff 25 59 01 20 00 bnd jmp \*0x200159\(%rip\)        # 2003f0 <_GLOBAL_OFFSET_TABLE_\+0x18>
  +[a-f0-9]+: 90                   nop
 
 0+298 <func1@plt>:
- +[a-f0-9]+: f2 ff 25 59 01 20 00 bnd jmpq \*0x200159\(%rip\)        # 2003f8 <func1>
+ +[a-f0-9]+: f2 ff 25 59 01 20 00 bnd jmp \*0x200159\(%rip\)        # 2003f8 <func1>
  +[a-f0-9]+: 90                   nop
 
 0+2a0 <func2@plt>:
- +[a-f0-9]+: f2 ff 25 59 01 20 00 bnd jmpq \*0x200159\(%rip\)        # 200400 <func2>
+ +[a-f0-9]+: f2 ff 25 59 01 20 00 bnd jmp \*0x200159\(%rip\)        # 200400 <func2>
  +[a-f0-9]+: 90                   nop
 
 0+2a8 <\*ABS\*\+0x2b0@plt>:
- +[a-f0-9]+: f2 ff 25 59 01 20 00 bnd jmpq \*0x200159\(%rip\)        # 200408 <_GLOBAL_OFFSET_TABLE_\+0x30>
+ +[a-f0-9]+: f2 ff 25 59 01 20 00 bnd jmp \*0x200159\(%rip\)        # 200408 <_GLOBAL_OFFSET_TABLE_\+0x30>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .text:
 
 0+2b0 <resolve1>:
- +[a-f0-9]+: f2 e8 e2 ff ff ff     bnd callq 298 <func1@plt>
+ +[a-f0-9]+: f2 e8 e2 ff ff ff     bnd call 298 <func1@plt>
 
 0+2b6 <g1>:
- +[a-f0-9]+: f2 e9 ec ff ff ff     bnd jmpq 2a8 <\*ABS\*\+0x2b0@plt>
+ +[a-f0-9]+: f2 e9 ec ff ff ff     bnd jmp 2a8 <\*ABS\*\+0x2b0@plt>
 
 0+2bc <resolve2>:
- +[a-f0-9]+: f2 e8 de ff ff ff     bnd callq 2a0 <func2@plt>
+ +[a-f0-9]+: f2 e8 de ff ff ff     bnd call 2a0 <func2@plt>
 
 0+2c2 <g2>:
- +[a-f0-9]+: f2 e9 c8 ff ff ff     bnd jmpq 290 <\*ABS\*\+0x2bc@plt>
+ +[a-f0-9]+: f2 e9 c8 ff ff ff     bnd jmp 290 <\*ABS\*\+0x2bc@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/bnd-ifunc-2.d
+++ b/ld/testsuite/ld-x86-64/bnd-ifunc-2.d
@@ -4,51 +4,51 @@
 
 #...
 0+240 <.plt>:
-[ ]*[a-f0-9]+: ff 35 7a 01 20 00     pushq  0x20017a\(%rip\)[ ]*(#.*)?
-[ ]*[a-f0-9]+: f2 ff 25 7b 01 20 00 bnd jmpq \*0x20017b\(%rip\)[ ]*(#.*)?
+[ ]*[a-f0-9]+: ff 35 7a 01 20 00     push   0x20017a\(%rip\)[ ]*(#.*)?
+[ ]*[a-f0-9]+: f2 ff 25 7b 01 20 00 bnd jmp \*0x20017b\(%rip\)[ ]*(#.*)?
 [ ]*[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
-[ ]*[a-f0-9]+: 68 03 00 00 00       pushq  \$0x3
-[ ]*[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmpq 240 <.plt>
+[ ]*[a-f0-9]+: 68 03 00 00 00       push   \$0x3
+[ ]*[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmp 240 <.plt>
 [ ]*[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
-[ ]*[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
-[ ]*[a-f0-9]+: f2 e9 d5 ff ff ff     bnd jmpq 240 <.plt>
+[ ]*[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+[ ]*[a-f0-9]+: f2 e9 d5 ff ff ff     bnd jmp 240 <.plt>
 [ ]*[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
-[ ]*[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
-[ ]*[a-f0-9]+: f2 e9 c5 ff ff ff     bnd jmpq 240 <.plt>
+[ ]*[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+[ ]*[a-f0-9]+: f2 e9 c5 ff ff ff     bnd jmp 240 <.plt>
 [ ]*[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
-[ ]*[a-f0-9]+: 68 02 00 00 00       pushq  \$0x2
-[ ]*[a-f0-9]+: f2 e9 b5 ff ff ff     bnd jmpq 240 <.plt>
+[ ]*[a-f0-9]+: 68 02 00 00 00       push   \$0x2
+[ ]*[a-f0-9]+: f2 e9 b5 ff ff ff     bnd jmp 240 <.plt>
 [ ]*[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .plt.sec:
 
 0+290 <\*ABS\*\+0x2bc@plt>:
-[ ]*[a-f0-9]+: f2 ff 25 39 01 20 00 bnd jmpq \*0x200139\(%rip\)[ ]*(#.*)?
+[ ]*[a-f0-9]+: f2 ff 25 39 01 20 00 bnd jmp \*0x200139\(%rip\)[ ]*(#.*)?
 [ ]*[a-f0-9]+: 90                   nop
 
 0+298 <func1@plt>:
-[ ]*[a-f0-9]+: f2 ff 25 39 01 20 00 bnd jmpq \*0x200139\(%rip\)[ ]*(#.*)?
+[ ]*[a-f0-9]+: f2 ff 25 39 01 20 00 bnd jmp \*0x200139\(%rip\)[ ]*(#.*)?
 [ ]*[a-f0-9]+: 90                   nop
 
 0+2a0 <func2@plt>:
-[ ]*[a-f0-9]+: f2 ff 25 39 01 20 00 bnd jmpq \*0x200139\(%rip\)[ ]*(#.*)?
+[ ]*[a-f0-9]+: f2 ff 25 39 01 20 00 bnd jmp \*0x200139\(%rip\)[ ]*(#.*)?
 [ ]*[a-f0-9]+: 90                   nop
 
 0+2a8 <\*ABS\*\+0x2b0@plt>:
-[ ]*[a-f0-9]+: f2 ff 25 39 01 20 00 bnd jmpq \*0x200139\(%rip\)[ ]*(#.*)?
+[ ]*[a-f0-9]+: f2 ff 25 39 01 20 00 bnd jmp \*0x200139\(%rip\)[ ]*(#.*)?
 [ ]*[a-f0-9]+: 90                   nop
 
 Disassembly of section .text:
 
 0+2b0 <resolve1>:
-[ ]*[a-f0-9]+: f2 e8 e2 ff ff ff     bnd callq 298 <func1@plt>
+[ ]*[a-f0-9]+: f2 e8 e2 ff ff ff     bnd call 298 <func1@plt>
 
 0+2b6 <g1>:
-[ ]*[a-f0-9]+: f2 e9 ec ff ff ff     bnd jmpq 2a8 <\*ABS\*\+0x2b0@plt>
+[ ]*[a-f0-9]+: f2 e9 ec ff ff ff     bnd jmp 2a8 <\*ABS\*\+0x2b0@plt>
 
 0+2bc <resolve2>:
-[ ]*[a-f0-9]+: f2 e8 de ff ff ff     bnd callq 2a0 <func2@plt>
+[ ]*[a-f0-9]+: f2 e8 de ff ff ff     bnd call 2a0 <func2@plt>
 
 0+2c2 <g2>:
-[ ]*[a-f0-9]+: f2 e9 c8 ff ff ff     bnd jmpq 290 <\*ABS\*\+0x2bc@plt>
+[ ]*[a-f0-9]+: f2 e9 c8 ff ff ff     bnd jmp 290 <\*ABS\*\+0x2bc@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/bnd-plt-1-now.d
+++ b/ld/testsuite/ld-x86-64/bnd-plt-1-now.d
@@ -9,47 +9,47 @@
 Disassembly of section .plt:
 
 0+230 <.plt>:
- +[a-f0-9]+: ff 35 a2 01 20 00     pushq  0x2001a2\(%rip\)        # 2003d8 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 a3 01 20 00 bnd jmpq \*0x2001a3\(%rip\)        # 2003e0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 a2 01 20 00     push   0x2001a2\(%rip\)        # 2003d8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 a3 01 20 00 bnd jmp \*0x2001a3\(%rip\)        # 2003e0 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmpq 230 <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmp 230 <.plt>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
- +[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
- +[a-f0-9]+: f2 e9 d5 ff ff ff     bnd jmpq 230 <.plt>
+ +[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+ +[a-f0-9]+: f2 e9 d5 ff ff ff     bnd jmp 230 <.plt>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
- +[a-f0-9]+: 68 02 00 00 00       pushq  \$0x2
- +[a-f0-9]+: f2 e9 c5 ff ff ff     bnd jmpq 230 <.plt>
+ +[a-f0-9]+: 68 02 00 00 00       push   \$0x2
+ +[a-f0-9]+: f2 e9 c5 ff ff ff     bnd jmp 230 <.plt>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
- +[a-f0-9]+: 68 03 00 00 00       pushq  \$0x3
- +[a-f0-9]+: f2 e9 b5 ff ff ff     bnd jmpq 230 <.plt>
+ +[a-f0-9]+: 68 03 00 00 00       push   \$0x3
+ +[a-f0-9]+: f2 e9 b5 ff ff ff     bnd jmp 230 <.plt>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .plt.sec:
 
 0+280 <foo2@plt>:
- +[a-f0-9]+: f2 ff 25 61 01 20 00 bnd jmpq \*0x200161\(%rip\)        # 2003e8 <foo2>
+ +[a-f0-9]+: f2 ff 25 61 01 20 00 bnd jmp \*0x200161\(%rip\)        # 2003e8 <foo2>
  +[a-f0-9]+: 90                   nop
 
 0+288 <foo3@plt>:
- +[a-f0-9]+: f2 ff 25 61 01 20 00 bnd jmpq \*0x200161\(%rip\)        # 2003f0 <foo3>
+ +[a-f0-9]+: f2 ff 25 61 01 20 00 bnd jmp \*0x200161\(%rip\)        # 2003f0 <foo3>
  +[a-f0-9]+: 90                   nop
 
 0+290 <foo1@plt>:
- +[a-f0-9]+: f2 ff 25 61 01 20 00 bnd jmpq \*0x200161\(%rip\)        # 2003f8 <foo1>
+ +[a-f0-9]+: f2 ff 25 61 01 20 00 bnd jmp \*0x200161\(%rip\)        # 2003f8 <foo1>
  +[a-f0-9]+: 90                   nop
 
 0+298 <foo4@plt>:
- +[a-f0-9]+: f2 ff 25 61 01 20 00 bnd jmpq \*0x200161\(%rip\)        # 200400 <foo4>
+ +[a-f0-9]+: f2 ff 25 61 01 20 00 bnd jmp \*0x200161\(%rip\)        # 200400 <foo4>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .text:
 
 0+2a0 <_start>:
- +[a-f0-9]+: f2 e9 ea ff ff ff     bnd jmpq 290 <foo1@plt>
- +[a-f0-9]+: e8 d5 ff ff ff       callq  280 <foo2@plt>
- +[a-f0-9]+: e9 d8 ff ff ff       jmpq   288 <foo3@plt>
- +[a-f0-9]+: e8 e3 ff ff ff       callq  298 <foo4@plt>
- +[a-f0-9]+: f2 e8 cd ff ff ff     bnd callq 288 <foo3@plt>
- +[a-f0-9]+: e9 d8 ff ff ff       jmpq   298 <foo4@plt>
+ +[a-f0-9]+: f2 e9 ea ff ff ff     bnd jmp 290 <foo1@plt>
+ +[a-f0-9]+: e8 d5 ff ff ff       call   280 <foo2@plt>
+ +[a-f0-9]+: e9 d8 ff ff ff       jmp    288 <foo3@plt>
+ +[a-f0-9]+: e8 e3 ff ff ff       call   298 <foo4@plt>
+ +[a-f0-9]+: f2 e8 cd ff ff ff     bnd call 288 <foo3@plt>
+ +[a-f0-9]+: e9 d8 ff ff ff       jmp    298 <foo4@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/bnd-plt-1.d
+++ b/ld/testsuite/ld-x86-64/bnd-plt-1.d
@@ -9,47 +9,47 @@
 Disassembly of section .plt:
 
 0+230 <.plt>:
-[ ]*[a-f0-9]+: ff 35 82 01 20 00     pushq  0x200182\(%rip\)[ ]*(#.*)?
-[ ]*[a-f0-9]+: f2 ff 25 83 01 20 00 bnd jmpq \*0x200183\(%rip\)[ ]*(#.*)?
+[ ]*[a-f0-9]+: ff 35 82 01 20 00     push   0x200182\(%rip\)[ ]*(#.*)?
+[ ]*[a-f0-9]+: f2 ff 25 83 01 20 00 bnd jmp \*0x200183\(%rip\)[ ]*(#.*)?
 [ ]*[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
-[ ]*[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
-[ ]*[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmpq 230 <.plt>
+[ ]*[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+[ ]*[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmp 230 <.plt>
 [ ]*[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
-[ ]*[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
-[ ]*[a-f0-9]+: f2 e9 d5 ff ff ff     bnd jmpq 230 <.plt>
+[ ]*[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+[ ]*[a-f0-9]+: f2 e9 d5 ff ff ff     bnd jmp 230 <.plt>
 [ ]*[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
-[ ]*[a-f0-9]+: 68 02 00 00 00       pushq  \$0x2
-[ ]*[a-f0-9]+: f2 e9 c5 ff ff ff     bnd jmpq 230 <.plt>
+[ ]*[a-f0-9]+: 68 02 00 00 00       push   \$0x2
+[ ]*[a-f0-9]+: f2 e9 c5 ff ff ff     bnd jmp 230 <.plt>
 [ ]*[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
-[ ]*[a-f0-9]+: 68 03 00 00 00       pushq  \$0x3
-[ ]*[a-f0-9]+: f2 e9 b5 ff ff ff     bnd jmpq 230 <.plt>
+[ ]*[a-f0-9]+: 68 03 00 00 00       push   \$0x3
+[ ]*[a-f0-9]+: f2 e9 b5 ff ff ff     bnd jmp 230 <.plt>
 [ ]*[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .plt.sec:
 
 0+280 <foo2@plt>:
-[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmpq \*0x200141\(%rip\)[ ]*(#.*)?
+[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmp \*0x200141\(%rip\)[ ]*(#.*)?
 [ ]*[a-f0-9]+: 90                   nop
 
 0+288 <foo3@plt>:
-[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmpq \*0x200141\(%rip\)[ ]*(#.*)?
+[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmp \*0x200141\(%rip\)[ ]*(#.*)?
 [ ]*[a-f0-9]+: 90                   nop
 
 0+290 <foo1@plt>:
-[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmpq \*0x200141\(%rip\)[ ]*(#.*)?
+[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmp \*0x200141\(%rip\)[ ]*(#.*)?
 [ ]*[a-f0-9]+: 90                   nop
 
 0+298 <foo4@plt>:
-[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmpq \*0x200141\(%rip\)[ ]*(#.*)?
+[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmp \*0x200141\(%rip\)[ ]*(#.*)?
 [ ]*[a-f0-9]+: 90                   nop
 
 Disassembly of section .text:
 
 0+2a0 <_start>:
-[ ]*[a-f0-9]+: f2 e9 ea ff ff ff     bnd jmpq 290 <foo1@plt>
-[ ]*[a-f0-9]+: e8 d5 ff ff ff       callq  280 <foo2@plt>
-[ ]*[a-f0-9]+: e9 d8 ff ff ff       jmpq   288 <foo3@plt>
-[ ]*[a-f0-9]+: e8 e3 ff ff ff       callq  298 <foo4@plt>
-[ ]*[a-f0-9]+: f2 e8 cd ff ff ff     bnd callq 288 <foo3@plt>
-[ ]*[a-f0-9]+: e9 d8 ff ff ff       jmpq   298 <foo4@plt>
+[ ]*[a-f0-9]+: f2 e9 ea ff ff ff     bnd jmp 290 <foo1@plt>
+[ ]*[a-f0-9]+: e8 d5 ff ff ff       call   280 <foo2@plt>
+[ ]*[a-f0-9]+: e9 d8 ff ff ff       jmp    288 <foo3@plt>
+[ ]*[a-f0-9]+: e8 e3 ff ff ff       call   298 <foo4@plt>
+[ ]*[a-f0-9]+: f2 e8 cd ff ff ff     bnd call 288 <foo3@plt>
+[ ]*[a-f0-9]+: e9 d8 ff ff ff       jmp    298 <foo4@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/call1a.d
+++ b/ld/testsuite/ld-x86-64/call1a.d
@@ -9,5 +9,5 @@
 Disassembly of section .text:
 
 #...
-[ ]*[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4} * addr32 callq +[a-f0-9]+ <foo>
+[ ]*[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4} * addr32 call +[a-f0-9]+ <foo>
 #pass
--- a/ld/testsuite/ld-x86-64/call1b.d
+++ b/ld/testsuite/ld-x86-64/call1b.d
@@ -9,5 +9,5 @@
 Disassembly of section .text:
 
 #...
-[ ]*[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4} * addr32 callq +[a-f0-9]+ <foo>
+[ ]*[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4} * addr32 call +[a-f0-9]+ <foo>
 #pass
--- a/ld/testsuite/ld-x86-64/call1d.d
+++ b/ld/testsuite/ld-x86-64/call1d.d
@@ -9,6 +9,6 @@
 Disassembly of section .text:
 
 #...
-[ ]*[a-f0-9]+: e8 ([0-9a-f]{2} ){4} * callq +[a-f0-9]+ <foo>
+[ ]*[a-f0-9]+: e8 ([0-9a-f]{2} ){4} * call +[a-f0-9]+ <foo>
 [ ]*[a-f0-9]+: 90                   nop
 #pass
--- a/ld/testsuite/ld-x86-64/call1e.d
+++ b/ld/testsuite/ld-x86-64/call1e.d
@@ -9,5 +9,5 @@
 Disassembly of section .text:
 
 #...
-[ ]*[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4} * addr32 callq +[a-f0-9]+ <foo>
+[ ]*[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4} * addr32 call +[a-f0-9]+ <foo>
 #pass
--- a/ld/testsuite/ld-x86-64/call1f.d
+++ b/ld/testsuite/ld-x86-64/call1f.d
@@ -10,5 +10,5 @@ Disassembly of section .text:
 
 #...
 [ ]*[a-f0-9]+: 90                   nop
-[ ]*[a-f0-9]+: e8 ([0-9a-f]{2} ){4} * callq +[a-f0-9]+ <foo>
+[ ]*[a-f0-9]+: e8 ([0-9a-f]{2} ){4} * call +[a-f0-9]+ <foo>
 #pass
--- a/ld/testsuite/ld-x86-64/call1g.d
+++ b/ld/testsuite/ld-x86-64/call1g.d
@@ -9,6 +9,6 @@
 Disassembly of section .text:
 
 #...
-[ ]*[a-f0-9]+: e8 ([0-9a-f]{2} ){4} * callq +[a-f0-9]+ <foo>
+[ ]*[a-f0-9]+: e8 ([0-9a-f]{2} ){4} * call +[a-f0-9]+ <foo>
 [ ]*[a-f0-9]+: 90                   nop
 #pass
--- a/ld/testsuite/ld-x86-64/call1h.d
+++ b/ld/testsuite/ld-x86-64/call1h.d
@@ -9,6 +9,6 @@
 Disassembly of section .text:
 
 #...
-[ ]*[a-f0-9]+: e8 ([0-9a-f]{2} ){4} * callq +[a-f0-9]+ <foo>
+[ ]*[a-f0-9]+: e8 ([0-9a-f]{2} ){4} * call +[a-f0-9]+ <foo>
 [ ]*[a-f0-9]+: 90                   nop
 #pass
--- a/ld/testsuite/ld-x86-64/call1i.d
+++ b/ld/testsuite/ld-x86-64/call1i.d
@@ -9,6 +9,6 @@
 Disassembly of section .text:
 
 #...
-[ ]*[a-f0-9]+: e8 ([0-9a-f]{2} ){4} * callq +[a-f0-9]+ <foo>
+[ ]*[a-f0-9]+: e8 ([0-9a-f]{2} ){4} * call +[a-f0-9]+ <foo>
 [ ]*[a-f0-9]+: 90                   nop
 #pass
--- a/ld/testsuite/ld-x86-64/gotpcrel1.dd
+++ b/ld/testsuite/ld-x86-64/gotpcrel1.dd
@@ -1,17 +1,17 @@
 #...
 [a-f0-9]+ <main>:
 [ ]*[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
-[ ]*[a-f0-9]+: [ a-f0-9]+     addr32 callq [a-f0-9]+ <foo>
-[ ]*[a-f0-9]+: [ a-f0-9]+     callq  \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <.*>
-[ ]*[a-f0-9]+: [ a-f0-9]+     callq  \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <.*>
+[ ]*[a-f0-9]+: [ a-f0-9]+     addr32 call [a-f0-9]+ <foo>
+[ ]*[a-f0-9]+: [ a-f0-9]+     call   \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <.*>
+[ ]*[a-f0-9]+: [ a-f0-9]+     call   \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <.*>
 [ ]*[a-f0-9]+: [ a-f0-9]+ (rex mov|mov   ) \$0x[a-f0-9]+,%(r|e)ax
-[ ]*[a-f0-9]+: ff d0                 callq  \*%rax
+[ ]*[a-f0-9]+: ff d0                 call   \*%rax
 [ ]*[a-f0-9]+: [ a-f0-9]+ mov    0x[a-f0-9]+\(%rip\),%rcx        # [a-f0-9]+ <.*>
-[ ]*[a-f0-9]+: ff d1                 callq  \*%rcx
+[ ]*[a-f0-9]+: ff d1                 call   \*%rcx
 [ ]*[a-f0-9]+: [ a-f0-9]+ mov    0x[a-f0-9]+\(%rip\),%rdx        # [a-f0-9]+ <.*>
-[ ]*[a-f0-9]+: ff d2                 callq  \*%rdx
+[ ]*[a-f0-9]+: ff d2                 call   \*%rdx
 [ ]*[a-f0-9]+: 31 ff                 xor    %edi,%edi
 [ ]*[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
-[ ]*[a-f0-9]+: [ a-f0-9]+       jmpq   [a-f0-9]+ <myexit>
+[ ]*[a-f0-9]+: [ a-f0-9]+       jmp    [a-f0-9]+ <myexit>
 [ ]*[a-f0-9]+: 90                   nop
 #pass
--- a/ld/testsuite/ld-x86-64/hidden2.d
+++ b/ld/testsuite/ld-x86-64/hidden2.d
@@ -8,6 +8,6 @@
 Disassembly of section .text:
 
 [a-f0-9]+ <bar>:
-[ ]*[a-f0-9]+: e8 ([0-9a-f]{2} ){4} * callq  0 .*
-[ ]*[a-f0-9]+: c3                   retq *
+[ ]*[a-f0-9]+: e8 ([0-9a-f]{2} ){4} * call   0 .*
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/ibt-plt-1-x32.d
+++ b/ld/testsuite/ld-x86-64/ibt-plt-1-x32.d
@@ -9,35 +9,35 @@
 Disassembly of section .plt:
 
 [a-f0-9]+ <.plt>:
- +[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+pushq  0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq   \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+push   0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp    \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: e9 e2 ff ff ff       jmpq   [a-f0-9]+ <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: e9 e2 ff ff ff       jmp    [a-f0-9]+ <.plt>
  +[a-f0-9]+: 66 90                 xchg   %ax,%ax
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
- +[a-f0-9]+: e9 d2 ff ff ff       jmpq   [a-f0-9]+ <.plt>
+ +[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+ +[a-f0-9]+: e9 d2 ff ff ff       jmp    [a-f0-9]+ <.plt>
  +[a-f0-9]+: 66 90                 xchg   %ax,%ax
 
 Disassembly of section .plt.sec:
 
 [a-f0-9]+ <bar1@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq   \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar1>
+ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp    \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar1>
  +[a-f0-9]+: 66 0f 1f 44 00 00     nopw   0x0\(%rax,%rax,1\)
 
 [a-f0-9]+ <bar2@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq   \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar2>
+ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp    \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar2>
  +[a-f0-9]+: 66 0f 1f 44 00 00     nopw   0x0\(%rax,%rax,1\)
 
 Disassembly of section .text:
 
 [a-f0-9]+ <foo>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: e8 e7 ff ff ff       callq  [a-f0-9]+ <bar2@plt>
+ +[a-f0-9]+: e8 e7 ff ff ff       call   [a-f0-9]+ <bar2@plt>
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: e9 ce ff ff ff       jmpq   [a-f0-9]+ <bar1@plt>
+ +[a-f0-9]+: e9 ce ff ff ff       jmp    [a-f0-9]+ <bar1@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/ibt-plt-1.d
+++ b/ld/testsuite/ld-x86-64/ibt-plt-1.d
@@ -9,35 +9,35 @@
 Disassembly of section .plt:
 
 [a-f0-9]+ <.plt>:
- +[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+pushq  0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmpq \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+push   0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: f2 e9 e1 ff ff ff     bnd jmpq [a-f0-9]+ <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: f2 e9 e1 ff ff ff     bnd jmp [a-f0-9]+ <.plt>
  +[a-f0-9]+: 90                   nop
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
- +[a-f0-9]+: f2 e9 d1 ff ff ff     bnd jmpq [a-f0-9]+ <.plt>
+ +[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+ +[a-f0-9]+: f2 e9 d1 ff ff ff     bnd jmp [a-f0-9]+ <.plt>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .plt.sec:
 
 [a-f0-9]+ <bar1@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmpq \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar1>
+ +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar1>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 [a-f0-9]+ <bar2@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmpq \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar2>
+ +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar2>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .text:
 
 [a-f0-9]+ <foo>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: e8 e7 ff ff ff       callq  [a-f0-9]+ <bar2@plt>
+ +[a-f0-9]+: e8 e7 ff ff ff       call   [a-f0-9]+ <bar2@plt>
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: e9 ce ff ff ff       jmpq   [a-f0-9]+ <bar1@plt>
+ +[a-f0-9]+: e9 ce ff ff ff       jmp    [a-f0-9]+ <bar1@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/ibt-plt-2a-x32.d
+++ b/ld/testsuite/ld-x86-64/ibt-plt-2a-x32.d
@@ -9,35 +9,35 @@
 Disassembly of section .plt:
 
 0+140 <.plt>:
- +[a-f0-9]+: ff 35 4a 01 20 00     pushq  0x20014a\(%rip\)        # 200290 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 4c 01 20 00     jmpq   \*0x20014c\(%rip\)        # 200298 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 4a 01 20 00     push   0x20014a\(%rip\)        # 200290 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 4c 01 20 00     jmp    \*0x20014c\(%rip\)        # 200298 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: e9 e2 ff ff ff       jmpq   140 <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: e9 e2 ff ff ff       jmp    140 <.plt>
  +[a-f0-9]+: 66 90                 xchg   %ax,%ax
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
- +[a-f0-9]+: e9 d2 ff ff ff       jmpq   140 <.plt>
+ +[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+ +[a-f0-9]+: e9 d2 ff ff ff       jmp    140 <.plt>
  +[a-f0-9]+: 66 90                 xchg   %ax,%ax
 
 Disassembly of section .plt.sec:
 
 0+170 <bar1@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: ff 25 26 01 20 00     jmpq   \*0x200126\(%rip\)        # 2002a0 <bar1>
+ +[a-f0-9]+: ff 25 26 01 20 00     jmp    \*0x200126\(%rip\)        # 2002a0 <bar1>
  +[a-f0-9]+: 66 0f 1f 44 00 00     nopw   0x0\(%rax,%rax,1\)
 
 0+180 <bar2@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: ff 25 1e 01 20 00     jmpq   \*0x20011e\(%rip\)        # 2002a8 <bar2>
+ +[a-f0-9]+: ff 25 1e 01 20 00     jmp    \*0x20011e\(%rip\)        # 2002a8 <bar2>
  +[a-f0-9]+: 66 0f 1f 44 00 00     nopw   0x0\(%rax,%rax,1\)
 
 Disassembly of section .text:
 
 0+190 <foo>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: e8 e7 ff ff ff       callq  180 <bar2@plt>
+ +[a-f0-9]+: e8 e7 ff ff ff       call   180 <bar2@plt>
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: e9 ce ff ff ff       jmpq   170 <bar1@plt>
+ +[a-f0-9]+: e9 ce ff ff ff       jmp    170 <bar1@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/ibt-plt-2a.d
+++ b/ld/testsuite/ld-x86-64/ibt-plt-2a.d
@@ -9,35 +9,35 @@
 Disassembly of section .plt:
 
 0+1f0 <.plt>:
- +[a-f0-9]+: ff 35 ca 01 20 00     pushq  0x2001ca\(%rip\)        # 2003c0 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 cb 01 20 00 bnd jmpq \*0x2001cb\(%rip\)        # 2003c8 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 ca 01 20 00     push   0x2001ca\(%rip\)        # 2003c0 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 cb 01 20 00 bnd jmp \*0x2001cb\(%rip\)        # 2003c8 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: f2 e9 e1 ff ff ff     bnd jmpq 1f0 <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: f2 e9 e1 ff ff ff     bnd jmp 1f0 <.plt>
  +[a-f0-9]+: 90                   nop
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
- +[a-f0-9]+: f2 e9 d1 ff ff ff     bnd jmpq 1f0 <.plt>
+ +[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+ +[a-f0-9]+: f2 e9 d1 ff ff ff     bnd jmp 1f0 <.plt>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .plt.sec:
 
 0+220 <bar1@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: f2 ff 25 a5 01 20 00 bnd jmpq \*0x2001a5\(%rip\)        # 2003d0 <bar1>
+ +[a-f0-9]+: f2 ff 25 a5 01 20 00 bnd jmp \*0x2001a5\(%rip\)        # 2003d0 <bar1>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 0+230 <bar2@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: f2 ff 25 9d 01 20 00 bnd jmpq \*0x20019d\(%rip\)        # 2003d8 <bar2>
+ +[a-f0-9]+: f2 ff 25 9d 01 20 00 bnd jmp \*0x20019d\(%rip\)        # 2003d8 <bar2>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .text:
 
 0+240 <foo>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: e8 e7 ff ff ff       callq  230 <bar2@plt>
+ +[a-f0-9]+: e8 e7 ff ff ff       call   230 <bar2@plt>
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: e9 ce ff ff ff       jmpq   220 <bar1@plt>
+ +[a-f0-9]+: e9 ce ff ff ff       jmp    220 <bar1@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/ibt-plt-2c-x32.d
+++ b/ld/testsuite/ld-x86-64/ibt-plt-2c-x32.d
@@ -9,35 +9,35 @@
 Disassembly of section .plt:
 
 [a-f0-9]+ <.plt>:
- +[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+pushq  0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq   \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+push   0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp    \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: e9 e2 ff ff ff       jmpq   [a-f0-9]+ <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: e9 e2 ff ff ff       jmp    [a-f0-9]+ <.plt>
  +[a-f0-9]+: 66 90                 xchg   %ax,%ax
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
- +[a-f0-9]+: e9 d2 ff ff ff       jmpq   [a-f0-9]+ <.plt>
+ +[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+ +[a-f0-9]+: e9 d2 ff ff ff       jmp    [a-f0-9]+ <.plt>
  +[a-f0-9]+: 66 90                 xchg   %ax,%ax
 
 Disassembly of section .plt.sec:
 
 [a-f0-9]+ <bar1@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq   \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar1>
+ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp    \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar1>
  +[a-f0-9]+: 66 0f 1f 44 00 00     nopw   0x0\(%rax,%rax,1\)
 
 [a-f0-9]+ <bar2@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq   \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar2>
+ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp    \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar2>
  +[a-f0-9]+: 66 0f 1f 44 00 00     nopw   0x0\(%rax,%rax,1\)
 
 Disassembly of section .text:
 
 [a-f0-9]+ <foo>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: e8 e7 ff ff ff       callq  [a-f0-9]+ <bar2@plt>
+ +[a-f0-9]+: e8 e7 ff ff ff       call   [a-f0-9]+ <bar2@plt>
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: e9 ce ff ff ff       jmpq   [a-f0-9]+ <bar1@plt>
+ +[a-f0-9]+: e9 ce ff ff ff       jmp    [a-f0-9]+ <bar1@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/ibt-plt-2c.d
+++ b/ld/testsuite/ld-x86-64/ibt-plt-2c.d
@@ -9,35 +9,35 @@
 Disassembly of section .plt:
 
 [a-f0-9]+ <.plt>:
- +[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+pushq  0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmpq \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+push   0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: f2 e9 e1 ff ff ff     bnd jmpq [a-f0-9]+ <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: f2 e9 e1 ff ff ff     bnd jmp [a-f0-9]+ <.plt>
  +[a-f0-9]+: 90                   nop
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
- +[a-f0-9]+: f2 e9 d1 ff ff ff     bnd jmpq [a-f0-9]+ <.plt>
+ +[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+ +[a-f0-9]+: f2 e9 d1 ff ff ff     bnd jmp [a-f0-9]+ <.plt>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .plt.sec:
 
 [a-f0-9]+ <bar1@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmpq \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar1>
+ +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar1>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 [a-f0-9]+ <bar2@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmpq \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar2>
+ +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar2>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .text:
 
 [a-f0-9]+ <foo>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: e8 e7 ff ff ff       callq  [a-f0-9]+ <bar2@plt>
+ +[a-f0-9]+: e8 e7 ff ff ff       call   [a-f0-9]+ <bar2@plt>
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: e9 ce ff ff ff       jmpq   [a-f0-9]+ <bar1@plt>
+ +[a-f0-9]+: e9 ce ff ff ff       jmp    [a-f0-9]+ <bar1@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/ibt-plt-3a-x32.d
+++ b/ld/testsuite/ld-x86-64/ibt-plt-3a-x32.d
@@ -9,35 +9,35 @@
 Disassembly of section .plt:
 
 0+140 <.plt>:
- +[a-f0-9]+: ff 35 4a 01 20 00     pushq  0x20014a\(%rip\)        # 200290 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 4c 01 20 00     jmpq   \*0x20014c\(%rip\)        # 200298 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 4a 01 20 00     push   0x20014a\(%rip\)        # 200290 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 4c 01 20 00     jmp    \*0x20014c\(%rip\)        # 200298 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: e9 e2 ff ff ff       jmpq   140 <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: e9 e2 ff ff ff       jmp    140 <.plt>
  +[a-f0-9]+: 66 90                 xchg   %ax,%ax
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
- +[a-f0-9]+: e9 d2 ff ff ff       jmpq   140 <.plt>
+ +[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+ +[a-f0-9]+: e9 d2 ff ff ff       jmp    140 <.plt>
  +[a-f0-9]+: 66 90                 xchg   %ax,%ax
 
 Disassembly of section .plt.sec:
 
 0+170 <bar1@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: ff 25 26 01 20 00     jmpq   \*0x200126\(%rip\)        # 2002a0 <bar1>
+ +[a-f0-9]+: ff 25 26 01 20 00     jmp    \*0x200126\(%rip\)        # 2002a0 <bar1>
  +[a-f0-9]+: 66 0f 1f 44 00 00     nopw   0x0\(%rax,%rax,1\)
 
 0+180 <bar2@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: ff 25 1e 01 20 00     jmpq   \*0x20011e\(%rip\)        # 2002a8 <bar2>
+ +[a-f0-9]+: ff 25 1e 01 20 00     jmp    \*0x20011e\(%rip\)        # 2002a8 <bar2>
  +[a-f0-9]+: 66 0f 1f 44 00 00     nopw   0x0\(%rax,%rax,1\)
 
 Disassembly of section .text:
 
 0+190 <foo>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: e8 e7 ff ff ff       callq  180 <bar2@plt>
+ +[a-f0-9]+: e8 e7 ff ff ff       call   180 <bar2@plt>
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: e9 ce ff ff ff       jmpq   170 <bar1@plt>
+ +[a-f0-9]+: e9 ce ff ff ff       jmp    170 <bar1@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/ibt-plt-3a.d
+++ b/ld/testsuite/ld-x86-64/ibt-plt-3a.d
@@ -9,35 +9,35 @@
 Disassembly of section .plt:
 
 0+1f0 <.plt>:
- +[a-f0-9]+: ff 35 ca 01 20 00     pushq  0x2001ca\(%rip\)        # 2003c0 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 cb 01 20 00 bnd jmpq \*0x2001cb\(%rip\)        # 2003c8 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 ca 01 20 00     push   0x2001ca\(%rip\)        # 2003c0 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 cb 01 20 00 bnd jmp \*0x2001cb\(%rip\)        # 2003c8 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: f2 e9 e1 ff ff ff     bnd jmpq 1f0 <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: f2 e9 e1 ff ff ff     bnd jmp 1f0 <.plt>
  +[a-f0-9]+: 90                   nop
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
- +[a-f0-9]+: f2 e9 d1 ff ff ff     bnd jmpq 1f0 <.plt>
+ +[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+ +[a-f0-9]+: f2 e9 d1 ff ff ff     bnd jmp 1f0 <.plt>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .plt.sec:
 
 0+220 <bar1@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: f2 ff 25 a5 01 20 00 bnd jmpq \*0x2001a5\(%rip\)        # 2003d0 <bar1>
+ +[a-f0-9]+: f2 ff 25 a5 01 20 00 bnd jmp \*0x2001a5\(%rip\)        # 2003d0 <bar1>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 0+230 <bar2@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: f2 ff 25 9d 01 20 00 bnd jmpq \*0x20019d\(%rip\)        # 2003d8 <bar2>
+ +[a-f0-9]+: f2 ff 25 9d 01 20 00 bnd jmp \*0x20019d\(%rip\)        # 2003d8 <bar2>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .text:
 
 0+240 <foo>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: e8 e7 ff ff ff       callq  230 <bar2@plt>
+ +[a-f0-9]+: e8 e7 ff ff ff       call   230 <bar2@plt>
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: e9 ce ff ff ff       jmpq   220 <bar1@plt>
+ +[a-f0-9]+: e9 ce ff ff ff       jmp    220 <bar1@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/ibt-plt-3c-x32.d
+++ b/ld/testsuite/ld-x86-64/ibt-plt-3c-x32.d
@@ -9,35 +9,35 @@
 Disassembly of section .plt:
 
 [a-f0-9]+ <.plt>:
- +[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+pushq  0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq   \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+push   0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp    \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: e9 e2 ff ff ff       jmpq   [a-f0-9]+ <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: e9 e2 ff ff ff       jmp    [a-f0-9]+ <.plt>
  +[a-f0-9]+: 66 90                 xchg   %ax,%ax
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
- +[a-f0-9]+: e9 d2 ff ff ff       jmpq   [a-f0-9]+ <.plt>
+ +[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+ +[a-f0-9]+: e9 d2 ff ff ff       jmp    [a-f0-9]+ <.plt>
  +[a-f0-9]+: 66 90                 xchg   %ax,%ax
 
 Disassembly of section .plt.sec:
 
 [a-f0-9]+ <bar1@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq   \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar1>
+ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp    \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar1>
  +[a-f0-9]+: 66 0f 1f 44 00 00     nopw   0x0\(%rax,%rax,1\)
 
 [a-f0-9]+ <bar2@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq   \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar2>
+ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp    \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar2>
  +[a-f0-9]+: 66 0f 1f 44 00 00     nopw   0x0\(%rax,%rax,1\)
 
 Disassembly of section .text:
 
 [a-f0-9]+ <foo>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: e8 e7 ff ff ff       callq  [a-f0-9]+ <bar2@plt>
+ +[a-f0-9]+: e8 e7 ff ff ff       call   [a-f0-9]+ <bar2@plt>
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: e9 ce ff ff ff       jmpq   [a-f0-9]+ <bar1@plt>
+ +[a-f0-9]+: e9 ce ff ff ff       jmp    [a-f0-9]+ <bar1@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/ibt-plt-3c.d
+++ b/ld/testsuite/ld-x86-64/ibt-plt-3c.d
@@ -9,35 +9,35 @@
 Disassembly of section .plt:
 
 [a-f0-9]+ <.plt>:
- +[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+pushq  0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmpq \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+push   0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: f2 e9 e1 ff ff ff     bnd jmpq [a-f0-9]+ <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: f2 e9 e1 ff ff ff     bnd jmp [a-f0-9]+ <.plt>
  +[a-f0-9]+: 90                   nop
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
- +[a-f0-9]+: f2 e9 d1 ff ff ff     bnd jmpq [a-f0-9]+ <.plt>
+ +[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+ +[a-f0-9]+: f2 e9 d1 ff ff ff     bnd jmp [a-f0-9]+ <.plt>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .plt.sec:
 
 [a-f0-9]+ <bar1@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmpq \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar1>
+ +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar1>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 [a-f0-9]+ <bar2@plt>:
  +[a-f0-9]+: f3 0f 1e fa           endbr64
- +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmpq \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar2>
+ +[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar2>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .text:
 
 [a-f0-9]+ <foo>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: e8 e7 ff ff ff       callq  [a-f0-9]+ <bar2@plt>
+ +[a-f0-9]+: e8 e7 ff ff ff       call   [a-f0-9]+ <bar2@plt>
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: e9 ce ff ff ff       jmpq   [a-f0-9]+ <bar1@plt>
+ +[a-f0-9]+: e9 ce ff ff ff       jmp    [a-f0-9]+ <bar1@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/libno-plt-1b.dd
+++ b/ld/testsuite/ld-x86-64/libno-plt-1b.dd
@@ -8,8 +8,8 @@ Disassembly of section .text:
 #...
 [0-9a-f]+ <get_func>:
  +[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov    0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*>
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 #...
 [0-9a-f]+ <call_func>:
- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp    \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
 #pass
--- a/ld/testsuite/ld-x86-64/mpx3.dd
+++ b/ld/testsuite/ld-x86-64/mpx3.dd
@@ -4,25 +4,25 @@
 Disassembly of section .plt:
 
 0+[a-f0-9]+ <.plt>:
-[   ]*[a-f0-9]+: ff ([0-9a-f]{2} ){5}   pushq  0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
-[   ]*[a-f0-9]+: f2 ff ([0-9a-f]{2} ){5} bnd jmpq \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
+[   ]*[a-f0-9]+: ff ([0-9a-f]{2} ){5}   push   0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
+[   ]*[a-f0-9]+: f2 ff ([0-9a-f]{2} ){5} bnd jmp \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
 [   ]*[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
-[   ]*[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
-[   ]*[a-f0-9]+: f2 e9 ([0-9a-f]{2} ){4}   bnd jmpq [a-f0-9]+ <.plt>
+[   ]*[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+[   ]*[a-f0-9]+: f2 e9 ([0-9a-f]{2} ){4}   bnd jmp [a-f0-9]+ <.plt>
 [   ]*[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .plt.sec:
 
 0+[a-f0-9]+ <call1@plt>:
-[   ]*[a-f0-9]+: f2 ff ([0-9a-f]{2} ){5} bnd jmpq \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <call1>
+[   ]*[a-f0-9]+: f2 ff ([0-9a-f]{2} ){5} bnd jmp \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <call1>
 [   ]*[a-f0-9]+: 90                   nop
 
 Disassembly of section .text:
 
 0+[a-f0-9]+ <_start>:
 [   ]*[a-f0-9]+: bf ([0-9a-f]{2} ){4}       mov    \$0x[a-f0-9]+,%edi
-[   ]*[a-f0-9]+: f2 ff d7             bnd callq \*%rdi
+[   ]*[a-f0-9]+: f2 ff d7             bnd call \*%rdi
 [   ]*[a-f0-9]+: 48 8b ([0-9a-f]{2} ){5} mov    0x[a-f0-9]+\(%rip\),%rdi        # [a-f0-9]+ <call2>
-[   ]*[a-f0-9]+: f2 ff d7             bnd callq \*%rdi
-[   ]*[a-f0-9]+: c3                   retq  
+[   ]*[a-f0-9]+: f2 ff d7             bnd call \*%rdi
+[   ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/mpx3n.dd
+++ b/ld/testsuite/ld-x86-64/mpx3n.dd
@@ -4,25 +4,25 @@
 Disassembly of section .plt:
 
 0+400220 <.plt>:
- +[a-f0-9]+: ff 35 a2 01 20 00     pushq  0x2001a2\(%rip\)        # 6003c8 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 a3 01 20 00 bnd jmpq \*0x2001a3\(%rip\)        # 6003d0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 a2 01 20 00     push   0x2001a2\(%rip\)        # 6003c8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 a3 01 20 00 bnd jmp \*0x2001a3\(%rip\)        # 6003d0 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmpq 400220 <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmp 400220 <.plt>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .plt.sec:
 
 0+400240 <call1@plt>:
- +[a-f0-9]+: f2 ff 25 91 01 20 00 bnd jmpq \*0x200191\(%rip\)        # 6003d8 <call1>
+ +[a-f0-9]+: f2 ff 25 91 01 20 00 bnd jmp \*0x200191\(%rip\)        # 6003d8 <call1>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .text:
 
 0+400248 <_start>:
  +[a-f0-9]+: bf 40 02 40 00       mov    \$0x400240,%edi
- +[a-f0-9]+: f2 ff d7             bnd callq \*%rdi
+ +[a-f0-9]+: f2 ff d7             bnd call \*%rdi
  +[a-f0-9]+: 48 8b 3d 89 01 20 00 mov    0x200189\(%rip\),%rdi        # 6003e0 <call2>
- +[a-f0-9]+: f2 ff d7             bnd callq \*%rdi
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: f2 ff d7             bnd call \*%rdi
+ +[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/mpx4.dd
+++ b/ld/testsuite/ld-x86-64/mpx4.dd
@@ -4,21 +4,21 @@
 Disassembly of section .plt:
 
 0+4001f0 <.plt>:
- +[a-f0-9]+: ff 35 42 01 20 00     pushq  0x200142\(%rip\)        # 600338 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 43 01 20 00 bnd jmpq \*0x200143\(%rip\)        # 600340 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 42 01 20 00     push   0x200142\(%rip\)        # 600338 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 43 01 20 00 bnd jmp \*0x200143\(%rip\)        # 600340 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmpq 4001f0 <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmp 4001f0 <.plt>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .plt.sec:
 
 0+400210 <call1@plt>:
- +[a-f0-9]+: f2 ff 25 31 01 20 00 bnd jmpq \*0x200131\(%rip\)        # 600348 <call1>
+ +[a-f0-9]+: f2 ff 25 31 01 20 00 bnd jmp \*0x200131\(%rip\)        # 600348 <call1>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .text:
 
 0+400218 <_start>:
  +[a-f0-9]+: bf 10 02 40 00       mov    \$0x400210,%edi
- +[a-f0-9]+: f2 ff d7             bnd callq \*%rdi
+ +[a-f0-9]+: f2 ff d7             bnd call \*%rdi
--- a/ld/testsuite/ld-x86-64/mpx4n.dd
+++ b/ld/testsuite/ld-x86-64/mpx4n.dd
@@ -4,22 +4,22 @@
 Disassembly of section .plt:
 
 0+4001f0 <.plt>:
- +[a-f0-9]+: ff 35 62 01 20 00     pushq  0x200162\(%rip\)        # 600358 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 63 01 20 00 bnd jmpq \*0x200163\(%rip\)        # 600360 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 62 01 20 00     push   0x200162\(%rip\)        # 600358 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 63 01 20 00 bnd jmp \*0x200163\(%rip\)        # 600360 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmpq 4001f0 <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmp 4001f0 <.plt>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .plt.sec:
 
 0+400210 <call1@plt>:
- +[a-f0-9]+: f2 ff 25 51 01 20 00 bnd jmpq \*0x200151\(%rip\)        # 600368 <call1>
+ +[a-f0-9]+: f2 ff 25 51 01 20 00 bnd jmp \*0x200151\(%rip\)        # 600368 <call1>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .text:
 
 0+400218 <_start>:
  +[a-f0-9]+: bf 10 02 40 00       mov    \$0x400210,%edi
- +[a-f0-9]+: f2 ff d7             bnd callq \*%rdi
+ +[a-f0-9]+: f2 ff d7             bnd call \*%rdi
 #pass
--- a/ld/testsuite/ld-x86-64/no-plt-1a.dd
+++ b/ld/testsuite/ld-x86-64/no-plt-1a.dd
@@ -8,27 +8,27 @@ Disassembly of section .text:
 #...
 [0-9a-f]+ <check>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <get_func>
+ +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 call [0-9a-f]+ <get_func>
  +[a-f0-9]+: 48 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp    \$0x[0-9a-f]+,%rax
  +[a-f0-9]+: 75 34                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
  +[a-f0-9]+: 4(0|8) 39 05 ([0-9a-f]{2} ){4}[ ]+(rex |)cmp +%(e|r)ax,0x[0-9a-f]+\(%rip\) +# [a-f0-9]+ <func_p>
  +[a-f0-9]+: 75 2b                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
- +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <func>
+ +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 call [0-9a-f]+ <func>
  +[a-f0-9]+: 3d 78 56 34 12       cmp    \$0x12345678,%eax
  +[a-f0-9]+: 75 1e                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
- +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <call_func>
+ +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 call [0-9a-f]+ <call_func>
  +[a-f0-9]+: 3d 78 56 34 12       cmp    \$0x12345678,%eax
  +[a-f0-9]+: 75 11                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
  +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea    0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.*
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq  \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp    \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
 #...
 [0-9a-f]+ <get_func>:
  +[a-f0-9]+: 4(0|8) c7 c0 ([0-9a-f]{2} ){4}[ ]+(rex |)mov +\$0x[0-9a-f]+,%(e|r)ax
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 #...
 [0-9a-f]+ <call_func>:
- +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmpq   [a-f0-9]+ <func>
+ +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmp    [a-f0-9]+ <func>
  +[a-f0-9]+: 90                   nop
 #pass
--- a/ld/testsuite/ld-x86-64/no-plt-1b.dd
+++ b/ld/testsuite/ld-x86-64/no-plt-1b.dd
@@ -8,19 +8,19 @@ Disassembly of section .text:
 #...
 [0-9a-f]+ <check>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq  \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
  +[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp    0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*>
  +[a-f0-9]+: 75 34                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
  +[a-f0-9]+: 4(0|8) 39 05 ([0-9a-f]{2} ){4}[ ]+(rex |)cmp +%(e|r)ax,0x[0-9a-f]+\(%rip\) +# [a-f0-9]+ <.*>
  +[a-f0-9]+: 75 2b                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq  \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
  +[a-f0-9]+: 3d 78 56 34 12       cmp    \$0x12345678,%eax
  +[a-f0-9]+: 75 1e                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq  \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
  +[a-f0-9]+: 3d 78 56 34 12       cmp    \$0x12345678,%eax
  +[a-f0-9]+: 75 11                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
  +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea    0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.*
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq  \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp    \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
 #pass
--- a/ld/testsuite/ld-x86-64/no-plt-1c.dd
+++ b/ld/testsuite/ld-x86-64/no-plt-1c.dd
@@ -8,19 +8,19 @@ Disassembly of section .text:
 #...
 [0-9a-f]+ <check>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq  \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
  +[a-f0-9]+: 48 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp    \$0x[0-9a-f]+,%rax
  +[a-f0-9]+: 75 34                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
  +[a-f0-9]+: 4(0|8) 39 05 ([0-9a-f]{2} ){4}[ ]+(rex |)cmp +%(e|r)ax,0x[0-9a-f]+\(%rip\) +# [a-f0-9]+ <.*>
  +[a-f0-9]+: 75 2b                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
- +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <func>
+ +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 call [0-9a-f]+ <func>
  +[a-f0-9]+: 3d 78 56 34 12       cmp    \$0x12345678,%eax
  +[a-f0-9]+: 75 1e                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq  \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
  +[a-f0-9]+: 3d 78 56 34 12       cmp    \$0x12345678,%eax
  +[a-f0-9]+: 75 11                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
  +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea    0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.*
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq  \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp    \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
 #pass
--- a/ld/testsuite/ld-x86-64/no-plt-1d.dd
+++ b/ld/testsuite/ld-x86-64/no-plt-1d.dd
@@ -8,28 +8,28 @@ Disassembly of section .text:
 #...
 [0-9a-f]+ <check>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <get_func>
+ +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 call [0-9a-f]+ <get_func>
  +[a-f0-9]+: 48 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp    \$0x[0-9a-f]+,%rax
  +[a-f0-9]+: 75 34                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
  +[a-f0-9]+: 4(0|8) 39 05 ([0-9a-f]{2} ){4}[ ]+(rex |)cmp +%(e|r)ax,0x[0-9a-f]+\(%rip\) +# [a-f0-9]+ <func_p>
  +[a-f0-9]+: 75 2b                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
- +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <func>
+ +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 call [0-9a-f]+ <func>
  +[a-f0-9]+: 3d 78 56 34 12       cmp    \$0x12345678,%eax
  +[a-f0-9]+: 75 1e                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
- +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <call_func>
+ +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 call [0-9a-f]+ <call_func>
  +[a-f0-9]+: 3d 78 56 34 12       cmp    \$0x12345678,%eax
  +[a-f0-9]+: 75 11                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
  +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea    0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.*
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmpq   [a-f0-9]+ <.*puts.*>
+ +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmp    [a-f0-9]+ <.*puts.*>
  +[a-f0-9]+: 90                   nop
- +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <abort>
+ +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 call [0-9a-f]+ <abort>
 #...
 [0-9a-f]+ <get_func>:
  +[a-f0-9]+: 4(0|8) c7 c0 ([0-9a-f]{2} ){4}[ ]+(rex |)mov +\$0x[0-9a-f]+,%(e|r)ax
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 #...
 [0-9a-f]+ <call_func>:
- +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmpq   [a-f0-9]+ <func>
+ +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmp    [a-f0-9]+ <func>
  +[a-f0-9]+: 90                   nop
 #pass
--- a/ld/testsuite/ld-x86-64/no-plt-1e.dd
+++ b/ld/testsuite/ld-x86-64/no-plt-1e.dd
@@ -8,27 +8,27 @@ Disassembly of section .text:
 #...
 [0-9a-f]+ <check>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <get_func>
+ +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 call [0-9a-f]+ <get_func>
  +[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp    0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*>
  +[a-f0-9]+: 75 34                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
  +[a-f0-9]+: 4(0|8) 39 05 ([0-9a-f]{2} ){4}[ ]+(rex |)cmp +%(e|r)ax,0x[0-9a-f]+\(%rip\) +# [a-f0-9]+ <func_p>
  +[a-f0-9]+: 75 2b                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
- +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <func>
+ +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 call [0-9a-f]+ <func>
  +[a-f0-9]+: 3d 78 56 34 12       cmp    \$0x12345678,%eax
  +[a-f0-9]+: 75 1e                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
- +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <call_func>
+ +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 call [0-9a-f]+ <call_func>
  +[a-f0-9]+: 3d 78 56 34 12       cmp    \$0x12345678,%eax
  +[a-f0-9]+: 75 11                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
  +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea    0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.*
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq  \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp    \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
 #...
 [0-9a-f]+ <get_func>:
  +[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea    -0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <func>
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 #...
 [0-9a-f]+ <call_func>:
- +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmpq   [a-f0-9]+ <func>
+ +[a-f0-9]+: e9 ([0-9a-f]{2} ){4}[ ]+jmp    [a-f0-9]+ <func>
  +[a-f0-9]+: 90                   nop
 #pass
--- a/ld/testsuite/ld-x86-64/no-plt-1f.dd
+++ b/ld/testsuite/ld-x86-64/no-plt-1f.dd
@@ -8,19 +8,19 @@ Disassembly of section .text:
 #...
 [0-9a-f]+ <check>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq  \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
  +[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp    0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*>
  +[a-f0-9]+: 75 34                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
  +[a-f0-9]+: 4(0|8) 39 05 ([0-9a-f]{2} ){4}[ ]+(rex |)cmp +%(e|r)ax,0x[0-9a-f]+\(%rip\) +# [a-f0-9]+ <.*>
  +[a-f0-9]+: 75 2b                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq  \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
  +[a-f0-9]+: 3d 78 56 34 12       cmp    \$0x12345678,%eax
  +[a-f0-9]+: 75 1e                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq  \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
  +[a-f0-9]+: 3d 78 56 34 12       cmp    \$0x12345678,%eax
  +[a-f0-9]+: 75 11                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
  +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea    0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.*
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq  \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp    \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
 #pass
--- a/ld/testsuite/ld-x86-64/no-plt-1g.dd
+++ b/ld/testsuite/ld-x86-64/no-plt-1g.dd
@@ -8,19 +8,19 @@ Disassembly of section .text:
 #...
 [0-9a-f]+ <check>:
  +[a-f0-9]+: 48 83 ec 08           sub    \$0x8,%rsp
- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq  \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
  +[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp    0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*>
  +[a-f0-9]+: 75 34                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
  +[a-f0-9]+: 4(0|8) 39 05 ([0-9a-f]{2} ){4}[ ]+(rex |)cmp +%(e|r)ax,0x[0-9a-f]+\(%rip\) +# [a-f0-9]+ <.*>
  +[a-f0-9]+: 75 2b                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
- +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ <func>
+ +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 call [0-9a-f]+ <func>
  +[a-f0-9]+: 3d 78 56 34 12       cmp    \$0x12345678,%eax
  +[a-f0-9]+: 75 1e                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq  \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
  +[a-f0-9]+: 3d 78 56 34 12       cmp    \$0x12345678,%eax
  +[a-f0-9]+: 75 11                 jne    [0-9a-f]+ <check\+0x[0-9a-f]+>
  +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea    0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.*
  +[a-f0-9]+: 48 83 c4 08           add    \$0x8,%rsp
- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq  \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp    \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+call   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
 #pass
--- a/ld/testsuite/ld-x86-64/plt-main-bnd.dd
+++ b/ld/testsuite/ld-x86-64/plt-main-bnd.dd
@@ -2,6 +2,6 @@
 Disassembly of section .plt.got:
 
 [a-f0-9]+ <[a-z_]+@plt>:
-[ ]*[a-f0-9]+: f2 ff 25 .. .. 20 00 bnd jmpq \*0x20....\(%rip\)        # ...... <.*>
+[ ]*[a-f0-9]+: f2 ff 25 .. .. 20 00 bnd jmp \*0x20....\(%rip\)        # ...... <.*>
 [ ]*[a-f0-9]+: 90                   nop
 #pass
--- a/ld/testsuite/ld-x86-64/plt-main-ibt-x32.dd
+++ b/ld/testsuite/ld-x86-64/plt-main-ibt-x32.dd
@@ -3,5 +3,5 @@ Disassembly of section .plt.got:
 
 [a-f0-9]+ <[_a-z]+@plt>:
 [ ]*[a-f0-9]+: f3 0f 1e fa           endbr64
-[ ]*[a-f0-9]+: ff 25 .. .. 20 00     jmpq +\*0x20....\(%rip\)        # ...... <.*>
+[ ]*[a-f0-9]+: ff 25 .. .. 20 00     jmp +\*0x20....\(%rip\)        # ...... <.*>
 #pass
--- a/ld/testsuite/ld-x86-64/plt-main-ibt.dd
+++ b/ld/testsuite/ld-x86-64/plt-main-ibt.dd
@@ -3,5 +3,5 @@ Disassembly of section .plt.got:
 
 [a-f0-9]+ <[_a-z]+@plt>:
 [ ]*[a-f0-9]+: f3 0f 1e fa           endbr64
-[ ]*[a-f0-9]+: f2 ff 25 .. .. 20 00 bnd jmpq \*0x20....\(%rip\)        # ...... <.*>
+[ ]*[a-f0-9]+: f2 ff 25 .. .. 20 00 bnd jmp \*0x20....\(%rip\)        # ...... <.*>
 #pass
--- a/ld/testsuite/ld-x86-64/plt.pd
+++ b/ld/testsuite/ld-x86-64/plt.pd
@@ -9,16 +9,16 @@
 Disassembly of section .plt:
 
 [0-9a-f]+ <.plt>:
- +[0-9a-f]+: ff 35 ([0-9a-f]{2} ){4} * pushq  0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmpq   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[0-9a-f]+: ff 35 ([0-9a-f]{2} ){4} * push   0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmp    \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[0-9a-f]+: 0f 1f 40 00           nopl   0x0\(%rax\)
 
 [0-9a-f]+ <fn1@plt>:
- +[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmpq   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <fn1>
- +[0-9a-f]+: 68 00 00 00 00       pushq  \$0x0
- +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmpq   [0-9a-f]+ <.plt>
+ +[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmp    \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <fn1>
+ +[0-9a-f]+: 68 00 00 00 00       push   \$0x0
+ +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp    [0-9a-f]+ <.plt>
 
 [0-9a-f]+ <fn2@plt>:
- +[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmpq   \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <fn2>
- +[0-9a-f]+: 68 01 00 00 00       pushq  \$0x1
- +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmpq   [0-9a-f]+ <.plt>
+ +[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmp    \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <fn2>
+ +[0-9a-f]+: 68 01 00 00 00       push   \$0x1
+ +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp    [0-9a-f]+ <.plt>
--- a/ld/testsuite/ld-x86-64/plt2.dd
+++ b/ld/testsuite/ld-x86-64/plt2.dd
@@ -10,24 +10,24 @@
 Disassembly of section .plt:
 
 0+400220 <.plt>:
- +[a-f0-9]+: ff 35 7a 01 20 00     pushq  0x20017a\(%rip\)        # 6003a0 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 7c 01 20 00     jmpq   \*0x20017c\(%rip\)        # 6003a8 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 7a 01 20 00     push   0x20017a\(%rip\)        # 6003a0 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 7c 01 20 00     jmp    \*0x20017c\(%rip\)        # 6003a8 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
 
 0+400230 <fn1@plt>:
- +[a-f0-9]+: ff 25 7a 01 20 00     jmpq   \*0x20017a\(%rip\)        # 6003b0 <fn1>
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: e9 e0 ff ff ff       jmpq   400220 <.plt>
+ +[a-f0-9]+: ff 25 7a 01 20 00     jmp    \*0x20017a\(%rip\)        # 6003b0 <fn1>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: e9 e0 ff ff ff       jmp    400220 <.plt>
 
 0+400240 <fn2@plt>:
- +[a-f0-9]+: ff 25 72 01 20 00     jmpq   \*0x200172\(%rip\)        # 6003b8 <fn2>
- +[a-f0-9]+: 68 01 00 00 00       pushq  \$0x1
- +[a-f0-9]+: e9 d0 ff ff ff       jmpq   400220 <.plt>
+ +[a-f0-9]+: ff 25 72 01 20 00     jmp    \*0x200172\(%rip\)        # 6003b8 <fn2>
+ +[a-f0-9]+: 68 01 00 00 00       push   \$0x1
+ +[a-f0-9]+: e9 d0 ff ff ff       jmp    400220 <.plt>
 
 Disassembly of section .text:
 
 0+400250 <_start>:
- +[a-f0-9]+: e8 db ff ff ff       callq  400230 <fn1@plt>
- +[a-f0-9]+: e8 e6 ff ff ff       callq  400240 <fn2@plt>
+ +[a-f0-9]+: e8 db ff ff ff       call   400230 <fn1@plt>
+ +[a-f0-9]+: e8 e6 ff ff ff       call   400240 <fn2@plt>
  +[a-f0-9]+: 81 7c 24 08 30 02 40 00 cmpl   \$0x400230,0x8\(%rsp\)
 #pass
--- a/ld/testsuite/ld-x86-64/pr19609-5a.d
+++ b/ld/testsuite/ld-x86-64/pr19609-5a.d
@@ -9,4 +9,4 @@
 Disassembly of section .text:
 
 [a-f0-9]+ <_start>:
-[ ]+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq 0 <_start-0x[0-9a-f]+>
+[ ]+[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 call 0 <_start-0x[0-9a-f]+>
--- a/ld/testsuite/ld-x86-64/pr19609-5b.d
+++ b/ld/testsuite/ld-x86-64/pr19609-5b.d
@@ -9,4 +9,4 @@
 Disassembly of section .text:
 
 [a-f0-9]+ <_start>:
-[ ]+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq  \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <.*>
+[ ]+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * call   \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <.*>
--- a/ld/testsuite/ld-x86-64/pr19609-5c.d
+++ b/ld/testsuite/ld-x86-64/pr19609-5c.d
@@ -9,4 +9,4 @@
 Disassembly of section .text:
 
 [a-f0-9]+ <_start>:
-[ ]+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq  \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar>
+[ ]+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * call   \*0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <bar>
--- a/ld/testsuite/ld-x86-64/pr19609-5e.d
+++ b/ld/testsuite/ld-x86-64/pr19609-5e.d
@@ -9,4 +9,4 @@
 Disassembly of section .text:
 
 [a-f0-9]+ <_start>:
-[ ]+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq  \*-?0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <.*>
+[ ]+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * call   \*-?0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <.*>
--- a/ld/testsuite/ld-x86-64/pr19609-7b.d
+++ b/ld/testsuite/ld-x86-64/pr19609-7b.d
@@ -9,5 +9,5 @@
 Disassembly of section .text:
 
 [a-f0-9]+ <_start>:
-[ ]*[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq  \*-?0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <.got>
+[ ]*[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * call   \*-?0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <.got>
 #pass
--- a/ld/testsuite/ld-x86-64/pr19609-7d.d
+++ b/ld/testsuite/ld-x86-64/pr19609-7d.d
@@ -9,5 +9,5 @@
 Disassembly of section .text:
 
 [a-f0-9]+ <_start>:
-[ ]*[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq  \*-?0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <.got>
+[ ]*[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * call   \*-?0x[a-f0-9]+\(%rip\)        # [a-f0-9]+ <.got>
 #pass
--- a/ld/testsuite/ld-x86-64/pr19636-2d.d
+++ b/ld/testsuite/ld-x86-64/pr19636-2d.d
@@ -9,16 +9,16 @@
 Disassembly of section .plt:
 
 0+120 <.plt>:
-[ ]*[a-f0-9]+: ff 35 2a 01 20 00     pushq  0x20012a\(%rip\)        # 200250 <_GLOBAL_OFFSET_TABLE_\+0x8>
-[ ]*[a-f0-9]+: ff 25 2c 01 20 00     jmpq   \*0x20012c\(%rip\)        # 200258 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[ ]*[a-f0-9]+: ff 35 2a 01 20 00     push   0x20012a\(%rip\)        # 200250 <_GLOBAL_OFFSET_TABLE_\+0x8>
+[ ]*[a-f0-9]+: ff 25 2c 01 20 00     jmp    \*0x20012c\(%rip\)        # 200258 <_GLOBAL_OFFSET_TABLE_\+0x10>
 [ ]*[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
-[ ]*[a-f0-9]+: ff 25 2a 01 20 00     jmpq   \*0x20012a\(%rip\)        # 200260 <_GLOBAL_OFFSET_TABLE_\+0x18>
-[ ]*[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0+
-[ ]*[a-f0-9]+: e9 00 00 00 00       jmpq   [a-f0-9]+ <.*>
+[ ]*[a-f0-9]+: ff 25 2a 01 20 00     jmp    \*0x20012a\(%rip\)        # 200260 <_GLOBAL_OFFSET_TABLE_\+0x18>
+[ ]*[a-f0-9]+: 68 00 00 00 00       push   \$0x0+
+[ ]*[a-f0-9]+: e9 00 00 00 00       jmp    [a-f0-9]+ <.*>
 
 Disassembly of section .text:
 
 0+140 <_start>:
 [ ]*[a-f0-9]+: 48 3b 05 f1 00 20 00 cmp    0x2000f1\(%rip\),%rax        # 200238 <.*>
-[ ]*[a-f0-9]+: ff 25 f3 00 20 00     jmpq   \*0x2000f3\(%rip\)        # 200240 <.*>
-[ ]*[a-f0-9]+: e8 de ff ff ff       callq  130 <.*>
+[ ]*[a-f0-9]+: ff 25 f3 00 20 00     jmp    \*0x2000f3\(%rip\)        # 200240 <.*>
+[ ]*[a-f0-9]+: e8 de ff ff ff       call   130 <.*>
--- a/ld/testsuite/ld-x86-64/pr19636-2l.d
+++ b/ld/testsuite/ld-x86-64/pr19636-2l.d
@@ -10,17 +10,17 @@
 Disassembly of section .plt:
 
 0+120 <.plt>:
- +[a-f0-9]+: ff 35 2a 01 20 00     pushq  0x20012a\(%rip\)        # 200250 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 2c 01 20 00     jmpq   \*0x20012c\(%rip\)        # 200258 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 2a 01 20 00     push   0x20012a\(%rip\)        # 200250 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 2c 01 20 00     jmp    \*0x20012c\(%rip\)        # 200258 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
- +[a-f0-9]+: ff 25 2a 01 20 00     jmpq   \*0x20012a\(%rip\)        # 200260 <_GLOBAL_OFFSET_TABLE_\+0x18>
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: e9 00 00 00 00       jmpq   140 <_start>
+ +[a-f0-9]+: ff 25 2a 01 20 00     jmp    \*0x20012a\(%rip\)        # 200260 <_GLOBAL_OFFSET_TABLE_\+0x18>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: e9 00 00 00 00       jmp    140 <_start>
 
 Disassembly of section .text:
 
 0+140 <_start>:
  +[a-f0-9]+: 48 3b 05 f1 00 20 00 cmp    0x2000f1\(%rip\),%rax        # 200238 <.got>
- +[a-f0-9]+: ff 25 f3 00 20 00     jmpq   \*0x2000f3\(%rip\)        # 200240 <.got\+0x8>
- +[a-f0-9]+: e8 de ff ff ff       callq  130 <.plt\+0x10>
+ +[a-f0-9]+: ff 25 f3 00 20 00     jmp    \*0x2000f3\(%rip\)        # 200240 <.got\+0x8>
+ +[a-f0-9]+: e8 de ff ff ff       call   130 <.plt\+0x10>
 #pass
--- a/ld/testsuite/ld-x86-64/pr20253-1b.d
+++ b/ld/testsuite/ld-x86-64/pr20253-1b.d
@@ -9,14 +9,14 @@
 Disassembly of section .text:
 
 0+4000e0 <foo>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 0+4000e1 <bar>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 0+4000e2 <_start>:
- +[a-f0-9]+: ff 15 28 00 20 00     callq  \*0x200028\(%rip\)        # 600110 <.*>
- +[a-f0-9]+: ff 25 2a 00 20 00     jmpq   \*0x20002a\(%rip\)        # 600118 <.*>
+ +[a-f0-9]+: ff 15 28 00 20 00     call   \*0x200028\(%rip\)        # 600110 <.*>
+ +[a-f0-9]+: ff 25 2a 00 20 00     jmp    \*0x20002a\(%rip\)        # 600118 <.*>
  +[a-f0-9]+: 48 c7 05 1f 00 20 00 00 00 00 00 movq   \$0x0,0x20001f\(%rip\)        # 600118 <.*>
  +[a-f0-9]+: 48 83 3d 0f 00 20 00 00 cmpq   \$0x0,0x20000f\(%rip\)        # 600110 <.*>
  +[a-f0-9]+: 48 3b 0d 08 00 20 00 cmp    0x200008\(%rip\),%rcx        # 600110 <.*>
--- a/ld/testsuite/ld-x86-64/pr20253-1d.d
+++ b/ld/testsuite/ld-x86-64/pr20253-1d.d
@@ -9,14 +9,14 @@
 Disassembly of section .text:
 
 0+1c8 <foo>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 0+1c9 <bar>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 0+1ca <_start>:
- +[a-f0-9]+: ff 15 28 01 20 00     callq  \*0x200128\(%rip\)        # 2002f8 <.got>
- +[a-f0-9]+: ff 25 2a 01 20 00     jmpq   \*0x20012a\(%rip\)        # 200300 <.got\+0x8>
+ +[a-f0-9]+: ff 15 28 01 20 00     call   \*0x200128\(%rip\)        # 2002f8 <.got>
+ +[a-f0-9]+: ff 25 2a 01 20 00     jmp    \*0x20012a\(%rip\)        # 200300 <.got\+0x8>
  +[a-f0-9]+: 48 c7 05 1f 01 20 00 00 00 00 00 movq   \$0x0,0x20011f\(%rip\)        # 200300 <.got\+0x8>
  +[a-f0-9]+: 48 83 3d 0f 01 20 00 00 cmpq   \$0x0,0x20010f\(%rip\)        # 2002f8 <.got>
  +[a-f0-9]+: 48 3b 0d 08 01 20 00 cmp    0x200108\(%rip\),%rcx        # 2002f8 <.got>
--- a/ld/testsuite/ld-x86-64/pr20253-1f.d
+++ b/ld/testsuite/ld-x86-64/pr20253-1f.d
@@ -9,14 +9,14 @@
 Disassembly of section .text:
 
 0+188 <foo>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 0+189 <bar>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 0+18a <_start>:
- +[a-f0-9]+: ff 15 08 01 20 00     callq  \*0x200108\(%rip\)        # 200298 <.*>
- +[a-f0-9]+: ff 25 0a 01 20 00     jmpq   \*0x20010a\(%rip\)        # 2002a0 <.*>
+ +[a-f0-9]+: ff 15 08 01 20 00     call   \*0x200108\(%rip\)        # 200298 <.*>
+ +[a-f0-9]+: ff 25 0a 01 20 00     jmp    \*0x20010a\(%rip\)        # 2002a0 <.*>
  +[a-f0-9]+: 48 c7 05 ff 00 20 00 00 00 00 00 movq   \$0x0,0x2000ff\(%rip\)        # 2002a0 <.*>
  +[a-f0-9]+: 48 83 3d ef 00 20 00 00 cmpq   \$0x0,0x2000ef\(%rip\)        # 200298 <.*>
  +[a-f0-9]+: 48 3b 0d e8 00 20 00 cmp    0x2000e8\(%rip\),%rcx        # 200298 <.*>
--- a/ld/testsuite/ld-x86-64/pr20253-1h.d
+++ b/ld/testsuite/ld-x86-64/pr20253-1h.d
@@ -9,14 +9,14 @@
 Disassembly of section .text:
 
 0+40008c <foo>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 0+40008d <bar>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 0+40008e <_start>:
- +[a-f0-9]+: ff 15 2c 00 20 00     callq  \*0x20002c\(%rip\)        # 6000c0 <.got>
- +[a-f0-9]+: ff 25 2e 00 20 00     jmpq   \*0x20002e\(%rip\)        # 6000c8 <.got\+0x8>
+ +[a-f0-9]+: ff 15 2c 00 20 00     call   \*0x20002c\(%rip\)        # 6000c0 <.got>
+ +[a-f0-9]+: ff 25 2e 00 20 00     jmp    \*0x20002e\(%rip\)        # 6000c8 <.got\+0x8>
  +[a-f0-9]+: 48 c7 05 23 00 20 00 00 00 00 00 movq   \$0x0,0x200023\(%rip\)        # 6000c8 <.got\+0x8>
  +[a-f0-9]+: 48 83 3d 13 00 20 00 00 cmpq   \$0x0,0x200013\(%rip\)        # 6000c0 <.got>
  +[a-f0-9]+: 48 3b 0d 0c 00 20 00 cmp    0x20000c\(%rip\),%rcx        # 6000c0 <.got>
--- a/ld/testsuite/ld-x86-64/pr20253-1j.d
+++ b/ld/testsuite/ld-x86-64/pr20253-1j.d
@@ -9,14 +9,14 @@
 Disassembly of section .text:
 
 0+120 <foo>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 0+121 <bar>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 0+122 <_start>:
- +[a-f0-9]+: ff 15 a8 00 20 00     callq  \*0x2000a8\(%rip\)        # 2001d0 <.*>
- +[a-f0-9]+: ff 25 aa 00 20 00     jmpq   \*0x2000aa\(%rip\)        # 2001d8 <.*>
+ +[a-f0-9]+: ff 15 a8 00 20 00     call   \*0x2000a8\(%rip\)        # 2001d0 <.*>
+ +[a-f0-9]+: ff 25 aa 00 20 00     jmp    \*0x2000aa\(%rip\)        # 2001d8 <.*>
  +[a-f0-9]+: 48 c7 05 9f 00 20 00 00 00 00 00 movq   \$0x0,0x20009f\(%rip\)        # 2001d8 <.*>
  +[a-f0-9]+: 48 83 3d 8f 00 20 00 00 cmpq   \$0x0,0x20008f\(%rip\)        # 2001d0 <.*>
  +[a-f0-9]+: 48 3b 0d 88 00 20 00 cmp    0x200088\(%rip\),%rcx        # 2001d0 <.*>
--- a/ld/testsuite/ld-x86-64/pr20253-1l.d
+++ b/ld/testsuite/ld-x86-64/pr20253-1l.d
@@ -9,14 +9,14 @@
 Disassembly of section .text:
 
 0+100 <foo>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 0+101 <bar>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 
 0+102 <_start>:
- +[a-f0-9]+: ff 15 98 00 20 00     callq  \*0x200098\(%rip\)        # 2001a0 <.*>
- +[a-f0-9]+: ff 25 9a 00 20 00     jmpq   \*0x20009a\(%rip\)        # 2001a8 <.*>
+ +[a-f0-9]+: ff 15 98 00 20 00     call   \*0x200098\(%rip\)        # 2001a0 <.*>
+ +[a-f0-9]+: ff 25 9a 00 20 00     jmp    \*0x20009a\(%rip\)        # 2001a8 <.*>
  +[a-f0-9]+: 48 c7 05 8f 00 20 00 00 00 00 00 movq   \$0x0,0x20008f\(%rip\)        # 2001a8 <.*>
  +[a-f0-9]+: 48 83 3d 7f 00 20 00 00 cmpq   \$0x0,0x20007f\(%rip\)        # 2001a0 <.*>
  +[a-f0-9]+: 48 3b 0d 78 00 20 00 cmp    0x200078\(%rip\),%rcx        # 2001a0 <.*>
--- a/ld/testsuite/ld-x86-64/pr20830a-now.d
+++ b/ld/testsuite/ld-x86-64/pr20830a-now.d
@@ -50,19 +50,19 @@ Contents of the .eh_frame section:
 Disassembly of section .plt:
 
 0+1b0 <.plt>:
- +[a-f0-9]+: ff 35 32 0e 20 00     pushq  0x200e32\(%rip\)        # 200fe8 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 34 0e 20 00     jmpq   \*0x200e34\(%rip\)        # 200ff0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 32 0e 20 00     push   0x200e32\(%rip\)        # 200fe8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 34 0e 20 00     jmp    \*0x200e34\(%rip\)        # 200ff0 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
 
 Disassembly of section .plt.got:
 
 0+1c0 <func@plt>:
- +[a-f0-9]+: ff 25 32 0e 20 00     jmpq   \*0x200e32\(%rip\)        # 200ff8 <func>
+ +[a-f0-9]+: ff 25 32 0e 20 00     jmp    \*0x200e32\(%rip\)        # 200ff8 <func>
  +[a-f0-9]+: 66 90                 xchg   %ax,%ax
 
 Disassembly of section .text:
 
 0+1c8 <foo>:
- +[a-f0-9]+: e8 f3 ff ff ff       callq  1c0 <func@plt>
+ +[a-f0-9]+: e8 f3 ff ff ff       call   1c0 <func@plt>
  +[a-f0-9]+: 48 8b 05 24 0e 20 00 mov    0x200e24\(%rip\),%rax        # 200ff8 <func>
 #pass
--- a/ld/testsuite/ld-x86-64/pr20830a.d
+++ b/ld/testsuite/ld-x86-64/pr20830a.d
@@ -50,19 +50,19 @@ Contents of the .eh_frame section:
 Disassembly of section .plt:
 
 0+1b0 <.plt>:
- +[a-f0-9]+: ff 35 52 0e 20 00     pushq  0x200e52\(%rip\)        # 201008 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 54 0e 20 00     jmpq   \*0x200e54\(%rip\)        # 201010 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 52 0e 20 00     push   0x200e52\(%rip\)        # 201008 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 54 0e 20 00     jmp    \*0x200e54\(%rip\)        # 201010 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
 
 Disassembly of section .plt.got:
 
 0+1c0 <func@plt>:
- +[a-f0-9]+: ff 25 32 0e 20 00     jmpq   \*0x200e32\(%rip\)        # 200ff8 <func>
+ +[a-f0-9]+: ff 25 32 0e 20 00     jmp    \*0x200e32\(%rip\)        # 200ff8 <func>
  +[a-f0-9]+: 66 90                 xchg   %ax,%ax
 
 Disassembly of section .text:
 
 0+1c8 <foo>:
- +[a-f0-9]+: e8 f3 ff ff ff       callq  1c0 <func@plt>
+ +[a-f0-9]+: e8 f3 ff ff ff       call   1c0 <func@plt>
  +[a-f0-9]+: 48 8b 05 24 0e 20 00 mov    0x200e24\(%rip\),%rax        # 200ff8 <func>
 #pass
--- a/ld/testsuite/ld-x86-64/pr20830b-now.d
+++ b/ld/testsuite/ld-x86-64/pr20830b-now.d
@@ -42,19 +42,19 @@ Contents of the .eh_frame section:
 Disassembly of section .plt:
 
 0+120 <.plt>:
- +[a-f0-9]+: ff 35 c2 0e 20 00     pushq  0x200ec2\(%rip\)        # 200fe8 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 c4 0e 20 00     jmpq   \*0x200ec4\(%rip\)        # 200ff0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 c2 0e 20 00     push   0x200ec2\(%rip\)        # 200fe8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 c4 0e 20 00     jmp    \*0x200ec4\(%rip\)        # 200ff0 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
 
 Disassembly of section .plt.got:
 
 0+130 <func@plt>:
- +[a-f0-9]+: ff 25 c2 0e 20 00     jmpq   \*0x200ec2\(%rip\)        # 200ff8 <func>
+ +[a-f0-9]+: ff 25 c2 0e 20 00     jmp    \*0x200ec2\(%rip\)        # 200ff8 <func>
  +[a-f0-9]+: 66 90                 xchg   %ax,%ax
 
 Disassembly of section .text:
 
 0+138 <foo>:
- +[a-f0-9]+: e8 f3 ff ff ff       callq  130 <func@plt>
+ +[a-f0-9]+: e8 f3 ff ff ff       call   130 <func@plt>
  +[a-f0-9]+: 48 8b 05 b4 0e 20 00 mov    0x200eb4\(%rip\),%rax        # 200ff8 <func>
 #pass
--- a/ld/testsuite/ld-x86-64/pr20830b.d
+++ b/ld/testsuite/ld-x86-64/pr20830b.d
@@ -42,19 +42,19 @@ Contents of the .eh_frame section:
 Disassembly of section .plt:
 
 0+120 <.plt>:
- +[a-f0-9]+: ff 35 e2 0e 20 00     pushq  0x200ee2\(%rip\)        # 201008 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: ff 25 e4 0e 20 00     jmpq   \*0x200ee4\(%rip\)        # 201010 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 e2 0e 20 00     push   0x200ee2\(%rip\)        # 201008 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: ff 25 e4 0e 20 00     jmp    \*0x200ee4\(%rip\)        # 201010 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 40 00           nopl   0x0\(%rax\)
 
 Disassembly of section .plt.got:
 
 0+130 <func@plt>:
- +[a-f0-9]+: ff 25 c2 0e 20 00     jmpq   \*0x200ec2\(%rip\)        # 200ff8 <func>
+ +[a-f0-9]+: ff 25 c2 0e 20 00     jmp    \*0x200ec2\(%rip\)        # 200ff8 <func>
  +[a-f0-9]+: 66 90                 xchg   %ax,%ax
 
 Disassembly of section .text:
 
 0+138 <foo>:
- +[a-f0-9]+: e8 f3 ff ff ff       callq  130 <func@plt>
+ +[a-f0-9]+: e8 f3 ff ff ff       call   130 <func@plt>
  +[a-f0-9]+: 48 8b 05 b4 0e 20 00 mov    0x200eb4\(%rip\),%rax        # 200ff8 <func>
 #pass
--- a/ld/testsuite/ld-x86-64/pr21038a-now.d
+++ b/ld/testsuite/ld-x86-64/pr21038a-now.d
@@ -50,19 +50,19 @@ Contents of the .eh_frame section:
 Disassembly of section .plt:
 
 0+1b0 <.plt>:
- +[a-f0-9]+: ff 35 32 0e 20 00     pushq  0x200e32\(%rip\)        # 200fe8 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 33 0e 20 00 bnd jmpq \*0x200e33\(%rip\)        # 200ff0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 32 0e 20 00     push   0x200e32\(%rip\)        # 200fe8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 33 0e 20 00 bnd jmp \*0x200e33\(%rip\)        # 200ff0 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
 
 Disassembly of section .plt.got:
 
 0+1c0 <func@plt>:
- +[a-f0-9]+: f2 ff 25 31 0e 20 00 bnd jmpq \*0x200e31\(%rip\)        # 200ff8 <func>
+ +[a-f0-9]+: f2 ff 25 31 0e 20 00 bnd jmp \*0x200e31\(%rip\)        # 200ff8 <func>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .text:
 
 0+1c8 <foo>:
- +[a-f0-9]+: e8 f3 ff ff ff       callq  1c0 <func@plt>
+ +[a-f0-9]+: e8 f3 ff ff ff       call   1c0 <func@plt>
  +[a-f0-9]+: 48 8b 05 24 0e 20 00 mov    0x200e24\(%rip\),%rax        # 200ff8 <func>
 #pass
--- a/ld/testsuite/ld-x86-64/pr21038a.d
+++ b/ld/testsuite/ld-x86-64/pr21038a.d
@@ -49,19 +49,19 @@ Contents of the .eh_frame section:
 Disassembly of section .plt:
 
 0+1b0 <.plt>:
- +[a-f0-9]+: ff 35 52 0e 20 00     pushq  0x200e52\(%rip\)        # 201008 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 53 0e 20 00 bnd jmpq \*0x200e53\(%rip\)        # 201010 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 52 0e 20 00     push   0x200e52\(%rip\)        # 201008 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 53 0e 20 00 bnd jmp \*0x200e53\(%rip\)        # 201010 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
 
 Disassembly of section .plt.got:
 
 0+1c0 <func@plt>:
- +[a-f0-9]+: f2 ff 25 31 0e 20 00 bnd jmpq \*0x200e31\(%rip\)        # 200ff8 <func>
+ +[a-f0-9]+: f2 ff 25 31 0e 20 00 bnd jmp \*0x200e31\(%rip\)        # 200ff8 <func>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .text:
 
 0+1c8 <foo>:
- +[a-f0-9]+: e8 f3 ff ff ff       callq  1c0 <func@plt>
+ +[a-f0-9]+: e8 f3 ff ff ff       call   1c0 <func@plt>
  +[a-f0-9]+: 48 8b 05 24 0e 20 00 mov    0x200e24\(%rip\),%rax        # 200ff8 <func>
 #pass
--- a/ld/testsuite/ld-x86-64/pr21038b-now.d
+++ b/ld/testsuite/ld-x86-64/pr21038b-now.d
@@ -50,21 +50,21 @@ Contents of the .eh_frame section:
 Disassembly of section .plt:
 
 0+1b0 <.plt>:
- +[a-f0-9]+: ff 35 32 0e 20 00     pushq  0x200e32\(%rip\)        # 200fe8 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 33 0e 20 00 bnd jmpq \*0x200e33\(%rip\)        # 200ff0 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 32 0e 20 00     push   0x200e32\(%rip\)        # 200fe8 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 33 0e 20 00 bnd jmp \*0x200e33\(%rip\)        # 200ff0 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmpq 1b0 <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmp 1b0 <.plt>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .plt.sec:
 
 0+1d0 <func@plt>:
- +[a-f0-9]+: f2 ff 25 21 0e 20 00 bnd jmpq \*0x200e21\(%rip\)        # 200ff8 <func>
+ +[a-f0-9]+: f2 ff 25 21 0e 20 00 bnd jmp \*0x200e21\(%rip\)        # 200ff8 <func>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .text:
 
 0+1d8 <foo>:
- +[a-f0-9]+: e8 f3 ff ff ff       callq  1d0 <func@plt>
+ +[a-f0-9]+: e8 f3 ff ff ff       call   1d0 <func@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/pr21038b.d
+++ b/ld/testsuite/ld-x86-64/pr21038b.d
@@ -49,21 +49,21 @@ Contents of the .eh_frame section:
 Disassembly of section .plt:
 
 0+1b0 <.plt>:
- +[a-f0-9]+: ff 35 52 0e 20 00     pushq  0x200e52\(%rip\)        # 201008 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 53 0e 20 00 bnd jmpq \*0x200e53\(%rip\)        # 201010 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 52 0e 20 00     push   0x200e52\(%rip\)        # 201008 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 53 0e 20 00 bnd jmp \*0x200e53\(%rip\)        # 201010 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmpq 1b0 <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmp 1b0 <.plt>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .plt.sec:
 
 0+1d0 <func@plt>:
- +[a-f0-9]+: f2 ff 25 41 0e 20 00 bnd jmpq \*0x200e41\(%rip\)        # 201018 <func>
+ +[a-f0-9]+: f2 ff 25 41 0e 20 00 bnd jmp \*0x200e41\(%rip\)        # 201018 <func>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .text:
 
 0+1d8 <foo>:
- +[a-f0-9]+: e8 f3 ff ff ff       callq  1d0 <func@plt>
+ +[a-f0-9]+: e8 f3 ff ff ff       call   1d0 <func@plt>
 #pass
--- a/ld/testsuite/ld-x86-64/pr21038c-now.d
+++ b/ld/testsuite/ld-x86-64/pr21038c-now.d
@@ -59,29 +59,29 @@ Contents of the .eh_frame section:
 Disassembly of section .plt:
 
 0+1f0 <.plt>:
- +[a-f0-9]+: ff 35 ea 0d 20 00     pushq  0x200dea\(%rip\)        # 200fe0 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 eb 0d 20 00 bnd jmpq \*0x200deb\(%rip\)        # 200fe8 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 ea 0d 20 00     push   0x200dea\(%rip\)        # 200fe0 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 eb 0d 20 00 bnd jmp \*0x200deb\(%rip\)        # 200fe8 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmpq 1f0 <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmp 1f0 <.plt>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .plt.got:
 
 0+210 <func1@plt>:
- +[a-f0-9]+: f2 ff 25 e1 0d 20 00 bnd jmpq \*0x200de1\(%rip\)        # 200ff8 <func1>
+ +[a-f0-9]+: f2 ff 25 e1 0d 20 00 bnd jmp \*0x200de1\(%rip\)        # 200ff8 <func1>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .plt.sec:
 
 0+218 <func2@plt>:
- +[a-f0-9]+: f2 ff 25 d1 0d 20 00 bnd jmpq \*0x200dd1\(%rip\)        # 200ff0 <func2>
+ +[a-f0-9]+: f2 ff 25 d1 0d 20 00 bnd jmp \*0x200dd1\(%rip\)        # 200ff0 <func2>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .text:
 
 0+220 <foo>:
- +[a-f0-9]+: e8 eb ff ff ff       callq  210 <func1@plt>
- +[a-f0-9]+: e8 ee ff ff ff       callq  218 <func2@plt>
+ +[a-f0-9]+: e8 eb ff ff ff       call   210 <func1@plt>
+ +[a-f0-9]+: e8 ee ff ff ff       call   218 <func2@plt>
  +[a-f0-9]+: 48 8b 05 c7 0d 20 00 mov    0x200dc7\(%rip\),%rax        # 200ff8 <func1>
 #pass
--- a/ld/testsuite/ld-x86-64/pr21038c.d
+++ b/ld/testsuite/ld-x86-64/pr21038c.d
@@ -58,29 +58,29 @@ Contents of the .eh_frame section:
 Disassembly of section .plt:
 
 0+1f0 <.plt>:
- +[a-f0-9]+: ff 35 12 0e 20 00     pushq  0x200e12\(%rip\)        # 201008 <_GLOBAL_OFFSET_TABLE_\+0x8>
- +[a-f0-9]+: f2 ff 25 13 0e 20 00 bnd jmpq \*0x200e13\(%rip\)        # 201010 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ +[a-f0-9]+: ff 35 12 0e 20 00     push   0x200e12\(%rip\)        # 201008 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ +[a-f0-9]+: f2 ff 25 13 0e 20 00 bnd jmp \*0x200e13\(%rip\)        # 201010 <_GLOBAL_OFFSET_TABLE_\+0x10>
  +[a-f0-9]+: 0f 1f 00             nopl   \(%rax\)
- +[a-f0-9]+: 68 00 00 00 00       pushq  \$0x0
- +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmpq 1f0 <.plt>
+ +[a-f0-9]+: 68 00 00 00 00       push   \$0x0
+ +[a-f0-9]+: f2 e9 e5 ff ff ff     bnd jmp 1f0 <.plt>
  +[a-f0-9]+: 0f 1f 44 00 00       nopl   0x0\(%rax,%rax,1\)
 
 Disassembly of section .plt.got:
 
 0+210 <func1@plt>:
- +[a-f0-9]+: f2 ff 25 e1 0d 20 00 bnd jmpq \*0x200de1\(%rip\)        # 200ff8 <func1>
+ +[a-f0-9]+: f2 ff 25 e1 0d 20 00 bnd jmp \*0x200de1\(%rip\)        # 200ff8 <func1>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .plt.sec:
 
 0+218 <func2@plt>:
- +[a-f0-9]+: f2 ff 25 f9 0d 20 00 bnd jmpq \*0x200df9\(%rip\)        # 201018 <func2>
+ +[a-f0-9]+: f2 ff 25 f9 0d 20 00 bnd jmp \*0x200df9\(%rip\)        # 201018 <func2>
  +[a-f0-9]+: 90                   nop
 
 Disassembly of section .text:
 
 0+220 <foo>:
- +[a-f0-9]+: e8 eb ff ff ff       callq  210 <func1@plt>
- +[a-f0-9]+: e8 ee ff ff ff       callq  218 <func2@plt>
+ +[a-f0-9]+: e8 eb ff ff ff       call   210 <func1@plt>
+ +[a-f0-9]+: e8 ee ff ff ff       call   218 <func2@plt>
  +[a-f0-9]+: 48 8b 05 c7 0d 20 00 mov    0x200dc7\(%rip\),%rax        # 200ff8 <func1>
 #pass
--- a/ld/testsuite/ld-x86-64/pr23930-x32.d
+++ b/ld/testsuite/ld-x86-64/pr23930-x32.d
@@ -7,5 +7,5 @@
 #...
 [a-f0-9]+ <main>:
 [a-f0-9]+: 31 c0                 xor    %eax,%eax
-[a-f0-9]+: c3                   retq  
+[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/pr23930.d
+++ b/ld/testsuite/ld-x86-64/pr23930.d
@@ -7,5 +7,5 @@
 #...
 [a-f0-9]+ <main>:
 [a-f0-9]+: 31 c0                 xor    %eax,%eax
-[a-f0-9]+: c3                   retq  
+[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/pr25416-1a.d
+++ b/ld/testsuite/ld-x86-64/pr25416-1a.d
@@ -12,5 +12,5 @@ Disassembly of section .text:
 
 [a-f0-9]+ <_start>:
  +[a-f0-9]+: 40 8d 05 ([0-9a-f]{2} ){4}[ \t]+rex lea 0x[a-f0-9]+\(%rip\),%eax[ \t]+# [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x[a-f0-9]+>
- +[a-f0-9]+: 67 ff 10             callq  \*\(%eax\)
+ +[a-f0-9]+: 67 ff 10             call   \*\(%eax\)
 #pass
--- a/ld/testsuite/ld-x86-64/pr25416-2a.d
+++ b/ld/testsuite/ld-x86-64/pr25416-2a.d
@@ -12,5 +12,5 @@ Disassembly of section .text:
 
 [a-f0-9]+ <_start>:
  +[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4}[ \t]+lea    0x[a-f0-9]+\(%rip\),%rax[ \t]+# [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x[a-f0-9]+>
- +[a-f0-9]+: ff 10                 callq  \*\(%rax\)
+ +[a-f0-9]+: ff 10                 call   \*\(%rax\)
 #pass
--- a/ld/testsuite/ld-x86-64/pr26018.d
+++ b/ld/testsuite/ld-x86-64/pr26018.d
@@ -8,8 +8,8 @@
 Disassembly of section .text:
 
 [0-9a-f]+ <_start>:
- +[a-f0-9]+: e8 00 00 00 00       callq  [0-9a-f]+ <foo>
+ +[a-f0-9]+: e8 00 00 00 00       call   [0-9a-f]+ <foo>
 
 [0-9a-f]+ <foo>:
- +[a-f0-9]+: c3                   retq  
+ +[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/protected2-k1om.d
+++ b/ld/testsuite/ld-x86-64/protected2-k1om.d
@@ -10,9 +10,9 @@
 Disassembly of section .text:
 
 0+[a-f0-9]+ <foo>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+[a-f0-9]+ <bar>:
-[ ]*[a-f0-9]+: e8 fa ff ff ff       callq  [a-f0-9]+ <foo>
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: e8 fa ff ff ff       call   [a-f0-9]+ <foo>
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/protected2-l1om.d
+++ b/ld/testsuite/ld-x86-64/protected2-l1om.d
@@ -10,9 +10,9 @@
 Disassembly of section .text:
 
 0+[a-f0-9]+ <foo>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+[a-f0-9]+ <bar>:
-[ ]*[a-f0-9]+: e8 fa ff ff ff       callq  [a-f0-9]+ <foo>
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: e8 fa ff ff ff       call   [a-f0-9]+ <foo>
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/protected2.d
+++ b/ld/testsuite/ld-x86-64/protected2.d
@@ -8,9 +8,9 @@
 Disassembly of section .text:
 
 0+[a-f0-9]+ <foo>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 0+[a-f0-9]+ <bar>:
-[ ]*[a-f0-9]+: e8 fa ff ff ff       callq  [a-f0-9]+ <foo>
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: e8 fa ff ff ff       call   [a-f0-9]+ <foo>
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/protected3.d
+++ b/ld/testsuite/ld-x86-64/protected3.d
@@ -10,5 +10,5 @@ Disassembly of section .text:
 0+[a-f0-9]+ <bar>:
 [ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov    0x[a-f0-9]+\(%rip\),%rax        # [a-f0-9]+ <.*>
 [ ]*[a-f0-9]+: 8b 00                 mov    \(%rax\),%eax
-[ ]*[a-f0-9]+: c3                   retq *
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/protected8.d
+++ b/ld/testsuite/ld-x86-64/protected8.d
@@ -9,5 +9,5 @@ Disassembly of section .text:
 
 0+[a-f0-9]+ <bar>:
 [ ]*[a-f0-9]+: 8b 05 ([0-9a-f]{2} ){4} * mov    0x[a-f0-9]+\(%rip\),%eax        # [a-f0-9]+ <foo>
-[ ]*[a-f0-9]+: c3                   retq *
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/tlsbin.dd
+++ b/ld/testsuite/ld-x86-64/tlsbin.dd
@@ -172,8 +172,8 @@ Disassembly of section .text:
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
- +[0-9a-f]+: c9[ ]+leaveq *
- +[0-9a-f]+: c3[ ]+retq *
+ +[0-9a-f]+: c9[ ]+leave *
+ +[0-9a-f]+: c3[ ]+ret *
 
 [0-9a-f]+ <_start>:
  +[0-9a-f]+: 55[ ]+push   %rbp
@@ -306,5 +306,5 @@ Disassembly of section .text:
 #  LE, large model
  +[0-9a-f]+: 48 ba a5 ff ff ff ff[ ]+movabs \$0xffffffffffffffa5,%rdx
  +[0-9a-f]+: ff ff ff *
- +[0-9a-f]+: c9[ ]+leaveq *
- +[0-9a-f]+: c3[ ]+retq *
+ +[0-9a-f]+: c9[ ]+leave *
+ +[0-9a-f]+: c3[ ]+ret *
--- a/ld/testsuite/ld-x86-64/tlsbin2.dd
+++ b/ld/testsuite/ld-x86-64/tlsbin2.dd
@@ -172,8 +172,8 @@ Disassembly of section .text:
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
- +[0-9a-f]+: c9[ ]+leaveq *
- +[0-9a-f]+: c3[ ]+retq *
+ +[0-9a-f]+: c9[ ]+leave *
+ +[0-9a-f]+: c3[ ]+ret *
 
 [0-9a-f]+ <_start>:
  +[0-9a-f]+: 55[ ]+push   %rbp
@@ -306,5 +306,5 @@ Disassembly of section .text:
 #  LE, large model
  +[0-9a-f]+: 48 ba a5 ff ff ff ff[ ]+movabs \$0xffffffffffffffa5,%rdx
  +[0-9a-f]+: ff ff ff *
- +[0-9a-f]+: c9[ ]+leaveq *
- +[0-9a-f]+: c3[ ]+retq *
+ +[0-9a-f]+: c9[ ]+leave *
+ +[0-9a-f]+: c3[ ]+ret *
--- a/ld/testsuite/ld-x86-64/tlsbindesc.dd
+++ b/ld/testsuite/ld-x86-64/tlsbindesc.dd
@@ -163,8 +163,8 @@ Disassembly of section .text:
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
- +[0-9a-f]+: c9[ ]+leaveq *
- +[0-9a-f]+: c3[ ]+retq *
+ +[0-9a-f]+: c9[ ]+leave *
+ +[0-9a-f]+: c3[ ]+ret *
 
 [0-9a-f]+ <_start>:
  +[0-9a-f]+: 55[ ]+push   %rbp
@@ -297,5 +297,5 @@ Disassembly of section .text:
 #  LE, large model
  +[0-9a-f]+: 48 ba a5 ff ff ff ff[ ]+movabs \$0xffffffffffffffa5,%rdx
  +[0-9a-f]+: ff ff ff *
- +[0-9a-f]+: c9[ ]+leaveq *
- +[0-9a-f]+: c3[ ]+retq *
+ +[0-9a-f]+: c9[ ]+leave *
+ +[0-9a-f]+: c3[ ]+ret *
--- a/ld/testsuite/ld-x86-64/tlsdesc.dd
+++ b/ld/testsuite/ld-x86-64/tlsdesc.dd
@@ -19,7 +19,7 @@ Disassembly of section .text:
 #  GD
  +[0-9a-f]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea    0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*>
 # -> R_X86_64_TLSDESC sg1
- +[0-9a-f]+: ff 10[ ]+callq  \*\(%rax\)
+ +[0-9a-f]+: ff 10[ ]+call   \*\(%rax\)
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
@@ -35,7 +35,7 @@ Disassembly of section .text:
 #  GD against local variable
  +[0-9a-f]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea    0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x18>
 # -> R_X86_64_TLSDESC [0 0x2000000000000000]
- +[0-9a-f]+: ff 10[ ]+callq  \*\(%rax\)
+ +[0-9a-f]+: ff 10[ ]+call   \*\(%rax\)
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
@@ -51,7 +51,7 @@ Disassembly of section .text:
 #  GD against hidden and local variable
  +[0-9a-f]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea    0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x58>
 # -> R_X86_64_TLSDESC [0 0x4000000000000000]
- +[0-9a-f]+: ff 10[ ]+callq  \*\(%rax\)
+ +[0-9a-f]+: ff 10[ ]+call   \*\(%rax\)
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
@@ -67,7 +67,7 @@ Disassembly of section .text:
 #  GD against hidden but not local variable
  +[0-9a-f]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea    0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x28>
 # -> R_X86_64_TLSDESC [0 0x6000000000000000]
- +[0-9a-f]+: ff 10[ ]+callq  \*\(%rax\)
+ +[0-9a-f]+: ff 10[ ]+call   \*\(%rax\)
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
@@ -83,7 +83,7 @@ Disassembly of section .text:
 #  LD
  +[0-9a-f]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea    0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x38>
 # -> R_X86_64_TLSDESC [0 0x000000000000000]
- +[0-9a-f]+: ff 10[ ]+callq  \*\(%rax\)
+ +[0-9a-f]+: ff 10[ ]+call   \*\(%rax\)
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 48 8d 90 20 00 00 00[ ]+lea    0x20\(%rax\),%rdx
@@ -195,5 +195,5 @@ Disassembly of section .text:
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
- +[0-9a-f]+: c9[ ]+leaveq *
- +[0-9a-f]+: c3[ ]+retq *
+ +[0-9a-f]+: c9[ ]+leave *
+ +[0-9a-f]+: c3[ ]+ret *
--- a/ld/testsuite/ld-x86-64/tlsdesc.pd
+++ b/ld/testsuite/ld-x86-64/tlsdesc.pd
@@ -10,10 +10,10 @@
 Disassembly of section .plt:
 
 [0-9a-f]+ <.plt>:
- [0-9a-f]+: ff 35 .. .. 20 00     pushq  .*\(%rip\)        # 201358 <_GLOBAL_OFFSET_TABLE_\+0x8>
- [0-9a-f]+: ff 25 .. .. 20 00     jmpq   \*.*\(%rip\)        # 201360 <_GLOBAL_OFFSET_TABLE_\+0x10>
+ [0-9a-f]+: ff 35 .. .. 20 00     push   .*\(%rip\)        # 201358 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ [0-9a-f]+: ff 25 .. .. 20 00     jmp    \*.*\(%rip\)        # 201360 <_GLOBAL_OFFSET_TABLE_\+0x10>
  [0-9a-f]+: 0f 1f 40 00           nopl   0x0\(%rax\)
  [0-9a-f]+: f3 0f 1e fa           endbr64
- [0-9a-f]+: ff 35 .. .. 20 00     pushq  .*\(%rip\)        # 201358 <_GLOBAL_OFFSET_TABLE_\+0x8>
- [0-9a-f]+: ff 25 .. .. 20 00     jmpq   \*.*\(%rip\)        # 201348 <.*>
+ [0-9a-f]+: ff 35 .. .. 20 00     push   .*\(%rip\)        # 201358 <_GLOBAL_OFFSET_TABLE_\+0x8>
+ [0-9a-f]+: ff 25 .. .. 20 00     jmp    \*.*\(%rip\)        # 201348 <.*>
 
--- a/ld/testsuite/ld-x86-64/tlsgd10.dd
+++ b/ld/testsuite/ld-x86-64/tlsgd10.dd
@@ -19,5 +19,5 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 0f 1f 44 00 00     nopw   0x0\(%rax,%rax,1\)
 [ ]*[a-f0-9]+: 41 5f                 pop    %r15
 [ ]*[a-f0-9]+: 41 5f                 pop    %r15
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/tlsgd7.dd
+++ b/ld/testsuite/ld-x86-64/tlsgd7.dd
@@ -19,5 +19,5 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 0f 1f 44 00 00     nopw   0x0\(%rax,%rax,1\)
 [ ]*[a-f0-9]+: 5b                   pop    %rbx
 [ ]*[a-f0-9]+: 5b                   pop    %rbx
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/tlsgd8.dd
+++ b/ld/testsuite/ld-x86-64/tlsgd8.dd
@@ -19,5 +19,5 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 0f 1f 44 00 00     nopw   0x0\(%rax,%rax,1\)
 [ ]*[a-f0-9]+: 5b                   pop    %rbx
 [ ]*[a-f0-9]+: 5b                   pop    %rbx
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/tlsgd9.dd
+++ b/ld/testsuite/ld-x86-64/tlsgd9.dd
@@ -19,5 +19,5 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 0f 1f 44 00 00     nopw   0x0\(%rax,%rax,1\)
 [ ]*[a-f0-9]+: 41 5f                 pop    %r15
 [ ]*[a-f0-9]+: 41 5f                 pop    %r15
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/tlsgdesc.dd
+++ b/ld/testsuite/ld-x86-64/tlsgdesc.dd
@@ -41,7 +41,7 @@ Disassembly of section .text:
  +[0-9a-f]+: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*>
  +[0-9a-f]+: [0-9a-f]{2} *
 # -> R_X86_64_DTPMOD64 sG1
- +[0-9a-f]+: 66 66 48 e8 ([0-9a-f]{2} ){3}[ ]+data16 data16 rex.W callq [0-9a-f]+ <__tls_get_addr@plt>
+ +[0-9a-f]+: 66 66 48 e8 ([0-9a-f]{2} ){3}[ ]+data16 data16 rex\.W call [0-9a-f]+ <__tls_get_addr@plt>
  +[0-9a-f]+: [0-9a-f]{2} *
 # -> R_X86_64_JUMP_SLOT __tls_get_addr
  +[0-9a-f]+: 90[ ]+nop *
@@ -50,7 +50,7 @@ Disassembly of section .text:
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea    0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*>
 # -> R_X86_64_TLSDESC sG1
- +[0-9a-f]+: ff 10[ ]+callq  \*\(%rax\)
+ +[0-9a-f]+: ff 10[ ]+call   \*\(%rax\)
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
@@ -58,7 +58,7 @@ Disassembly of section .text:
 # GD, desc first
  +[0-9a-f]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea    0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*>
 # -> R_X86_64_TLSDESC sG2
- +[0-9a-f]+: ff 10[ ]+callq  \*\(%rax\)
+ +[0-9a-f]+: ff 10[ ]+call   \*\(%rax\)
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
@@ -66,7 +66,7 @@ Disassembly of section .text:
  +[0-9a-f]+: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*>
  +[0-9a-f]+: [0-9a-f]{2} *
 # -> R_X86_64_DTPMOD64 sG2
- +[0-9a-f]+: 66 66 48 e8 ([0-9a-f]{2} ){3}[ ]+data16 data16 rex.W callq [0-9a-f]+ <__tls_get_addr@plt>
+ +[0-9a-f]+: 66 66 48 e8 ([0-9a-f]{2} ){3}[ ]+data16 data16 rex\.W call [0-9a-f]+ <__tls_get_addr@plt>
  +[0-9a-f]+: [0-9a-f]{2} *
 # -> R_X86_64_JUMP_SLOT __tls_get_addr
  +[0-9a-f]+: 90[ ]+nop *
@@ -159,5 +159,5 @@ Disassembly of section .text:
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
  +[0-9a-f]+: 90[ ]+nop *
- +[0-9a-f]+: c9[ ]+leaveq *
- +[0-9a-f]+: c3[ ]+retq *
+ +[0-9a-f]+: c9[ ]+leave *
+ +[0-9a-f]+: c3[ ]+ret *
--- a/ld/testsuite/ld-x86-64/tlsld3.dd
+++ b/ld/testsuite/ld-x86-64/tlsld3.dd
@@ -19,5 +19,5 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 8b 80 fc ff ff ff     mov    -0x4\(%rax\),%eax
 [ ]*[a-f0-9]+: 5b                   pop    %rbx
 [ ]*[a-f0-9]+: 5b                   pop    %rbx
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/tlsld4.dd
+++ b/ld/testsuite/ld-x86-64/tlsld4.dd
@@ -19,5 +19,5 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 8b 80 fc ff ff ff     mov    -0x4\(%rax\),%eax
 [ ]*[a-f0-9]+: 41 5f                 pop    %r15
 [ ]*[a-f0-9]+: 41 5f                 pop    %r15
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/tlspic.dd
+++ b/ld/testsuite/ld-x86-64/tlspic.dd
@@ -20,7 +20,7 @@ Disassembly of section .text:
  +1008: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*>
  +100f: [0-9a-f ]+
 # -> R_X86_64_DTPMOD64 sg1
- +1010: 66 66 48 e8 [0-9a-f ]+data16 data16 rex.W callq [0-9a-f]+ <.*>
+ +1010: 66 66 48 e8 [0-9a-f ]+data16 data16 rex\.W call [0-9a-f]+ <.*>
 # -> R_X86_64_JUMP_SLOT __tls_get_addr
  +1017: [0-9a-f ]+
  +1018: 90[ ]+nop *
@@ -40,7 +40,7 @@ Disassembly of section .text:
  +1030: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*>
  +1037: [0-9a-f ]+
 # -> R_X86_64_DTPMOD64 [0 0x2000000000000000]
- +1038: 66 66 48 e8 [0-9a-f ]+data16 data16 rex.W callq [0-9a-f]+ <.*>
+ +1038: 66 66 48 e8 [0-9a-f ]+data16 data16 rex\.W call [0-9a-f]+ <.*>
 # -> R_X86_64_JUMP_SLOT __tls_get_addr
  +103f: [0-9a-f ]+
  +1040: 90[ ]+nop *
@@ -60,7 +60,7 @@ Disassembly of section .text:
  +1058: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*>
  +105f: [0-9a-f ]+
 # -> R_X86_64_DTPMOD64 [0 0x4000000000000000]
- +1060: 66 66 48 e8 [0-9a-f ]+data16 data16 rex.W callq [0-9a-f]+ <.*>
+ +1060: 66 66 48 e8 [0-9a-f ]+data16 data16 rex\.W call [0-9a-f]+ <.*>
 # -> R_X86_64_JUMP_SLOT __tls_get_addr
  +1067: [0-9a-f ]+
  +1068: 90[ ]+nop *
@@ -80,7 +80,7 @@ Disassembly of section .text:
  +1080: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*>
  +1087: [0-9a-f ]+
 # -> R_X86_64_DTPMOD64 [0 0x6000000000000000]
- +1088: 66 66 48 e8 [0-9a-f ]+data16 data16 rex.W callq [0-9a-f]+ <.*>
+ +1088: 66 66 48 e8 [0-9a-f ]+data16 data16 rex\.W call [0-9a-f]+ <.*>
 # -> R_X86_64_JUMP_SLOT __tls_get_addr
  +108f: [0-9a-f ]+
  +1090: 90[ ]+nop *
@@ -99,7 +99,7 @@ Disassembly of section .text:
 #  LD
  +10a8: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea    0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*>
 # -> R_X86_64_DTPMOD64 [0 0x000000000000000]
- +10af: e8 [0-9a-f ]+callq  [0-9a-f]+ <.*>
+ +10af: e8 [0-9a-f ]+call   [0-9a-f]+ <.*>
 # -> R_X86_64_JUMP_SLOT __tls_get_addr
  +10b4: 90[ ]+nop *
  +10b5: 90[ ]+nop *
@@ -114,7 +114,7 @@ Disassembly of section .text:
 #  LD against hidden and local variables
  +10ca: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea    0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*>
 # -> R_X86_64_DTPMOD64 [0 0x000000000000000]
- +10d1: e8 [0-9a-f ]+callq  [0-9a-f]+ <.*>
+ +10d1: e8 [0-9a-f ]+call   [0-9a-f]+ <.*>
 # -> R_X86_64_JUMP_SLOT __tls_get_addr
  +10d6: 90[ ]+nop *
  +10d7: 90[ ]+nop *
@@ -129,7 +129,7 @@ Disassembly of section .text:
 #  LD against hidden but not local variables
  +10ec: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea    0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*>
 # -> R_X86_64_DTPMOD64 [0 0x000000000000000]
- +10f3: e8 [0-9a-f ]+callq  [0-9a-f]+ <.*>
+ +10f3: e8 [0-9a-f ]+call   [0-9a-f]+ <.*>
 # -> R_X86_64_JUMP_SLOT __tls_get_addr
  +10f8: 90[ ]+nop *
  +10f9: 90[ ]+nop *
@@ -243,7 +243,7 @@ Disassembly of section .text:
 # -> R_X86_64_JUMP_SLOT __tls_get_addr
  +11d0: ([0-9a-f]{2} ){3}
  +11d3: 48 01 d8[ ]+add    %rbx,%rax
- +11d6: ff d0[ ]+callq  \*%rax
+ +11d6: ff d0[ ]+call   \*%rax
  +11d8: 90[ ]+nop *
  +11d9: 90[ ]+nop *
  +11da: 90[ ]+nop *
@@ -266,7 +266,7 @@ Disassembly of section .text:
 # -> R_X86_64_JUMP_SLOT __tls_get_addr
  +1204: ([0-9a-f]{2} ){3}
  +1207: 48 01 d8[ ]+add    %rbx,%rax
- +120a: ff d0[ ]+callq  \*%rax
+ +120a: ff d0[ ]+call   \*%rax
  +120c: 90[ ]+nop *
  +120d: 90[ ]+nop *
  +120e: 90[ ]+nop *
@@ -288,7 +288,7 @@ Disassembly of section .text:
 # -> R_X86_64_JUMP_SLOT __tls_get_addr
  +1238: ([0-9a-f]{2} ){3}
  +123b: 48 01 d8[ ]+add    %rbx,%rax
- +123e: ff d0[ ]+callq  \*%rax
+ +123e: ff d0[ ]+call   \*%rax
  +1240: 90[ ]+nop *
  +1241: 90[ ]+nop *
  +1242: 90[ ]+nop *
@@ -310,7 +310,7 @@ Disassembly of section .text:
 # -> R_X86_64_JUMP_SLOT __tls_get_addr
  +126c: ([0-9a-f]{2} ){3}
  +126f: 48 01 d8[ ]+add    %rbx,%rax
- +1272: ff d0[ ]+callq  \*%rax
+ +1272: ff d0[ ]+call   \*%rax
  +1274: 90[ ]+nop *
  +1275: 90[ ]+nop *
  +1276: 90[ ]+nop *
@@ -332,7 +332,7 @@ Disassembly of section .text:
 # -> R_X86_64_JUMP_SLOT __tls_get_addr
  +12a0: ([0-9a-f]{2} ){3}
  +12a3: 48 01 d8[ ]+add    %rbx,%rax
- +12a6: ff d0[ ]+callq  \*%rax
+ +12a6: ff d0[ ]+call   \*%rax
  +12a8: 90[ ]+nop *
  +12a9: 90[ ]+nop *
  +12aa: 48 8d 90 20 00 00 00[ ]+lea    0x20\(%rax\),%rdx
@@ -350,7 +350,7 @@ Disassembly of section .text:
 # -> R_X86_64_JUMP_SLOT __tls_get_addr
  +12cc: ([0-9a-f]{2} ){3}
  +12cf: 48 01 d8[ ]+add    %rbx,%rax
- +12d2: ff d0[ ]+callq  \*%rax
+ +12d2: ff d0[ ]+call   \*%rax
  +12d4: 90[ ]+nop *
  +12d5: 90[ ]+nop *
  +12d6: 48 8d 90 40 00 00 00[ ]+lea    0x40\(%rax\),%rdx
@@ -368,7 +368,7 @@ Disassembly of section .text:
 # -> R_X86_64_JUMP_SLOT __tls_get_addr
  +12f8: ([0-9a-f]{2} ){3}
  +12fb: 48 01 d8[ ]+add    %rbx,%rax
- +12fe: ff d0[ ]+callq  \*%rax
+ +12fe: ff d0[ ]+call   \*%rax
  +1300: 90[ ]+nop *
  +1301: 90[ ]+nop *
  +1302: 4c 8d a0 60 00 00 00[ ]+lea    0x60\(%rax\),%r12
@@ -381,5 +381,5 @@ Disassembly of section .text:
  +1315: 90[ ]+nop *
  +1316: 5b[ ]+pop    %rbx
  +1317: 5b[ ]+pop    %rbx
- +1318: c9[ ]+leaveq
- +1319: c3[ ]+retq  
+ +1318: c9[ ]+leave *
+ +1319: c3[ ]+ret *
--- a/ld/testsuite/ld-x86-64/tlspic2.dd
+++ b/ld/testsuite/ld-x86-64/tlspic2.dd
@@ -20,7 +20,7 @@ Disassembly of section .text:
  +1008: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*>
  +100f: [0-9a-f ]+
 # -> R_X86_64_DTPMOD64 sg1
- +1010: 66 48 ff [0-9a-f ]+data16 rex\.W callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +1010: 66 48 ff [0-9a-f ]+data16 rex\.W call \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
 # -> R_X86_64_GLOB_DAT __tls_get_addr
  +1017: [0-9a-f ]+
  +1018: 90[ ]+nop *
@@ -40,7 +40,7 @@ Disassembly of section .text:
  +1030: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*>
  +1037: [0-9a-f ]+
 # -> R_X86_64_DTPMOD64 [0 0x2000000000000000]
- +1038: 66 48 ff [0-9a-f ]+data16 rex\.W callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +1038: 66 48 ff [0-9a-f ]+data16 rex\.W call \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
 # -> R_X86_64_GLOB_DAT __tls_get_addr
  +103f: [0-9a-f ]+
  +1040: 90[ ]+nop *
@@ -60,7 +60,7 @@ Disassembly of section .text:
  +1058: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*>
  +105f: [0-9a-f ]+
 # -> R_X86_64_DTPMOD64 [0 0x4000000000000000]
- +1060: 66 48 ff [0-9a-f ]+data16 rex\.W callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +1060: 66 48 ff [0-9a-f ]+data16 rex\.W call \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
 # -> R_X86_64_GLOB_DAT __tls_get_addr
  +1067: [0-9a-f ]+
  +1068: 90[ ]+nop *
@@ -80,7 +80,7 @@ Disassembly of section .text:
  +1080: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*>
  +1087: [0-9a-f ]+
 # -> R_X86_64_DTPMOD64 [0 0x6000000000000000]
- +1088: 66 48 ff [0-9a-f ]+data16 rex\.W callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +1088: 66 48 ff [0-9a-f ]+data16 rex\.W call \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
 # -> R_X86_64_GLOB_DAT __tls_get_addr
  +108f: [0-9a-f ]+
  +1090: 90[ ]+nop *
@@ -99,7 +99,7 @@ Disassembly of section .text:
 #  LD
  +10a8: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea    0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*>
 # -> R_X86_64_DTPMOD64 [0 0x000000000000000]
- +10af: ff [0-9a-f ]+callq[ ]+\*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +10af: ff [0-9a-f ]+call[ ]+\*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
 # -> R_X86_64_GLOB_DAT __tls_get_addr
  +10b5: 90[ ]+nop *
  +10b6: 48 8d 90 20 00 00 00[ ]+lea    0x20\(%rax\),%rdx
@@ -113,7 +113,7 @@ Disassembly of section .text:
 #  LD against hidden and local variables
  +10ca: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea    0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*>
 # -> R_X86_64_DTPMOD64 [0 0x000000000000000]
- +10d1: ff [0-9a-f ]+callq[ ]+\*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +10d1: ff [0-9a-f ]+call[ ]+\*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
 # -> R_X86_64_GLOB_DAT __tls_get_addr
  +10d7: 90[ ]+nop *
  +10d8: 48 8d 90 40 00 00 00[ ]+lea    0x40\(%rax\),%rdx
@@ -127,7 +127,7 @@ Disassembly of section .text:
 #  LD against hidden but not local variables
  +10ec: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea    0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*>
 # -> R_X86_64_DTPMOD64 [0 0x000000000000000]
- +10f3: ff [0-9a-f ]+callq[ ]+\*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
+ +10f3: ff [0-9a-f ]+call[ ]+\*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*>
 # -> R_X86_64_GLOB_DAT __tls_get_addr
  +10f9: 90[ ]+nop *
  +10fa: 4c 8d a0 60 00 00 00[ ]+lea    0x60\(%rax\),%r12
@@ -238,7 +238,7 @@ Disassembly of section .text:
 # -> R_X86_64_GLOB_DAT __tls_get_addr
  +11d0: ([0-9a-f]{2} ){3}
  +11d3: 4c 01 f8[ ]+add    %r15,%rax
- +11d6: ff d0[ ]+callq  \*%rax
+ +11d6: ff d0[ ]+call   \*%rax
  +11d8: 90[ ]+nop *
  +11d9: 90[ ]+nop *
  +11da: 90[ ]+nop *
@@ -261,7 +261,7 @@ Disassembly of section .text:
 # -> R_X86_64_GLOB_DAT __tls_get_addr
  +1204: ([0-9a-f]{2} ){3}
  +1207: 4c 01 f8[ ]+add    %r15,%rax
- +120a: ff d0[ ]+callq  \*%rax
+ +120a: ff d0[ ]+call   \*%rax
  +120c: 90[ ]+nop *
  +120d: 90[ ]+nop *
  +120e: 90[ ]+nop *
@@ -283,7 +283,7 @@ Disassembly of section .text:
 # -> R_X86_64_GLOB_DAT __tls_get_addr
  +1238: ([0-9a-f]{2} ){3}
  +123b: 4c 01 f8[ ]+add    %r15,%rax
- +123e: ff d0[ ]+callq  \*%rax
+ +123e: ff d0[ ]+call   \*%rax
  +1240: 90[ ]+nop *
  +1241: 90[ ]+nop *
  +1242: 90[ ]+nop *
@@ -305,7 +305,7 @@ Disassembly of section .text:
 # -> R_X86_64_GLOB_DAT __tls_get_addr
  +126c: ([0-9a-f]{2} ){3}
  +126f: 4c 01 f8[ ]+add    %r15,%rax
- +1272: ff d0[ ]+callq  \*%rax
+ +1272: ff d0[ ]+call   \*%rax
  +1274: 90[ ]+nop *
  +1275: 90[ ]+nop *
  +1276: 90[ ]+nop *
@@ -327,7 +327,7 @@ Disassembly of section .text:
 # -> R_X86_64_GLOB_DAT __tls_get_addr
  +12a0: ([0-9a-f]{2} ){3}
  +12a3: 4c 01 f8[ ]+add    %r15,%rax
- +12a6: ff d0[ ]+callq  \*%rax
+ +12a6: ff d0[ ]+call   \*%rax
  +12a8: 90[ ]+nop *
  +12a9: 90[ ]+nop *
  +12aa: 48 8d 90 20 00 00 00[ ]+lea    0x20\(%rax\),%rdx
@@ -345,7 +345,7 @@ Disassembly of section .text:
 # -> R_X86_64_GLOB_DAT __tls_get_addr
  +12cc: ([0-9a-f]{2} ){3}
  +12cf: 4c 01 f8[ ]+add    %r15,%rax
- +12d2: ff d0[ ]+callq  \*%rax
+ +12d2: ff d0[ ]+call   \*%rax
  +12d4: 90[ ]+nop *
  +12d5: 90[ ]+nop *
  +12d6: 48 8d 90 40 00 00 00[ ]+lea    0x40\(%rax\),%rdx
@@ -363,7 +363,7 @@ Disassembly of section .text:
 # -> R_X86_64_GLOB_DAT __tls_get_addr
  +12f8: ([0-9a-f]{2} ){3}
  +12fb: 4c 01 f8[ ]+add    %r15,%rax
- +12fe: ff d0[ ]+callq  \*%rax
+ +12fe: ff d0[ ]+call   \*%rax
  +1300: 90[ ]+nop *
  +1301: 90[ ]+nop *
  +1302: 4c 8d a0 60 00 00 00[ ]+lea    0x60\(%rax\),%r12
@@ -374,5 +374,5 @@ Disassembly of section .text:
  +1313: 90[ ]+nop *
  +1314: 41 5f[ ]+pop    %r15
  +1316: 41 5f[ ]+pop    %r15
- +1318: c9[ ]+leaveq
- +1319: c3[ ]+retq  
+ +1318: c9[ ]+leave *
+ +1319: c3[ ]+ret *
--- a/ld/testsuite/ld-x86-64/tlspie2b.d
+++ b/ld/testsuite/ld-x86-64/tlspie2b.d
@@ -9,7 +9,7 @@
 Disassembly of section .text:
 
 [a-f0-9]+ <__tls_get_addr>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 [a-f0-9]+ <_start>:
 [ ]*[a-f0-9]+: 48 c7 c0 f4 ff ff ff mov    \$0xfffffffffffffff4,%rax
@@ -24,5 +24,5 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 03 18                 add    \(%rax\),%ebx
 [ ]*[a-f0-9]+: 89 d8                 mov    %ebx,%eax
 [ ]*[a-f0-9]+: 5b                   pop    %rbx
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/ld/testsuite/ld-x86-64/tlspie2c.d
+++ b/ld/testsuite/ld-x86-64/tlspie2c.d
@@ -9,7 +9,7 @@
 Disassembly of section .text:
 
 [a-f0-9]+ <__tls_get_addr>:
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 
 [a-f0-9]+ <_start>:
 [ ]*[a-f0-9]+: 48 c7 c0 f4 ff ff ff mov    \$0xfffffffffffffff4,%rax
@@ -24,5 +24,5 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 03 18                 add    \(%rax\),%ebx
 [ ]*[a-f0-9]+: 89 d8                 mov    %ebx,%eax
 [ ]*[a-f0-9]+: 5b                   pop    %rbx
-[ ]*[a-f0-9]+: c3                   retq  
+[ ]*[a-f0-9]+: c3                   ret *
 #pass
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1738,16 +1738,15 @@ struct dis386 {
    'M' => print 'r' if intel_mnemonic is false.
    'N' => print 'n' if instruction has no wait "prefix"
    'O' => print 'd' or 'o' (or 'q' in Intel mode)
-   'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
-  or suffix_always is true.  print 'q' if rex prefix is present.
+   'P' => behave as 'T' except with register operand outside of suffix_always
+  mode
    'Q' => print 'w', 'l' or 'q' for memory operand or suffix_always
   is true
    'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
    'S' => print 'w', 'l' or 'q' if suffix_always is true
-   'T' => print 'q' in 64bit mode if instruction has no operand size
-  prefix and behave as 'P' otherwise
-   'U' => print 'q' in 64bit mode if instruction has no operand size
-  prefix and behave as 'Q' otherwise
+   'T' => print 'w', 'l'/'d', or 'q' if instruction has an operand size
+  prefix or if suffix_always is true.
+   'U' unused.
    'V' => print 'q' in 64bit mode if instruction has no operand size
   prefix and behave as 'S' otherwise
    'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
@@ -1758,11 +1757,9 @@ struct dis386 {
    '%' => add 1 upper case letter to the macro.
    '^' => print 'w', 'l', or 'q' (Intel64 ISA only) depending on operand size
   prefix or suffix_always is true (lcall/ljmp).
-   '@' => print 'q' for Intel64 ISA, 'w' or 'q' for AMD64 ISA depending
-  on operand size prefix.
-   '&' => print 'q' in 64bit mode for Intel64 ISA or if instruction
-  has no operand size prefix for AMD64 ISA, behave as 'P'
-  otherwise
+   '@' => in 64bit mode for Intel64 ISA or if instruction
+  has no operand sizing prefix, print 'q' if suffix_always is true or
+  nothing otherwise; behave as 'P' in all other cases
 
    2 upper case letter macros:
    "XY" => print 'x' or 'y' if suffix_always is true or no register
@@ -1907,9 +1904,9 @@ static const struct dis386 dis386[] = {
   { Bad_Opcode }, /* op size prefix */
   { Bad_Opcode }, /* adr size prefix */
   /* 68 */
-  { "pushT", { sIv }, 0 },
+  { "pushP", { sIv }, 0 },
   { "imulS", { Gv, Ev, Iv }, 0 },
-  { "pushT", { sIbT }, 0 },
+  { "pushP", { sIbT }, 0 },
   { "imulS", { Gv, Ev, sIb }, 0 },
   { "ins{b|}", { Ybr, indirDX }, 0 },
   { X86_64_TABLE (X86_64_6D) },
@@ -1965,8 +1962,8 @@ static const struct dis386 dis386[] = {
   { "cR{t|}O", { XX }, 0 },
   { X86_64_TABLE (X86_64_9A) },
   { Bad_Opcode }, /* fwait */
-  { "pushfT", { XX }, 0 },
-  { "popfT", { XX }, 0 },
+  { "pushfP", { XX }, 0 },
+  { "popfP", { XX }, 0 },
   { "sahf", { XX }, 0 },
   { "lahf", { XX }, 0 },
   /* a0 */
@@ -2015,10 +2012,10 @@ static const struct dis386 dis386[] = {
   { REG_TABLE (REG_C6) },
   { REG_TABLE (REG_C7) },
   /* c8 */
-  { "enterT", { Iw, Ib }, 0 },
-  { "leaveT", { XX }, 0 },
-  { "{l|}ret{|f}P", { Iw }, 0 },
-  { "{l|}ret{|f}P", { XX }, 0 },
+  { "enterP", { Iw, Ib }, 0 },
+  { "leaveP", { XX }, 0 },
+  { "{l|}ret{|f}%LP", { Iw }, 0 },
+  { "{l|}ret{|f}%LP", { XX }, 0 },
   { "int3", { XX }, 0 },
   { "int", { Ib }, 0 },
   { X86_64_TABLE (X86_64_CE) },
@@ -2261,8 +2258,8 @@ static const struct dis386 dis386_twobyt
   { "setle", { Eb }, 0 },
   { "setg", { Eb }, 0 },
   /* a0 */
-  { "pushT", { fs }, 0 },
-  { "popT", { fs }, 0 },
+  { "pushP", { fs }, 0 },
+  { "popP", { fs }, 0 },
   { "cpuid", { XX }, 0 },
   { "btS", { Ev, Gv }, 0 },
   { "shldS", { Ev, Gv, Ib }, 0 },
@@ -2270,8 +2267,8 @@ static const struct dis386 dis386_twobyt
   { REG_TABLE (REG_0FA6) },
   { REG_TABLE (REG_0FA7) },
   /* a8 */
-  { "pushT", { gs }, 0 },
-  { "popT", { gs }, 0 },
+  { "pushP", { gs }, 0 },
+  { "popP", { gs }, 0 },
   { "rsm", { XX }, 0 },
   { "btsS", { Evh1, Gv }, 0 },
   { "shrdS", { Ev, Gv, Ib }, 0 },
@@ -2695,7 +2692,7 @@ static const struct dis386 reg_table[][8
   },
   /* REG_8F */
   {
-    { "popU", { stackEv }, 0 },
+    { "pop{P|}", { stackEv }, 0 },
     { XOP_8F_TABLE (XOP_09) },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -2821,11 +2818,11 @@ static const struct dis386 reg_table[][8
   {
     { "incQ", { Evh1 }, 0 },
     { "decQ", { Evh1 }, 0 },
-    { "call{&|}", { NOTRACK, indirEv, BND }, 0 },
+    { "call{@|}", { NOTRACK, indirEv, BND }, 0 },
     { MOD_TABLE (MOD_FF_REG_3) },
-    { "jmp{&|}", { NOTRACK, indirEv, BND }, 0 },
+    { "jmp{@|}", { NOTRACK, indirEv, BND }, 0 },
     { MOD_TABLE (MOD_FF_REG_5) },
-    { "pushU", { stackEv }, 0 },
+    { "push{P|}", { stackEv }, 0 },
     { Bad_Opcode },
   },
   /* REG_0F00 */
@@ -4072,7 +4069,7 @@ static const struct dis386 x86_64_table[
 
   /* X86_64_9A */
   {
-    { "{l|}call{T|}", { Ap }, 0 },
+    { "{l|}call{P|}", { Ap }, 0 },
   },
 
   /* X86_64_C2 */
@@ -4128,7 +4125,7 @@ static const struct dis386 x86_64_table[
 
   /* X86_64_EA */
   {
-    { "{l|}jmp{T|}", { Ap }, 0 },
+    { "{l|}jmp{P|}", { Ap }, 0 },
   },
 
   /* X86_64_0F01_REG_0 */
@@ -10637,56 +10634,33 @@ putop (const char *in_template, int size
   if (!(rex & REX_W))
     used_prefixes |= (prefixes & PREFIX_DATA);
   break;
- case '&':
-  if (!intel_syntax
-      && address_mode == mode_64bit
-      && isa64 == intel64)
-    {
-      *obufp++ = 'q';
-      break;
-    }
-  /* Fall through.  */
- case 'T':
-  if (!intel_syntax
-      && address_mode == mode_64bit
-      && ((sizeflag & DFLAG) || (rex & REX_W)))
+ case '@':
+  if (address_mode == mode_64bit
+      && (isa64 == intel64 || (rex & REX_W)
+  || !(prefixes & PREFIX_DATA)))
     {
-      *obufp++ = 'q';
+      if (sizeflag & SUFFIX_ALWAYS)
+ *obufp++ = 'q';
       break;
     }
   /* Fall through.  */
-  goto case_P;
  case 'P':
   if (l == 0)
     {
-    case_P:
-      if (intel_syntax)
- {
-  if ((rex & REX_W) == 0
-      && (prefixes & PREFIX_DATA))
-    {
-      if ((sizeflag & DFLAG) == 0)
- *obufp++ = 'w';
-      used_prefixes |= (prefixes & PREFIX_DATA);
-    }
-  break;
- }
-      if ((prefixes & PREFIX_DATA)
-  || (rex & REX_W)
-  || (sizeflag & SUFFIX_ALWAYS))
+      if (need_modrm && modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS))
+ break;
+  /* Fall through.  */
+ case 'T':
+      if ((!(rex & REX_W) && (prefixes & PREFIX_DATA))
+  || ((sizeflag & SUFFIX_ALWAYS)
+      && address_mode != mode_64bit))
  {
-  USED_REX (REX_W);
-  if (rex & REX_W)
-    *obufp++ = 'q';
-  else
-    {
-      if (sizeflag & DFLAG)
- *obufp++ = 'l';
-      else
- *obufp++ = 'w';
-      used_prefixes |= (prefixes & PREFIX_DATA);
-    }
+  *obufp++ = (sizeflag & DFLAG) ?
+     intel_syntax ? 'd' : 'l' : 'w';
+  used_prefixes |= (prefixes & PREFIX_DATA);
  }
+      else if (sizeflag & SUFFIX_ALWAYS)
+ *obufp++ = 'q';
     }
   else if (l == 1 && last[0] == 'L')
     {
@@ -10710,22 +10684,9 @@ putop (const char *in_template, int size
   else
     abort ();
   break;
- case 'U':
-  if (intel_syntax)
-    break;
-  if (address_mode == mode_64bit
-      && ((sizeflag & DFLAG) || (rex & REX_W)))
-    {
-      if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
- *obufp++ = 'q';
-      break;
-    }
-  /* Fall through.  */
-  goto case_Q;
  case 'Q':
   if (l == 0)
     {
-    case_Q:
       if (intel_syntax && !alt)
  break;
       USED_REX (REX_W);
@@ -10964,20 +10925,6 @@ putop (const char *in_template, int size
       used_prefixes |= (prefixes & PREFIX_DATA);
     }
   break;
- case '@':
-  if (intel_syntax)
-    break;
-  if (address_mode == mode_64bit
-      && (isa64 == intel64
-  || ((sizeflag & DFLAG) || (rex & REX_W))))
-      *obufp++ = 'q';
-  else if ((prefixes & PREFIX_DATA))
-    {
-      if (!(sizeflag & DFLAG))
- *obufp++ = 'w';
-      used_prefixes |= (prefixes & PREFIX_DATA);
-    }
-  break;
  }
 
       if (len == l)
@@ -12558,9 +12505,7 @@ OP_J (int bytemode, int sizeflag)
  disp -= 0x100;
       break;
     case v_mode:
-      if (isa64 != intel64)
     case dqw_mode:
- USED_REX (REX_W);
       if ((sizeflag & DFLAG)
   || (address_mode == mode_64bit
       && ((isa64 == intel64 && bytemode != dqw_mode)
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[PATCH 2/5] x86-64: adjust stack insn test case

Jan Beulich-2
In reply to this post by Jan Beulich-2
The value chosen for the 16-/32-bit immediate cases didn't work well
with the subsequent insn's REX prefix - we ought to pick a value the
upper two bytes of which evaluate to a 2-byte insn. Bump the values
accordingly, allowing the subsequent insn to actually have the intended
REX.W.

gas/
2020-07-XX  Jan Beulich  <[hidden email]>

        * testsuite/gas/i386/x86-64-stack.s: Adjust 32-bit push
        immediate.
        * testsuite/gas/i386/x86-64-stack-intel.d,
        testsuite/gas/i386/x86-64-stack-suffix.d,
        testsuite/gas/i386/x86-64-stack.d: Adjust expectations.

--- a/gas/testsuite/gas/i386/x86-64-stack-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-stack-intel.d
@@ -51,11 +51,11 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 6a ff             pushw  0xffff
 [ ]*[a-f0-9]+: 48 6a ff             rex.W push 0xffffffffffffffff
 [ ]*[a-f0-9]+: 66 48 6a ff           data16 rex.W push 0xffffffffffffffff
-[ ]*[a-f0-9]+: 68 01 02 03 04       push   0x4030201
-[ ]*[a-f0-9]+: 66 68 01 02           pushw  0x201
-[ ]*[a-f0-9]+: 03 04 48             add    eax,DWORD PTR \[rax\+rcx\*2\]
-[ ]*[a-f0-9]+: 68 01 02 03 04       push   0x4030201
-[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data16 rex.W push 0x4030201
+[ ]*[a-f0-9]+: 68 02 03 04 05       push   0x5040302
+[ ]*[a-f0-9]+: 66 68 02 03           pushw  0x302
+[ ]*[a-f0-9]+: 04 05                 add    al,0x5
+[ ]*[a-f0-9]+: 48 68 02 03 04 05     rex\.W push 0x5040302
+[ ]*[a-f0-9]+: 66 48 68 02 03 04 05 data16 rex\.W push 0x5040302
 [ ]*[a-f0-9]+: 0f a8                 push   gs
 [ ]*[a-f0-9]+: 66 0f a8             pushw  gs
 [ ]*[a-f0-9]+: 48 0f a8             rex.W push gs
--- a/gas/testsuite/gas/i386/x86-64-stack-suffix.d
+++ b/gas/testsuite/gas/i386/x86-64-stack-suffix.d
@@ -51,11 +51,11 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 6a ff             pushw  \$0xffff
 [ ]*[a-f0-9]+: 48 6a ff             rex.W pushq \$0xffffffffffffffff
 [ ]*[a-f0-9]+: 66 48 6a ff           data16 rex.W pushq \$0xffffffffffffffff
-[ ]*[a-f0-9]+: 68 01 02 03 04       pushq  \$0x4030201
-[ ]*[a-f0-9]+: 66 68 01 02           pushw  \$0x201
-[ ]*[a-f0-9]+: 03 04 48             addl   \(%rax,%rcx,2\),%eax
-[ ]*[a-f0-9]+: 68 01 02 03 04       pushq  \$0x4030201
-[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data16 rex.W pushq \$0x4030201
+[ ]*[a-f0-9]+: 68 02 03 04 05       pushq  \$0x5040302
+[ ]*[a-f0-9]+: 66 68 02 03           pushw  \$0x302
+[ ]*[a-f0-9]+: 04 05                 addb   \$0x5,%al
+[ ]*[a-f0-9]+: 48 68 02 03 04 05     rex\.W pushq \$0x5040302
+[ ]*[a-f0-9]+: 66 48 68 02 03 04 05 data16 rex\.W pushq \$0x5040302
 [ ]*[a-f0-9]+: 0f a8                 pushq  %gs
 [ ]*[a-f0-9]+: 66 0f a8             pushw  %gs
 [ ]*[a-f0-9]+: 48 0f a8             rex.W pushq %gs
--- a/gas/testsuite/gas/i386/x86-64-stack.d
+++ b/gas/testsuite/gas/i386/x86-64-stack.d
@@ -50,11 +50,11 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 6a ff             pushw  \$0xffff
 [ ]*[a-f0-9]+: 48 6a ff             rex\.W push \$0xffffffffffffffff
 [ ]*[a-f0-9]+: 66 48 6a ff           data16 rex\.W push \$0xffffffffffffffff
-[ ]*[a-f0-9]+: 68 01 02 03 04       push   \$0x4030201
-[ ]*[a-f0-9]+: 66 68 01 02           pushw  \$0x201
-[ ]*[a-f0-9]+: 03 04 48             add    \(%rax,%rcx,2\),%eax
-[ ]*[a-f0-9]+: 68 01 02 03 04       push   \$0x4030201
-[ ]*[a-f0-9]+: 66 48 68 01 02 03 04 data16 rex\.W push \$0x4030201
+[ ]*[a-f0-9]+: 68 02 03 04 05       push   \$0x5040302
+[ ]*[a-f0-9]+: 66 68 02 03           pushw  \$0x302
+[ ]*[a-f0-9]+: 04 05                 add    \$0x5,%al
+[ ]*[a-f0-9]+: 48 68 02 03 04 05     rex\.W push \$0x5040302
+[ ]*[a-f0-9]+: 66 48 68 02 03 04 05 data16 rex\.W push \$0x5040302
 [ ]*[a-f0-9]+: 0f a8                 push   %gs
 [ ]*[a-f0-9]+: 66 0f a8             pushw  %gs
 [ ]*[a-f0-9]+: 48 0f a8             rex\.W push %gs
--- a/gas/testsuite/gas/i386/x86-64-stack.s
+++ b/gas/testsuite/gas/i386/x86-64-stack.s
@@ -26,8 +26,8 @@ _start:
  # push with a 1-byte immediate
  try 0x6a, 0xff
 
- # push with a 4-byte immediate
- try 0x68, 0x01, 0x02, 0x03, 0x04
+ # push with a 4-(or 2-)byte immediate
+ try 0x68, 0x02, 0x03, 0x04, 0x05
 
  # push a segment register
  try 0x0f, 0xa8

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[PATCH 3/5] x86: make PUSH/POP disassembly uniform

Jan Beulich-2
In reply to this post by Jan Beulich-2
Irrespective of their encoding the resulting output should look the
same. Therefore wire the handling of PUSH/POP with GPR operands
encoded in the main opcode byte to the same logic used for other
operands. This frees up yet another macro character.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (dis386): Adjust 'V' description. Use P-based
        construct for push/pop of register.
        (putop): Honor cond when handling 'P'. Drop handling of plain
        'V'.

--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1747,8 +1747,7 @@ struct dis386 {
    'T' => print 'w', 'l'/'d', or 'q' if instruction has an operand size
   prefix or if suffix_always is true.
    'U' unused.
-   'V' => print 'q' in 64bit mode if instruction has no operand size
-  prefix and behave as 'S' otherwise
+   'V' unused.
    'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
    'X' => print 's', 'd' depending on data16 prefix (for XMM)
    'Y' unused.
@@ -1877,23 +1876,23 @@ static const struct dis386 dis386[] = {
   { "dec{S|}", { RMeSI }, 0 },
   { "dec{S|}", { RMeDI }, 0 },
   /* 50 */
-  { "pushV", { RMrAX }, 0 },
-  { "pushV", { RMrCX }, 0 },
-  { "pushV", { RMrDX }, 0 },
-  { "pushV", { RMrBX }, 0 },
-  { "pushV", { RMrSP }, 0 },
-  { "pushV", { RMrBP }, 0 },
-  { "pushV", { RMrSI }, 0 },
-  { "pushV", { RMrDI }, 0 },
+  { "push{!P|}", { RMrAX }, 0 },
+  { "push{!P|}", { RMrCX }, 0 },
+  { "push{!P|}", { RMrDX }, 0 },
+  { "push{!P|}", { RMrBX }, 0 },
+  { "push{!P|}", { RMrSP }, 0 },
+  { "push{!P|}", { RMrBP }, 0 },
+  { "push{!P|}", { RMrSI }, 0 },
+  { "push{!P|}", { RMrDI }, 0 },
   /* 58 */
-  { "popV", { RMrAX }, 0 },
-  { "popV", { RMrCX }, 0 },
-  { "popV", { RMrDX }, 0 },
-  { "popV", { RMrBX }, 0 },
-  { "popV", { RMrSP }, 0 },
-  { "popV", { RMrBP }, 0 },
-  { "popV", { RMrSI }, 0 },
-  { "popV", { RMrDI }, 0 },
+  { "pop{!P|}", { RMrAX }, 0 },
+  { "pop{!P|}", { RMrCX }, 0 },
+  { "pop{!P|}", { RMrDX }, 0 },
+  { "pop{!P|}", { RMrBX }, 0 },
+  { "pop{!P|}", { RMrSP }, 0 },
+  { "pop{!P|}", { RMrBP }, 0 },
+  { "pop{!P|}", { RMrSI }, 0 },
+  { "pop{!P|}", { RMrDI }, 0 },
   /* 60 */
   { X86_64_TABLE (X86_64_60) },
   { X86_64_TABLE (X86_64_61) },
@@ -10647,7 +10646,8 @@ putop (const char *in_template, int size
  case 'P':
   if (l == 0)
     {
-      if (need_modrm && modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS))
+      if (((need_modrm && modrm.mod == 3) || !cond)
+  && !(sizeflag & SUFFIX_ALWAYS))
  break;
   /* Fall through.  */
  case 'T':
@@ -10744,17 +10744,7 @@ putop (const char *in_template, int size
   break;
  case 'V':
   if (l == 0)
-    {
-      if (intel_syntax)
- break;
-      if (address_mode == mode_64bit
-  && ((sizeflag & DFLAG) || (rex & REX_W)))
- {
-  if (sizeflag & SUFFIX_ALWAYS)
-    *obufp++ = 'q';
-  break;
- }
-    }
+    abort ();
   else if (l == 1 && last[0] == 'L')
     {
       if (rex & REX_W)

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[PATCH 4/5] x86-64: Intel64 adjustments for conditional jumps

Jan Beulich-2
In reply to this post by Jan Beulich-2
Just like for unconditional direct JMP (and CALL), AMD and Intel differ
in their handling. Mirror JMP handling to Jcc.

gas/
2020-07-XX  Jan Beulich  <[hidden email]>

        * testsuite/gas/i386/x86-64-branch-2.s,
        testsuite/gas/i386/x86-64-branch-3.s: Add Jcc cases.
        * testsuite/gas/i386/opcode-suffix.d,
        testsuite/gas/i386/x86-64-branch-2.d,
        testsuite/gas/i386/x86-64-branch-3.d,
        testsuite/gas/i386/x86-64-branch.d: Adjust expectations.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (X86_64_0F8x): New enumerator.
        (dis386): Describe "CP" and "C@".
        (dis386_twobyte): Vector Jcc to X86_64_0F8x.
        (condition_code): New.
        (x86_64_table): Add X86_64_0F8x entry.
        (print_insn): Set condition_code. Move advancing of codep after
        it.
        (putop): Handle CP and C@.
        * i386-opc.tbl (j<cc>): Split into AMD64 and Intel64 variants.
        * i386-tbl.h: Re-generate.

--- a/gas/testsuite/gas/i386/opcode-suffix.d
+++ b/gas/testsuite/gas/i386/opcode-suffix.d
@@ -305,22 +305,22 @@ Disassembly of section .text:
  *[0-9a-f]+: 0f 77[ ]+emms[ ]+
  *[0-9a-f]+: 0f 7e 90 90 90 90 90[ ]+movd[ ]+%mm2,-0x6f6f6f70\(%eax\)
  *[0-9a-f]+: 0f 7f 90 90 90 90 90[ ]+movq[ ]+%mm2,-0x6f6f6f70\(%eax\)
- *[0-9a-f]+: 0f 80 90 90 90 90[ ]+jo[ ]+909094e2 <foo\+0x909094e2>
- *[0-9a-f]+: 0f 81 90 90 90 90[ ]+jno[ ]+909094e8 <foo\+0x909094e8>
- *[0-9a-f]+: 0f 82 90 90 90 90[ ]+jb[ ]+909094ee <foo\+0x909094ee>
- *[0-9a-f]+: 0f 83 90 90 90 90[ ]+jae[ ]+909094f4 <foo\+0x909094f4>
- *[0-9a-f]+: 0f 84 90 90 90 90[ ]+je[ ]+909094fa <foo\+0x909094fa>
- *[0-9a-f]+: 0f 85 90 90 90 90[ ]+jne[ ]+90909500 <foo\+0x90909500>
- *[0-9a-f]+: 0f 86 90 90 90 90[ ]+jbe[ ]+90909506 <foo\+0x90909506>
- *[0-9a-f]+: 0f 87 90 90 90 90[ ]+ja[ ]+9090950c <foo\+0x9090950c>
- *[0-9a-f]+: 0f 88 90 90 90 90[ ]+js[ ]+90909512 <foo\+0x90909512>
- *[0-9a-f]+: 0f 89 90 90 90 90[ ]+jns[ ]+90909518 <foo\+0x90909518>
- *[0-9a-f]+: 0f 8a 90 90 90 90[ ]+jp[ ]+9090951e <foo\+0x9090951e>
- *[0-9a-f]+: 0f 8b 90 90 90 90[ ]+jnp[ ]+90909524 <foo\+0x90909524>
- *[0-9a-f]+: 0f 8c 90 90 90 90[ ]+jl[ ]+9090952a <foo\+0x9090952a>
- *[0-9a-f]+: 0f 8d 90 90 90 90[ ]+jge[ ]+90909530 <foo\+0x90909530>
- *[0-9a-f]+: 0f 8e 90 90 90 90[ ]+jle[ ]+90909536 <foo\+0x90909536>
- *[0-9a-f]+: 0f 8f 90 90 90 90[ ]+jg[ ]+9090953c <foo\+0x9090953c>
+ *[0-9a-f]+: 0f 80 90 90 90 90[ ]+jol[ ]+909094e2 <foo\+0x909094e2>
+ *[0-9a-f]+: 0f 81 90 90 90 90[ ]+jnol[ ]+909094e8 <foo\+0x909094e8>
+ *[0-9a-f]+: 0f 82 90 90 90 90[ ]+jbl[ ]+909094ee <foo\+0x909094ee>
+ *[0-9a-f]+: 0f 83 90 90 90 90[ ]+jael[ ]+909094f4 <foo\+0x909094f4>
+ *[0-9a-f]+: 0f 84 90 90 90 90[ ]+jel[ ]+909094fa <foo\+0x909094fa>
+ *[0-9a-f]+: 0f 85 90 90 90 90[ ]+jnel[ ]+90909500 <foo\+0x90909500>
+ *[0-9a-f]+: 0f 86 90 90 90 90[ ]+jbel[ ]+90909506 <foo\+0x90909506>
+ *[0-9a-f]+: 0f 87 90 90 90 90[ ]+jal[ ]+9090950c <foo\+0x9090950c>
+ *[0-9a-f]+: 0f 88 90 90 90 90[ ]+jsl[ ]+90909512 <foo\+0x90909512>
+ *[0-9a-f]+: 0f 89 90 90 90 90[ ]+jnsl[ ]+90909518 <foo\+0x90909518>
+ *[0-9a-f]+: 0f 8a 90 90 90 90[ ]+jpl[ ]+9090951e <foo\+0x9090951e>
+ *[0-9a-f]+: 0f 8b 90 90 90 90[ ]+jnpl[ ]+90909524 <foo\+0x90909524>
+ *[0-9a-f]+: 0f 8c 90 90 90 90[ ]+jll[ ]+9090952a <foo\+0x9090952a>
+ *[0-9a-f]+: 0f 8d 90 90 90 90[ ]+jgel[ ]+90909530 <foo\+0x90909530>
+ *[0-9a-f]+: 0f 8e 90 90 90 90[ ]+jlel[ ]+90909536 <foo\+0x90909536>
+ *[0-9a-f]+: 0f 8f 90 90 90 90[ ]+jgl[ ]+9090953c <foo\+0x9090953c>
  *[0-9a-f]+: 0f 90 80 90 90 90 90[ ]+seto[ ]+-0x6f6f6f70\(%eax\)
  *[0-9a-f]+: 0f 91 80 90 90 90 90[ ]+setno[ ]+-0x6f6f6f70\(%eax\)
  *[0-9a-f]+: 0f 92 80 90 90 90 90[ ]+setb[ ]+-0x6f6f6f70\(%eax\)
--- a/gas/testsuite/gas/i386/x86-64-branch-2.d
+++ b/gas/testsuite/gas/i386/x86-64-branch-2.d
@@ -17,4 +17,6 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 rex\.W call 18 <bar\+0xd> 14: R_X86_64_PLT32 foo-0x4
 [ ]*[a-f0-9]+: 66 c3                 retw *
 [ ]*[a-f0-9]+: 66 c2 08 00           retw   \$0x8
+[ ]*[a-f0-9]+: 66 0f 84 00 00       jew    23 <bar\+0x18> 21: R_X86_64_PC16 foo-0x2
+[ ]*[a-f0-9]+: 66 48 0f 85 00 00 00 00 data16 rex\.W jne 2b <bar\+0x20> 27: R_X86_64_PLT32 foo-0x4
 #pass
--- a/gas/testsuite/gas/i386/x86-64-branch-2.s
+++ b/gas/testsuite/gas/i386/x86-64-branch-2.s
@@ -10,3 +10,6 @@ bar:
 
  retw
  retw $8
+
+ data16 je foo
+ data16 rex.w jne foo
--- a/gas/testsuite/gas/i386/x86-64-branch-3.d
+++ b/gas/testsuite/gas/i386/x86-64-branch-3.d
@@ -19,4 +19,6 @@ Disassembly of section .text:
 [ ]*[a-f0-9]+: 66 48 c7 f8 00 00 00 00 data16 rex\.W xbegin 29 <bar\+0x1c> 25: R_X86_64_PLT32 foo-0x4
 [ ]*[a-f0-9]+: 48 ff 18             lcallq \*\(%rax\)
 [ ]*[a-f0-9]+: 48 ff 29             ljmpq  \*\(%rcx\)
+[ ]*[a-f0-9]+: 66 0f 84 00 00 00 00 data16 je 36 <bar\+0x29> 32: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: 66 48 0f 85 00 00 00 00 data16 rex\.W jne 3e <bar\+0x31> 3a: R_X86_64_PLT32 foo-0x4
 #pass
--- a/gas/testsuite/gas/i386/x86-64-branch-3.s
+++ b/gas/testsuite/gas/i386/x86-64-branch-3.s
@@ -13,3 +13,6 @@ bar:
 
  lcallq *(%rax)
  ljmpq *(%rcx)
+
+ data16 je foo
+ data16 rex.w jne foo
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1165,6 +1165,7 @@ enum
   X86_64_0F01_REG_3,
   X86_64_0F24,
   X86_64_0F26,
+  X86_64_0F8x,
   X86_64_VEX_0F3849,
   X86_64_VEX_0F384B,
   X86_64_VEX_0F385C,
@@ -1761,6 +1762,10 @@ struct dis386 {
   nothing otherwise; behave as 'P' in all other cases
 
    2 upper case letter macros:
+   "CP" => print condition encoding and continue like P if there's any form
+           of size override present, or if suffix_always is true
+   "C@" => print condition encoding and continue like @ if there's any form
+           of size override present, or if suffix_always is true
    "XY" => print 'x' or 'y' if suffix_always is true or no register
    operands and no broadcast.
    "XZ" => print 'x', 'y', or 'z' if suffix_always is true or no
@@ -2221,23 +2226,23 @@ static const struct dis386 dis386_twobyt
   { PREFIX_TABLE (PREFIX_0F7E) },
   { PREFIX_TABLE (PREFIX_0F7F) },
   /* 80 */
-  { "joH", { Jv, BND, cond_jump_flag }, 0 },
-  { "jnoH", { Jv, BND, cond_jump_flag }, 0 },
-  { "jbH", { Jv, BND, cond_jump_flag }, 0 },
-  { "jaeH", { Jv, BND, cond_jump_flag }, 0 },
-  { "jeH", { Jv, BND, cond_jump_flag }, 0 },
-  { "jneH", { Jv, BND, cond_jump_flag }, 0 },
-  { "jbeH", { Jv, BND, cond_jump_flag }, 0 },
-  { "jaH", { Jv, BND, cond_jump_flag }, 0 },
+  { X86_64_TABLE (X86_64_0F8x) },
+  { X86_64_TABLE (X86_64_0F8x) },
+  { X86_64_TABLE (X86_64_0F8x) },
+  { X86_64_TABLE (X86_64_0F8x) },
+  { X86_64_TABLE (X86_64_0F8x) },
+  { X86_64_TABLE (X86_64_0F8x) },
+  { X86_64_TABLE (X86_64_0F8x) },
+  { X86_64_TABLE (X86_64_0F8x) },
   /* 88 */
-  { "jsH", { Jv, BND, cond_jump_flag }, 0 },
-  { "jnsH", { Jv, BND, cond_jump_flag }, 0 },
-  { "jpH", { Jv, BND, cond_jump_flag }, 0 },
-  { "jnpH", { Jv, BND, cond_jump_flag }, 0 },
-  { "jlH", { Jv, BND, cond_jump_flag }, 0 },
-  { "jgeH", { Jv, BND, cond_jump_flag }, 0 },
-  { "jleH", { Jv, BND, cond_jump_flag }, 0 },
-  { "jgH", { Jv, BND, cond_jump_flag }, 0 },
+  { X86_64_TABLE (X86_64_0F8x) },
+  { X86_64_TABLE (X86_64_0F8x) },
+  { X86_64_TABLE (X86_64_0F8x) },
+  { X86_64_TABLE (X86_64_0F8x) },
+  { X86_64_TABLE (X86_64_0F8x) },
+  { X86_64_TABLE (X86_64_0F8x) },
+  { X86_64_TABLE (X86_64_0F8x) },
+  { X86_64_TABLE (X86_64_0F8x) },
   /* 90 */
   { "seto", { Eb }, 0 },
   { "setno", { Eb }, 0 },
@@ -2443,6 +2448,7 @@ static struct
   }
 modrm;
 static unsigned char need_modrm;
+static unsigned char condition_code;
 static struct
   {
     int scale;
@@ -4161,6 +4167,12 @@ static const struct dis386 x86_64_table[
     { "movZ", { Td, Em }, 0 },
   },
 
+  /* X86_64_0F8x */
+  {
+    { "j%CPH", { Jv, BND, cond_jump_flag }, 0 },
+    { "j%C@H", { Jv, BND, cond_jump_flag }, 0 },
+  },
+
   /* X86_64_VEX_0F3849 */
   {
     { Bad_Opcode },
@@ -9778,15 +9790,16 @@ print_insn (bfd_vma pc, disassemble_info
       threebyte = *codep;
       dp = &dis386_twobyte[threebyte];
       need_modrm = twobyte_has_modrm[*codep];
-      codep++;
     }
   else
     {
       dp = &dis386[*codep];
       need_modrm = onebyte_has_modrm[*codep];
-      codep++;
     }
 
+  condition_code = *codep & 0xf;
+  codep++;
+
   /* Save sizeflag for printing the extra prefixes later before updating
      it for mnemonic and operand processing.  The prefix names depend
      only on the address mode.  */
@@ -10638,6 +10651,12 @@ putop (const char *in_template, int size
       && (isa64 == intel64 || (rex & REX_W)
   || !(prefixes & PREFIX_DATA)))
     {
+      if (l == 1 && last[0] == 'C')
+ {
+  for (p = dis386[0x70 | condition_code].name + 1;
+       ISLOWER(*p); ++p)
+    *obufp++ = *p;
+ }
       if (sizeflag & SUFFIX_ALWAYS)
  *obufp++ = 'q';
       break;
@@ -10646,6 +10665,7 @@ putop (const char *in_template, int size
  case 'P':
   if (l == 0)
     {
+ case_P:
       if (((need_modrm && modrm.mod == 3) || !cond)
   && !(sizeflag & SUFFIX_ALWAYS))
  break;
@@ -10662,6 +10682,13 @@ putop (const char *in_template, int size
       else if (sizeflag & SUFFIX_ALWAYS)
  *obufp++ = 'q';
     }
+  else if (l == 1 && last[0] == 'C')
+    {
+      for (p = dis386[0x70 | condition_code].name + 1;
+   ISLOWER(*p); ++p)
+ *obufp++ = *p;
+      goto case_P;
+    }
   else if (l == 1 && last[0] == 'L')
     {
       if ((prefixes & PREFIX_DATA)
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -430,7 +430,8 @@ leave, 0, 0xc9, None, 1, Cpu64, DefaultS
          s:8, ns:9, p:a, pe:a, np:b, po:b, l:c, nge:c, nl:d, ge:d, le:e, ng:e, nle:f, g:f>
 
 // Conditional jumps.
-j<cc>, 1, 0x7<cc:opc>, None, 1, 0, Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk, { Disp8|Disp16|Disp32|Disp32S }
+j<cc>, 1, 0x7<cc:opc>, None, 1, 0, Amd64|Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk, { Disp8|Disp16|Disp32|Disp32S }
+j<cc>, 1, 0x7<cc:opc>, None, 1, Cpu64, Intel64|Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|BNDPrefixOk, { Disp8|Disp32S }
 
 // jcxz vs. jecxz is chosen on the basis of the address size prefix.
 jcxz, 1, 0xe3, None, 1, CpuNo64, JumpByte|Size16|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8 }

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[PATCH 5/5] x86: move putop() case labels to restore alphabetic sorting

Jan Beulich-2
In reply to this post by Jan Beulich-2
... as far as non-fall-through behavior permits.

opcodes/
2020-07-XX  Jan Beulich  <[hidden email]>

        * i386-dis.c (putop): Move 'V' and 'W' handling.

--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -10769,22 +10769,6 @@ putop (const char *in_template, int size
   if (!(rex & REX_W))
     used_prefixes |= (prefixes & PREFIX_DATA);
   break;
- case 'V':
-  if (l == 0)
-    abort ();
-  else if (l == 1 && last[0] == 'L')
-    {
-      if (rex & REX_W)
- {
-  *obufp++ = 'a';
-  *obufp++ = 'b';
-  *obufp++ = 's';
- }
-    }
-  else
-    abort ();
-  /* Fall through.  */
-  goto case_S;
  case 'S':
   if (l == 0)
     {
@@ -10820,6 +10804,54 @@ putop (const char *in_template, int size
   else
     abort ();
   break;
+ case 'V':
+  if (l == 0)
+    abort ();
+  else if (l == 1 && last[0] == 'L')
+    {
+      if (rex & REX_W)
+ {
+  *obufp++ = 'a';
+  *obufp++ = 'b';
+  *obufp++ = 's';
+ }
+    }
+  else
+    abort ();
+  goto case_S;
+ case 'W':
+  if (l == 0)
+    {
+      /* operand size flag for cwtl, cbtw */
+      USED_REX (REX_W);
+      if (rex & REX_W)
+ {
+  if (intel_syntax)
+    *obufp++ = 'd';
+  else
+    *obufp++ = 'l';
+ }
+      else if (sizeflag & DFLAG)
+ *obufp++ = 'w';
+      else
+ *obufp++ = 'b';
+      if (!(rex & REX_W))
+ used_prefixes |= (prefixes & PREFIX_DATA);
+    }
+  else if (l == 1)
+    {
+      if (!need_vex)
+ abort ();
+      if (last[0] == 'X')
+ *obufp++ = vex.w ? 'd': 's';
+      else if (last[0] == 'B')
+ *obufp++ = vex.w ? 'w': 'b';
+      else
+ abort ();
+    }
+  else
+    abort ();
+  break;
  case 'X':
   if (l != 0)
     abort ();
@@ -10890,39 +10922,6 @@ putop (const char *in_template, int size
     }
   else
     abort ();
-  break;
- case 'W':
-  if (l == 0)
-    {
-      /* operand size flag for cwtl, cbtw */
-      USED_REX (REX_W);
-      if (rex & REX_W)
- {
-  if (intel_syntax)
-    *obufp++ = 'd';
-  else
-    *obufp++ = 'l';
- }
-      else if (sizeflag & DFLAG)
- *obufp++ = 'w';
-      else
- *obufp++ = 'b';
-      if (!(rex & REX_W))
- used_prefixes |= (prefixes & PREFIX_DATA);
-    }
-  else if (l == 1)
-    {
-      if (!need_vex)
- abort ();
-      if (last[0] == 'X')
- *obufp++ = vex.w ? 'd': 's';
-      else if (last[0] == 'B')
- *obufp++ = vex.w ? 'w': 'b';
-      else
- abort ();
-    }
-  else
-    abort ();
   break;
  case '^':
   if (intel_syntax)

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Re: [PATCH 4/5] x86-64: Intel64 adjustments for conditional jumps

Sourceware - binutils list mailing list
In reply to this post by Jan Beulich-2
On Tue, Jul 14, 2020 at 3:13 AM Jan Beulich <[hidden email]> wrote:

>
> Just like for unconditional direct JMP (and CALL), AMD and Intel differ
> in their handling. Mirror JMP handling to Jcc.
>
> gas/
> 2020-07-XX  Jan Beulich  <[hidden email]>
>
>         * testsuite/gas/i386/x86-64-branch-2.s,
>         testsuite/gas/i386/x86-64-branch-3.s: Add Jcc cases.
>         * testsuite/gas/i386/opcode-suffix.d,
>         testsuite/gas/i386/x86-64-branch-2.d,
>         testsuite/gas/i386/x86-64-branch-3.d,
>         testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
>
> opcodes/
> 2020-07-XX  Jan Beulich  <[hidden email]>
>
>         * i386-dis.c (X86_64_0F8x): New enumerator.
>         (dis386): Describe "CP" and "C@".
>         (dis386_twobyte): Vector Jcc to X86_64_0F8x.
>         (condition_code): New.
>         (x86_64_table): Add X86_64_0F8x entry.
>         (print_insn): Set condition_code. Move advancing of codep after
>         it.
>         (putop): Handle CP and C@.
>         * i386-opc.tbl (j<cc>): Split into AMD64 and Intel64 variants.
>         * i386-tbl.h: Re-generate.
>
> --- a/gas/testsuite/gas/i386/opcode-suffix.d
> +++ b/gas/testsuite/gas/i386/opcode-suffix.d
> @@ -305,22 +305,22 @@ Disassembly of section .text:
>   *[0-9a-f]+:   0f 77[  ]+emms[         ]+
>   *[0-9a-f]+:   0f 7e 90 90 90 90 90[   ]+movd[         ]+%mm2,-0x6f6f6f70\(%eax\)
>   *[0-9a-f]+:   0f 7f 90 90 90 90 90[   ]+movq[         ]+%mm2,-0x6f6f6f70\(%eax\)
> - *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jo[   ]+909094e2 <foo\+0x909094e2>
> - *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jno[  ]+909094e8 <foo\+0x909094e8>
> - *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jb[   ]+909094ee <foo\+0x909094ee>
> - *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jae[  ]+909094f4 <foo\+0x909094f4>
> - *[0-9a-f]+:   0f 84 90 90 90 90[      ]+je[   ]+909094fa <foo\+0x909094fa>
> - *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jne[  ]+90909500 <foo\+0x90909500>
> - *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbe[  ]+90909506 <foo\+0x90909506>
> - *[0-9a-f]+:   0f 87 90 90 90 90[      ]+ja[   ]+9090950c <foo\+0x9090950c>
> - *[0-9a-f]+:   0f 88 90 90 90 90[      ]+js[   ]+90909512 <foo\+0x90909512>
> - *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jns[  ]+90909518 <foo\+0x90909518>
> - *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jp[   ]+9090951e <foo\+0x9090951e>
> - *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnp[  ]+90909524 <foo\+0x90909524>
> - *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jl[   ]+9090952a <foo\+0x9090952a>
> - *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jge[  ]+90909530 <foo\+0x90909530>
> - *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jle[  ]+90909536 <foo\+0x90909536>
> - *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jg[   ]+9090953c <foo\+0x9090953c>
> + *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jol[  ]+909094e2 <foo\+0x909094e2>
> + *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jnol[         ]+909094e8 <foo\+0x909094e8>
> + *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jbl[  ]+909094ee <foo\+0x909094ee>
> + *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jael[         ]+909094f4 <foo\+0x909094f4>
> + *[0-9a-f]+:   0f 84 90 90 90 90[      ]+jel[  ]+909094fa <foo\+0x909094fa>
> + *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jnel[         ]+90909500 <foo\+0x90909500>
> + *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbel[         ]+90909506 <foo\+0x90909506>
> + *[0-9a-f]+:   0f 87 90 90 90 90[      ]+jal[  ]+9090950c <foo\+0x9090950c>
> + *[0-9a-f]+:   0f 88 90 90 90 90[      ]+jsl[  ]+90909512 <foo\+0x90909512>
> + *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jnsl[         ]+90909518 <foo\+0x90909518>
> + *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jpl[  ]+9090951e <foo\+0x9090951e>
> + *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnpl[         ]+90909524 <foo\+0x90909524>
> + *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jll[  ]+9090952a <foo\+0x9090952a>
> + *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jgel[         ]+90909530 <foo\+0x90909530>
> + *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jlel[         ]+90909536 <foo\+0x90909536>
> + *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jgl[  ]+9090953c <foo\+0x9090953c>
>   *[0-9a-f]+:   0f 90 80 90 90 90 90[   ]+seto[         ]+-0x6f6f6f70\(%eax\)
>   *[0-9a-f]+:   0f 91 80 90 90 90 90[   ]+setno[        ]+-0x6f6f6f70\(%eax\)
>   *[0-9a-f]+:   0f 92 80 90 90 90 90[   ]+setb[         ]+-0x6f6f6f70\(%eax\)

There are instructions like jl and jnl.  Will assembler properly
handle `l' as a suffix
here? If we do need to distinguish them, can we generate {disp32} pseudo prefix
instead?

--
H.J.
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Re: [PATCH 4/5] x86-64: Intel64 adjustments for conditional jumps

Jan Beulich-2
On 14.07.2020 14:00, H.J. Lu wrote:

> On Tue, Jul 14, 2020 at 3:13 AM Jan Beulich <[hidden email]> wrote:
>> --- a/gas/testsuite/gas/i386/opcode-suffix.d
>> +++ b/gas/testsuite/gas/i386/opcode-suffix.d
>> @@ -305,22 +305,22 @@ Disassembly of section .text:
>>   *[0-9a-f]+:   0f 77[  ]+emms[         ]+
>>   *[0-9a-f]+:   0f 7e 90 90 90 90 90[   ]+movd[         ]+%mm2,-0x6f6f6f70\(%eax\)
>>   *[0-9a-f]+:   0f 7f 90 90 90 90 90[   ]+movq[         ]+%mm2,-0x6f6f6f70\(%eax\)
>> - *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jo[   ]+909094e2 <foo\+0x909094e2>
>> - *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jno[  ]+909094e8 <foo\+0x909094e8>
>> - *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jb[   ]+909094ee <foo\+0x909094ee>
>> - *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jae[  ]+909094f4 <foo\+0x909094f4>
>> - *[0-9a-f]+:   0f 84 90 90 90 90[      ]+je[   ]+909094fa <foo\+0x909094fa>
>> - *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jne[  ]+90909500 <foo\+0x90909500>
>> - *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbe[  ]+90909506 <foo\+0x90909506>
>> - *[0-9a-f]+:   0f 87 90 90 90 90[      ]+ja[   ]+9090950c <foo\+0x9090950c>
>> - *[0-9a-f]+:   0f 88 90 90 90 90[      ]+js[   ]+90909512 <foo\+0x90909512>
>> - *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jns[  ]+90909518 <foo\+0x90909518>
>> - *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jp[   ]+9090951e <foo\+0x9090951e>
>> - *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnp[  ]+90909524 <foo\+0x90909524>
>> - *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jl[   ]+9090952a <foo\+0x9090952a>
>> - *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jge[  ]+90909530 <foo\+0x90909530>
>> - *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jle[  ]+90909536 <foo\+0x90909536>
>> - *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jg[   ]+9090953c <foo\+0x9090953c>
>> + *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jol[  ]+909094e2 <foo\+0x909094e2>
>> + *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jnol[         ]+909094e8 <foo\+0x909094e8>
>> + *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jbl[  ]+909094ee <foo\+0x909094ee>
>> + *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jael[         ]+909094f4 <foo\+0x909094f4>
>> + *[0-9a-f]+:   0f 84 90 90 90 90[      ]+jel[  ]+909094fa <foo\+0x909094fa>
>> + *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jnel[         ]+90909500 <foo\+0x90909500>
>> + *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbel[         ]+90909506 <foo\+0x90909506>
>> + *[0-9a-f]+:   0f 87 90 90 90 90[      ]+jal[  ]+9090950c <foo\+0x9090950c>
>> + *[0-9a-f]+:   0f 88 90 90 90 90[      ]+jsl[  ]+90909512 <foo\+0x90909512>
>> + *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jnsl[         ]+90909518 <foo\+0x90909518>
>> + *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jpl[  ]+9090951e <foo\+0x9090951e>
>> + *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnpl[         ]+90909524 <foo\+0x90909524>
>> + *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jll[  ]+9090952a <foo\+0x9090952a>
>> + *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jgel[         ]+90909530 <foo\+0x90909530>
>> + *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jlel[         ]+90909536 <foo\+0x90909536>
>> + *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jgl[  ]+9090953c <foo\+0x9090953c>
>>   *[0-9a-f]+:   0f 90 80 90 90 90 90[   ]+seto[         ]+-0x6f6f6f70\(%eax\)
>>   *[0-9a-f]+:   0f 91 80 90 90 90 90[   ]+setno[        ]+-0x6f6f6f70\(%eax\)
>>   *[0-9a-f]+:   0f 92 80 90 90 90 90[   ]+setb[         ]+-0x6f6f6f70\(%eax\)
>
> There are instructions like jl and jnl.  Will assembler properly
> handle `l' as a suffix here?

j<cc> as well as jmp (with displacement) have No_lSuf set, so won't
accept l suffixes (same for the w one). Nevertheless already prior
to this change the disassembler will produce "jmpl" (and "jmpw").
IOW a disagreement between disassembler and assembler already exists.

> If we do need to distinguish them, can we generate {disp32} pseudo prefix
> instead?

We could, but then consistently for Jcc, JMP, and CALL. But how is
emitting a pseudo-prefix in line with the name of the controlling
command line option "-Msuffix"?

Jan
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Re: [PATCH 4/5] x86-64: Intel64 adjustments for conditional jumps

Jan Beulich-2
On 14.07.2020 14:18, Jan Beulich wrote:

> On 14.07.2020 14:00, H.J. Lu wrote:
>> On Tue, Jul 14, 2020 at 3:13 AM Jan Beulich <[hidden email]> wrote:
>>> --- a/gas/testsuite/gas/i386/opcode-suffix.d
>>> +++ b/gas/testsuite/gas/i386/opcode-suffix.d
>>> @@ -305,22 +305,22 @@ Disassembly of section .text:
>>>   *[0-9a-f]+:   0f 77[  ]+emms[         ]+
>>>   *[0-9a-f]+:   0f 7e 90 90 90 90 90[   ]+movd[         ]+%mm2,-0x6f6f6f70\(%eax\)
>>>   *[0-9a-f]+:   0f 7f 90 90 90 90 90[   ]+movq[         ]+%mm2,-0x6f6f6f70\(%eax\)
>>> - *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jo[   ]+909094e2 <foo\+0x909094e2>
>>> - *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jno[  ]+909094e8 <foo\+0x909094e8>
>>> - *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jb[   ]+909094ee <foo\+0x909094ee>
>>> - *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jae[  ]+909094f4 <foo\+0x909094f4>
>>> - *[0-9a-f]+:   0f 84 90 90 90 90[      ]+je[   ]+909094fa <foo\+0x909094fa>
>>> - *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jne[  ]+90909500 <foo\+0x90909500>
>>> - *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbe[  ]+90909506 <foo\+0x90909506>
>>> - *[0-9a-f]+:   0f 87 90 90 90 90[      ]+ja[   ]+9090950c <foo\+0x9090950c>
>>> - *[0-9a-f]+:   0f 88 90 90 90 90[      ]+js[   ]+90909512 <foo\+0x90909512>
>>> - *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jns[  ]+90909518 <foo\+0x90909518>
>>> - *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jp[   ]+9090951e <foo\+0x9090951e>
>>> - *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnp[  ]+90909524 <foo\+0x90909524>
>>> - *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jl[   ]+9090952a <foo\+0x9090952a>
>>> - *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jge[  ]+90909530 <foo\+0x90909530>
>>> - *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jle[  ]+90909536 <foo\+0x90909536>
>>> - *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jg[   ]+9090953c <foo\+0x9090953c>
>>> + *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jol[  ]+909094e2 <foo\+0x909094e2>
>>> + *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jnol[         ]+909094e8 <foo\+0x909094e8>
>>> + *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jbl[  ]+909094ee <foo\+0x909094ee>
>>> + *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jael[         ]+909094f4 <foo\+0x909094f4>
>>> + *[0-9a-f]+:   0f 84 90 90 90 90[      ]+jel[  ]+909094fa <foo\+0x909094fa>
>>> + *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jnel[         ]+90909500 <foo\+0x90909500>
>>> + *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbel[         ]+90909506 <foo\+0x90909506>
>>> + *[0-9a-f]+:   0f 87 90 90 90 90[      ]+jal[  ]+9090950c <foo\+0x9090950c>
>>> + *[0-9a-f]+:   0f 88 90 90 90 90[      ]+jsl[  ]+90909512 <foo\+0x90909512>
>>> + *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jnsl[         ]+90909518 <foo\+0x90909518>
>>> + *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jpl[  ]+9090951e <foo\+0x9090951e>
>>> + *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnpl[         ]+90909524 <foo\+0x90909524>
>>> + *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jll[  ]+9090952a <foo\+0x9090952a>
>>> + *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jgel[         ]+90909530 <foo\+0x90909530>
>>> + *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jlel[         ]+90909536 <foo\+0x90909536>
>>> + *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jgl[  ]+9090953c <foo\+0x9090953c>
>>>   *[0-9a-f]+:   0f 90 80 90 90 90 90[   ]+seto[         ]+-0x6f6f6f70\(%eax\)
>>>   *[0-9a-f]+:   0f 91 80 90 90 90 90[   ]+setno[        ]+-0x6f6f6f70\(%eax\)
>>>   *[0-9a-f]+:   0f 92 80 90 90 90 90[   ]+setb[         ]+-0x6f6f6f70\(%eax\)
>>
>> There are instructions like jl and jnl.  Will assembler properly
>> handle `l' as a suffix here?
>
> j<cc> as well as jmp (with displacement) have No_lSuf set, so won't
> accept l suffixes (same for the w one). Nevertheless already prior
> to this change the disassembler will produce "jmpl" (and "jmpw").
> IOW a disagreement between disassembler and assembler already exists.
>
>> If we do need to distinguish them, can we generate {disp32} pseudo prefix
>> instead?
>
> We could, but then consistently for Jcc, JMP, and CALL. But how is
> emitting a pseudo-prefix in line with the name of the controlling
> command line option "-Msuffix"?

FAOD to achieve consistency I think the preferred route would then
be for the assembler to accept l and w suffixes for Jcc and JMP.
Not sure though what fallout this may mean.

Jan
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Re: [PATCH 4/5] x86-64: Intel64 adjustments for conditional jumps

Sourceware - binutils list mailing list
On Tue, Jul 14, 2020 at 5:20 AM Jan Beulich <[hidden email]> wrote:

>
> On 14.07.2020 14:18, Jan Beulich wrote:
> > On 14.07.2020 14:00, H.J. Lu wrote:
> >> On Tue, Jul 14, 2020 at 3:13 AM Jan Beulich <[hidden email]> wrote:
> >>> --- a/gas/testsuite/gas/i386/opcode-suffix.d
> >>> +++ b/gas/testsuite/gas/i386/opcode-suffix.d
> >>> @@ -305,22 +305,22 @@ Disassembly of section .text:
> >>>   *[0-9a-f]+:   0f 77[  ]+emms[         ]+
> >>>   *[0-9a-f]+:   0f 7e 90 90 90 90 90[   ]+movd[         ]+%mm2,-0x6f6f6f70\(%eax\)
> >>>   *[0-9a-f]+:   0f 7f 90 90 90 90 90[   ]+movq[         ]+%mm2,-0x6f6f6f70\(%eax\)
> >>> - *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jo[   ]+909094e2 <foo\+0x909094e2>
> >>> - *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jno[  ]+909094e8 <foo\+0x909094e8>
> >>> - *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jb[   ]+909094ee <foo\+0x909094ee>
> >>> - *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jae[  ]+909094f4 <foo\+0x909094f4>
> >>> - *[0-9a-f]+:   0f 84 90 90 90 90[      ]+je[   ]+909094fa <foo\+0x909094fa>
> >>> - *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jne[  ]+90909500 <foo\+0x90909500>
> >>> - *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbe[  ]+90909506 <foo\+0x90909506>
> >>> - *[0-9a-f]+:   0f 87 90 90 90 90[      ]+ja[   ]+9090950c <foo\+0x9090950c>
> >>> - *[0-9a-f]+:   0f 88 90 90 90 90[      ]+js[   ]+90909512 <foo\+0x90909512>
> >>> - *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jns[  ]+90909518 <foo\+0x90909518>
> >>> - *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jp[   ]+9090951e <foo\+0x9090951e>
> >>> - *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnp[  ]+90909524 <foo\+0x90909524>
> >>> - *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jl[   ]+9090952a <foo\+0x9090952a>
> >>> - *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jge[  ]+90909530 <foo\+0x90909530>
> >>> - *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jle[  ]+90909536 <foo\+0x90909536>
> >>> - *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jg[   ]+9090953c <foo\+0x9090953c>
> >>> + *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jol[  ]+909094e2 <foo\+0x909094e2>
> >>> + *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jnol[         ]+909094e8 <foo\+0x909094e8>
> >>> + *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jbl[  ]+909094ee <foo\+0x909094ee>
> >>> + *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jael[         ]+909094f4 <foo\+0x909094f4>
> >>> + *[0-9a-f]+:   0f 84 90 90 90 90[      ]+jel[  ]+909094fa <foo\+0x909094fa>
> >>> + *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jnel[         ]+90909500 <foo\+0x90909500>
> >>> + *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbel[         ]+90909506 <foo\+0x90909506>
> >>> + *[0-9a-f]+:   0f 87 90 90 90 90[      ]+jal[  ]+9090950c <foo\+0x9090950c>
> >>> + *[0-9a-f]+:   0f 88 90 90 90 90[      ]+jsl[  ]+90909512 <foo\+0x90909512>
> >>> + *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jnsl[         ]+90909518 <foo\+0x90909518>
> >>> + *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jpl[  ]+9090951e <foo\+0x9090951e>
> >>> + *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnpl[         ]+90909524 <foo\+0x90909524>
> >>> + *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jll[  ]+9090952a <foo\+0x9090952a>
> >>> + *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jgel[         ]+90909530 <foo\+0x90909530>
> >>> + *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jlel[         ]+90909536 <foo\+0x90909536>
> >>> + *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jgl[  ]+9090953c <foo\+0x9090953c>
> >>>   *[0-9a-f]+:   0f 90 80 90 90 90 90[   ]+seto[         ]+-0x6f6f6f70\(%eax\)
> >>>   *[0-9a-f]+:   0f 91 80 90 90 90 90[   ]+setno[        ]+-0x6f6f6f70\(%eax\)
> >>>   *[0-9a-f]+:   0f 92 80 90 90 90 90[   ]+setb[         ]+-0x6f6f6f70\(%eax\)
> >>
> >> There are instructions like jl and jnl.  Will assembler properly
> >> handle `l' as a suffix here?
> >
> > j<cc> as well as jmp (with displacement) have No_lSuf set, so won't
> > accept l suffixes (same for the w one). Nevertheless already prior
> > to this change the disassembler will produce "jmpl" (and "jmpw").
> > IOW a disagreement between disassembler and assembler already exists.

We should avoid it as much as we can.

> >> If we do need to distinguish them, can we generate {disp32} pseudo prefix
> >> instead?
> >
> > We could, but then consistently for Jcc, JMP, and CALL. But how is
> > emitting a pseudo-prefix in line with the name of the controlling
> > command line option "-Msuffix"?

That works for me.

> FAOD to achieve consistency I think the preferred route would then
> be for the assembler to accept l and w suffixes for Jcc and JMP.
> Not sure though what fallout this may mean.

That could be quite messy.  I think pseudo prefix is much less invasive.

--
H.J.
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Re: [PATCH 4/5] x86-64: Intel64 adjustments for conditional jumps

Jan Beulich-2
On 14.07.2020 14:36, H.J. Lu wrote:

> On Tue, Jul 14, 2020 at 5:20 AM Jan Beulich <[hidden email]> wrote:
>>
>> On 14.07.2020 14:18, Jan Beulich wrote:
>>> On 14.07.2020 14:00, H.J. Lu wrote:
>>>> On Tue, Jul 14, 2020 at 3:13 AM Jan Beulich <[hidden email]> wrote:
>>>>> --- a/gas/testsuite/gas/i386/opcode-suffix.d
>>>>> +++ b/gas/testsuite/gas/i386/opcode-suffix.d
>>>>> @@ -305,22 +305,22 @@ Disassembly of section .text:
>>>>>   *[0-9a-f]+:   0f 77[  ]+emms[         ]+
>>>>>   *[0-9a-f]+:   0f 7e 90 90 90 90 90[   ]+movd[         ]+%mm2,-0x6f6f6f70\(%eax\)
>>>>>   *[0-9a-f]+:   0f 7f 90 90 90 90 90[   ]+movq[         ]+%mm2,-0x6f6f6f70\(%eax\)
>>>>> - *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jo[   ]+909094e2 <foo\+0x909094e2>
>>>>> - *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jno[  ]+909094e8 <foo\+0x909094e8>
>>>>> - *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jb[   ]+909094ee <foo\+0x909094ee>
>>>>> - *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jae[  ]+909094f4 <foo\+0x909094f4>
>>>>> - *[0-9a-f]+:   0f 84 90 90 90 90[      ]+je[   ]+909094fa <foo\+0x909094fa>
>>>>> - *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jne[  ]+90909500 <foo\+0x90909500>
>>>>> - *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbe[  ]+90909506 <foo\+0x90909506>
>>>>> - *[0-9a-f]+:   0f 87 90 90 90 90[      ]+ja[   ]+9090950c <foo\+0x9090950c>
>>>>> - *[0-9a-f]+:   0f 88 90 90 90 90[      ]+js[   ]+90909512 <foo\+0x90909512>
>>>>> - *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jns[  ]+90909518 <foo\+0x90909518>
>>>>> - *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jp[   ]+9090951e <foo\+0x9090951e>
>>>>> - *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnp[  ]+90909524 <foo\+0x90909524>
>>>>> - *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jl[   ]+9090952a <foo\+0x9090952a>
>>>>> - *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jge[  ]+90909530 <foo\+0x90909530>
>>>>> - *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jle[  ]+90909536 <foo\+0x90909536>
>>>>> - *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jg[   ]+9090953c <foo\+0x9090953c>
>>>>> + *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jol[  ]+909094e2 <foo\+0x909094e2>
>>>>> + *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jnol[         ]+909094e8 <foo\+0x909094e8>
>>>>> + *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jbl[  ]+909094ee <foo\+0x909094ee>
>>>>> + *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jael[         ]+909094f4 <foo\+0x909094f4>
>>>>> + *[0-9a-f]+:   0f 84 90 90 90 90[      ]+jel[  ]+909094fa <foo\+0x909094fa>
>>>>> + *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jnel[         ]+90909500 <foo\+0x90909500>
>>>>> + *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbel[         ]+90909506 <foo\+0x90909506>
>>>>> + *[0-9a-f]+:   0f 87 90 90 90 90[      ]+jal[  ]+9090950c <foo\+0x9090950c>
>>>>> + *[0-9a-f]+:   0f 88 90 90 90 90[      ]+jsl[  ]+90909512 <foo\+0x90909512>
>>>>> + *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jnsl[         ]+90909518 <foo\+0x90909518>
>>>>> + *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jpl[  ]+9090951e <foo\+0x9090951e>
>>>>> + *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnpl[         ]+90909524 <foo\+0x90909524>
>>>>> + *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jll[  ]+9090952a <foo\+0x9090952a>
>>>>> + *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jgel[         ]+90909530 <foo\+0x90909530>
>>>>> + *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jlel[         ]+90909536 <foo\+0x90909536>
>>>>> + *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jgl[  ]+9090953c <foo\+0x9090953c>
>>>>>   *[0-9a-f]+:   0f 90 80 90 90 90 90[   ]+seto[         ]+-0x6f6f6f70\(%eax\)
>>>>>   *[0-9a-f]+:   0f 91 80 90 90 90 90[   ]+setno[        ]+-0x6f6f6f70\(%eax\)
>>>>>   *[0-9a-f]+:   0f 92 80 90 90 90 90[   ]+setb[         ]+-0x6f6f6f70\(%eax\)
>>>>
>>>> There are instructions like jl and jnl.  Will assembler properly
>>>> handle `l' as a suffix here?
>>>
>>> j<cc> as well as jmp (with displacement) have No_lSuf set, so won't
>>> accept l suffixes (same for the w one). Nevertheless already prior
>>> to this change the disassembler will produce "jmpl" (and "jmpw").
>>> IOW a disagreement between disassembler and assembler already exists.
>
> We should avoid it as much as we can.
>
>>>> If we do need to distinguish them, can we generate {disp32} pseudo prefix
>>>> instead?
>>>
>>> We could, but then consistently for Jcc, JMP, and CALL. But how is
>>> emitting a pseudo-prefix in line with the name of the controlling
>>> command line option "-Msuffix"?
>
> That works for me.

Okay, but you didn't answer my question.

>> FAOD to achieve consistency I think the preferred route would then
>> be for the assembler to accept l and w suffixes for Jcc and JMP.
>> Not sure though what fallout this may mean.
>
> That could be quite messy.

I guess I'd still prefer to try that first, and resort to the
alternative only if it really turns out to be.

>  I think pseudo prefix is much less invasive.

Maybe to the disassembler; I'm less sure about the testsuites of both
gas and ld.

Actually - if we were to go this route, then why pseudo prefixes in
the first place? We already emit data{16,32} prefixes for other
reasons, so we could do so here as well in place of the suffixes.

Jan
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Re: [PATCH 4/5] x86-64: Intel64 adjustments for conditional jumps

Sourceware - binutils list mailing list
On Tue, Jul 14, 2020 at 5:47 AM Jan Beulich <[hidden email]> wrote:

>
> On 14.07.2020 14:36, H.J. Lu wrote:
> > On Tue, Jul 14, 2020 at 5:20 AM Jan Beulich <[hidden email]> wrote:
> >>
> >> On 14.07.2020 14:18, Jan Beulich wrote:
> >>> On 14.07.2020 14:00, H.J. Lu wrote:
> >>>> On Tue, Jul 14, 2020 at 3:13 AM Jan Beulich <[hidden email]> wrote:
> >>>>> --- a/gas/testsuite/gas/i386/opcode-suffix.d
> >>>>> +++ b/gas/testsuite/gas/i386/opcode-suffix.d
> >>>>> @@ -305,22 +305,22 @@ Disassembly of section .text:
> >>>>>   *[0-9a-f]+:   0f 77[  ]+emms[         ]+
> >>>>>   *[0-9a-f]+:   0f 7e 90 90 90 90 90[   ]+movd[         ]+%mm2,-0x6f6f6f70\(%eax\)
> >>>>>   *[0-9a-f]+:   0f 7f 90 90 90 90 90[   ]+movq[         ]+%mm2,-0x6f6f6f70\(%eax\)
> >>>>> - *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jo[   ]+909094e2 <foo\+0x909094e2>
> >>>>> - *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jno[  ]+909094e8 <foo\+0x909094e8>
> >>>>> - *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jb[   ]+909094ee <foo\+0x909094ee>
> >>>>> - *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jae[  ]+909094f4 <foo\+0x909094f4>
> >>>>> - *[0-9a-f]+:   0f 84 90 90 90 90[      ]+je[   ]+909094fa <foo\+0x909094fa>
> >>>>> - *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jne[  ]+90909500 <foo\+0x90909500>
> >>>>> - *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbe[  ]+90909506 <foo\+0x90909506>
> >>>>> - *[0-9a-f]+:   0f 87 90 90 90 90[      ]+ja[   ]+9090950c <foo\+0x9090950c>
> >>>>> - *[0-9a-f]+:   0f 88 90 90 90 90[      ]+js[   ]+90909512 <foo\+0x90909512>
> >>>>> - *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jns[  ]+90909518 <foo\+0x90909518>
> >>>>> - *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jp[   ]+9090951e <foo\+0x9090951e>
> >>>>> - *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnp[  ]+90909524 <foo\+0x90909524>
> >>>>> - *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jl[   ]+9090952a <foo\+0x9090952a>
> >>>>> - *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jge[  ]+90909530 <foo\+0x90909530>
> >>>>> - *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jle[  ]+90909536 <foo\+0x90909536>
> >>>>> - *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jg[   ]+9090953c <foo\+0x9090953c>
> >>>>> + *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jol[  ]+909094e2 <foo\+0x909094e2>
> >>>>> + *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jnol[         ]+909094e8 <foo\+0x909094e8>
> >>>>> + *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jbl[  ]+909094ee <foo\+0x909094ee>
> >>>>> + *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jael[         ]+909094f4 <foo\+0x909094f4>
> >>>>> + *[0-9a-f]+:   0f 84 90 90 90 90[      ]+jel[  ]+909094fa <foo\+0x909094fa>
> >>>>> + *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jnel[         ]+90909500 <foo\+0x90909500>
> >>>>> + *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbel[         ]+90909506 <foo\+0x90909506>
> >>>>> + *[0-9a-f]+:   0f 87 90 90 90 90[      ]+jal[  ]+9090950c <foo\+0x9090950c>
> >>>>> + *[0-9a-f]+:   0f 88 90 90 90 90[      ]+jsl[  ]+90909512 <foo\+0x90909512>
> >>>>> + *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jnsl[         ]+90909518 <foo\+0x90909518>
> >>>>> + *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jpl[  ]+9090951e <foo\+0x9090951e>
> >>>>> + *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnpl[         ]+90909524 <foo\+0x90909524>
> >>>>> + *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jll[  ]+9090952a <foo\+0x9090952a>
> >>>>> + *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jgel[         ]+90909530 <foo\+0x90909530>
> >>>>> + *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jlel[         ]+90909536 <foo\+0x90909536>
> >>>>> + *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jgl[  ]+9090953c <foo\+0x9090953c>
> >>>>>   *[0-9a-f]+:   0f 90 80 90 90 90 90[   ]+seto[         ]+-0x6f6f6f70\(%eax\)
> >>>>>   *[0-9a-f]+:   0f 91 80 90 90 90 90[   ]+setno[        ]+-0x6f6f6f70\(%eax\)
> >>>>>   *[0-9a-f]+:   0f 92 80 90 90 90 90[   ]+setb[         ]+-0x6f6f6f70\(%eax\)
> >>>>
> >>>> There are instructions like jl and jnl.  Will assembler properly
> >>>> handle `l' as a suffix here?
> >>>
> >>> j<cc> as well as jmp (with displacement) have No_lSuf set, so won't
> >>> accept l suffixes (same for the w one). Nevertheless already prior
> >>> to this change the disassembler will produce "jmpl" (and "jmpw").
> >>> IOW a disagreement between disassembler and assembler already exists.
> >
> > We should avoid it as much as we can.
> >
> >>>> If we do need to distinguish them, can we generate {disp32} pseudo prefix
> >>>> instead?
> >>>
> >>> We could, but then consistently for Jcc, JMP, and CALL. But how is
> >>> emitting a pseudo-prefix in line with the name of the controlling
> >>> command line option "-Msuffix"?
> >
> > That works for me.
>
> Okay, but you didn't answer my question.

We can always generate pseudo prefix.

>
>
> >> FAOD to achieve consistency I think the preferred route would then
> >> be for the assembler to accept l and w suffixes for Jcc and JMP.
> >> Not sure though what fallout this may mean.
> >
> > That could be quite messy.
>
> I guess I'd still prefer to try that first, and resort to the
> alternative only if it really turns out to be.

Please give it a try.

> >  I think pseudo prefix is much less invasive.
>
> Maybe to the disassembler; I'm less sure about the testsuites of both
> gas and ld.
>
> Actually - if we were to go this route, then why pseudo prefixes in
> the first place? We already emit data{16,32} prefixes for other
> reasons, so we could do so here as well in place of the suffixes.

There is data32 prefix.  But there is no disp32 prefix.  I call it
pseudo prefix.

--
H.J.
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Re: [PATCH 1/5] x86: avoid attaching suffixes to unambiguous insns

Sourceware - binutils list mailing list
In reply to this post by Jan Beulich-2
On Tue, Jul 14, 2020 at 12:12:21PM +0200, Jan Beulich wrote:

> "Unambiguous" is is in particular taking as reference the assembler,
> which also accepts certain insns - despite them allowing for varying
> operand size, and hence in principle being ambiguous - without any
> suffix. For example, from the very beginning of the life of x86-64 I had
> trouble understanding why a plain and simple RET had to be printed as
> RETQ. In case someone really used the 16-bit form, RETW disambiguates
> the two quite fine.
>
> gas/
> 2020-07-XX  Jan Beulich  <[hidden email]>
>
> * testsuite/gas/i386/disassem.d,
> testsuite/gas/i386/ilp32/x86-64-branch.d,
> testsuite/gas/i386/intel.d, testsuite/gas/i386/jump16.d,
> testsuite/gas/i386/lfence-load.d, testsuite/gas/i386/noreg16.d,
> testsuite/gas/i386/noreg32.d,
> testsuite/gas/i386/noreg64-rex64.d,
> testsuite/gas/i386/noreg64.d, testsuite/gas/i386/notrack.d,
> testsuite/gas/i386/opcode.d,
> testsuite/gas/i386/solaris/x86-64-branch-2.d,
> testsuite/gas/i386/solaris/x86-64-jump.d,
> testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d,
> testsuite/gas/i386/solaris/x86-64-nop-3.d,
> testsuite/gas/i386/solaris/x86-64-nop-4.d,
> testsuite/gas/i386/solaris/x86-64-nop-5.d,
> testsuite/gas/i386/solaris/x86-64-relax-2.d,
> testsuite/gas/i386/solaris/x86-64-relax-3.d,
> testsuite/gas/i386/x86-64-align-branch-1a.d,
> testsuite/gas/i386/x86-64-align-branch-1b.d,
> testsuite/gas/i386/x86-64-align-branch-1c.d,
> testsuite/gas/i386/x86-64-align-branch-1d.d,
> testsuite/gas/i386/x86-64-align-branch-1e.d,
> testsuite/gas/i386/x86-64-align-branch-1f.d,
> testsuite/gas/i386/x86-64-align-branch-1g.d,
> testsuite/gas/i386/x86-64-align-branch-1h.d,
> testsuite/gas/i386/x86-64-align-branch-1i.d,
> testsuite/gas/i386/x86-64-align-branch-2a.d,
> testsuite/gas/i386/x86-64-align-branch-2b.d,
> testsuite/gas/i386/x86-64-align-branch-2c.d,
> testsuite/gas/i386/x86-64-align-branch-3.d,
> testsuite/gas/i386/x86-64-align-branch-4a.d,
> testsuite/gas/i386/x86-64-align-branch-4b.d,
> testsuite/gas/i386/x86-64-align-branch-5.d,
> testsuite/gas/i386/x86-64-align-branch-6.d,
> testsuite/gas/i386/x86-64-branch-2.d,
> testsuite/gas/i386/x86-64-branch-3.d,
> testsuite/gas/i386/x86-64-branch.d,
> testsuite/gas/i386/x86-64-disassem.d,
> testsuite/gas/i386/x86-64-disp32.d,
> testsuite/gas/i386/x86-64-gotpcrel-no-relax.d,
> testsuite/gas/i386/x86-64-gotpcrel.d,
> testsuite/gas/i386/x86-64-ifunc.d,
> testsuite/gas/i386/x86-64-jump.d,
> testsuite/gas/i386/x86-64-lfence-byte.d,
> testsuite/gas/i386/x86-64-lfence-indbr-a.d,
> testsuite/gas/i386/x86-64-lfence-indbr-b.d,
> testsuite/gas/i386/x86-64-lfence-indbr-c.d,
> testsuite/gas/i386/x86-64-lfence-load.d,
> testsuite/gas/i386/x86-64-lfence-ret-a.d,
> testsuite/gas/i386/x86-64-lfence-ret-b.d,
> testsuite/gas/i386/x86-64-lfence-ret-c.d,
> testsuite/gas/i386/x86-64-lfence-ret-d.d,
> testsuite/gas/i386/x86-64-lfence-ret-e.d,
> testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.d,
> testsuite/gas/i386/x86-64-mpx-branch-1.d,
> testsuite/gas/i386/x86-64-mpx.d,
> testsuite/gas/i386/x86-64-nop-3.d,
> testsuite/gas/i386/x86-64-nop-4.d,
> testsuite/gas/i386/x86-64-nop-5.d,
> testsuite/gas/i386/x86-64-nops-7.d,
> testsuite/gas/i386/x86-64-notrack.d,
> testsuite/gas/i386/x86-64-opcode.d,
> testsuite/gas/i386/x86-64-relax-2.d,
> testsuite/gas/i386/x86-64-relax-3.d,
> testsuite/gas/i386/x86-64-relax-4.d,
> testsuite/gas/i386/x86-64-rtm.d,
> testsuite/gas/i386/x86-64-stack.d,
> testsuite/gas/i386/x86-64-unique.d,
> testsuite/gas/i386/x86_64-intel.d: Adjust expectations.
>
> ld/
> 2020-07-XX  Jan Beulich  <[hidden email]>
>
> * testsuite/ld-i386/ibt-plt-1.d, testsuite/ld-i386/ibt-plt-2a.d,
> testsuite/ld-i386/ibt-plt-2c.d, testsuite/ld-i386/ibt-plt-3a.d,
> testsuite/ld-i386/ibt-plt-3c.d, testsuite/ld-i386/plt-pic.pd,
> testsuite/ld-i386/plt-pic2.dd, testsuite/ld-i386/plt.pd,
> testsuite/ld-i386/plt2.dd, testsuite/ld-i386/pr19636-1d.d,
> testsuite/ld-i386/pr19636-1l.d, testsuite/ld-i386/pr19636-2c.d,
> testsuite/ld-i386/pr20830.d, testsuite/ld-i386/vxworks1-lib.dd,
> testsuite/ld-i386/vxworks1.dd,
> testsuite/ld-ifunc/ifunc-2-i386-now.d,
> testsuite/ld-ifunc/ifunc-2-local-i386-now.d,
> testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d,
> testsuite/ld-ifunc/ifunc-2-x86-64-now.d,
> testsuite/ld-ifunc/ifunc-21-x86-64.d,
> testsuite/ld-ifunc/ifunc-22-x86-64.d,
> testsuite/ld-ifunc/pr17154-i386-now.d,
> testsuite/ld-ifunc/pr17154-i386.d,
> testsuite/ld-ifunc/pr17154-x86-64-now.d,
> testsuite/ld-ifunc/pr17154-x86-64.d,
> testsuite/ld-x86-64/align-branch-1.d,
> testsuite/ld-x86-64/bnd-branch-1-now.d,
> testsuite/ld-x86-64/bnd-branch-1.d,
> testsuite/ld-x86-64/bnd-ifunc-1-now.d,
> testsuite/ld-x86-64/bnd-ifunc-1.d,
> testsuite/ld-x86-64/bnd-ifunc-2-now.d,
> testsuite/ld-x86-64/bnd-ifunc-2.d,
> testsuite/ld-x86-64/bnd-plt-1-now.d,
> testsuite/ld-x86-64/bnd-plt-1.d,
> testsuite/ld-x86-64/call1a.d, testsuite/ld-x86-64/call1b.d,
> testsuite/ld-x86-64/call1d.d, testsuite/ld-x86-64/call1e.d,
> testsuite/ld-x86-64/call1f.d, testsuite/ld-x86-64/call1g.d,
> testsuite/ld-x86-64/call1h.d, testsuite/ld-x86-64/call1i.d,
> testsuite/ld-x86-64/gotpcrel1.dd,
> testsuite/ld-x86-64/hidden2.d,
> testsuite/ld-x86-64/ibt-plt-1-x32.d,
> testsuite/ld-x86-64/ibt-plt-1.d,
> testsuite/ld-x86-64/ibt-plt-2a-x32.d,
> testsuite/ld-x86-64/ibt-plt-2a.d,
> testsuite/ld-x86-64/ibt-plt-2c-x32.d,
> testsuite/ld-x86-64/ibt-plt-2c.d,
> testsuite/ld-x86-64/ibt-plt-3a-x32.d,
> testsuite/ld-x86-64/ibt-plt-3a.d,
> testsuite/ld-x86-64/ibt-plt-3c-x32.d,
> testsuite/ld-x86-64/ibt-plt-3c.d,
> testsuite/ld-x86-64/libno-plt-1b.dd,
> testsuite/ld-x86-64/mpx3.dd, testsuite/ld-x86-64/mpx3n.dd,
> testsuite/ld-x86-64/mpx4.dd, testsuite/ld-x86-64/mpx4n.dd,
> testsuite/ld-x86-64/no-plt-1a.dd,
> testsuite/ld-x86-64/no-plt-1b.dd,
> testsuite/ld-x86-64/no-plt-1c.dd,
> testsuite/ld-x86-64/no-plt-1d.dd,
> testsuite/ld-x86-64/no-plt-1e.dd,
> testsuite/ld-x86-64/no-plt-1f.dd,
> testsuite/ld-x86-64/no-plt-1g.dd,
> testsuite/ld-x86-64/plt-main-bnd.dd,
> testsuite/ld-x86-64/plt-main-ibt-x32.dd,
> testsuite/ld-x86-64/plt-main-ibt.dd,
> testsuite/ld-x86-64/plt.pd, testsuite/ld-x86-64/plt2.dd,
> testsuite/ld-x86-64/pr19609-5a.d,
> testsuite/ld-x86-64/pr19609-5b.d,
> testsuite/ld-x86-64/pr19609-5c.d,
> testsuite/ld-x86-64/pr19609-5e.d,
> testsuite/ld-x86-64/pr19609-7b.d,
> testsuite/ld-x86-64/pr19609-7d.d,
> testsuite/ld-x86-64/pr19636-2d.d,
> testsuite/ld-x86-64/pr19636-2l.d,
> testsuite/ld-x86-64/pr20253-1b.d,
> testsuite/ld-x86-64/pr20253-1d.d,
> testsuite/ld-x86-64/pr20253-1f.d,
> testsuite/ld-x86-64/pr20253-1h.d,
> testsuite/ld-x86-64/pr20253-1j.d,
> testsuite/ld-x86-64/pr20253-1l.d,
> testsuite/ld-x86-64/pr20830a-now.d,
> testsuite/ld-x86-64/pr20830a.d,
> testsuite/ld-x86-64/pr20830b-now.d,
> testsuite/ld-x86-64/pr20830b.d,
> testsuite/ld-x86-64/pr21038a-now.d,
> testsuite/ld-x86-64/pr21038a.d,
> testsuite/ld-x86-64/pr21038b-now.d,
> testsuite/ld-x86-64/pr21038b.d,
> testsuite/ld-x86-64/pr21038c-now.d,
> testsuite/ld-x86-64/pr21038c.d,
> testsuite/ld-x86-64/pr23930-x32.d,
> testsuite/ld-x86-64/pr23930.d,
> testsuite/ld-x86-64/pr25416-1a.d,
> testsuite/ld-x86-64/pr25416-2a.d,
> testsuite/ld-x86-64/pr26018.d,
> testsuite/ld-x86-64/protected2-k1om.d,
> testsuite/ld-x86-64/protected2-l1om.d,
> testsuite/ld-x86-64/protected2.d,
> testsuite/ld-x86-64/protected3.d,
> testsuite/ld-x86-64/protected8.d,
> testsuite/ld-x86-64/tlsbin.dd, testsuite/ld-x86-64/tlsbin2.dd,
> testsuite/ld-x86-64/tlsbindesc.dd,
> testsuite/ld-x86-64/tlsdesc.dd,
> testsuite/ld-x86-64/tlsdesc.pd,
> testsuite/ld-x86-64/tlsgd10.dd,
> testsuite/ld-x86-64/tlsgd7.dd, testsuite/ld-x86-64/tlsgd8.dd,
> testsuite/ld-x86-64/tlsgd9.dd,
> testsuite/ld-x86-64/tlsgdesc.dd,
> testsuite/ld-x86-64/tlsld3.dd, testsuite/ld-x86-64/tlsld4.dd,
> testsuite/ld-x86-64/tlspic.dd, testsuite/ld-x86-64/tlspic2.dd,
> testsuite/ld-x86-64/tlspie2b.d, testsuite/ld-x86-64/tlspie2c.d:
> Adjust expectations.
>
> opcodes/
> 2020-07-XX  Jan Beulich  <[hidden email]>
>
> * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
> description. Drop '&' description. Use P for push of immediate,
> pushf/popf, enter, and leave. Use %LP for lret/retf.
> (dis386_twobyte): Use P for push/pop of fs/gs.
> (reg_table): Use P for push/pop. Use @ for near call/jmp.
> (x86_64_table): Use P for far call/jmp.
> (putop): Drop handling of 'U' and '&'. Move and adjust handling
> of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
> labels.
> (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
> and dqw_mode (unconditional).

OK.

>
> ---
> I wonder whether retaining 'T' for just XBEGIN makes sense. '@' handling
> could as well special case that one opcode (to emit 'w' even in Intel64
> mode when there's an operand size prefix). Furthermore gas doesn't
> accept any suffixes on it, so the question if whether assembler and
> disassembler shouldn't be brought in line (in whichever direction).
>

We can drop 'T' and handle it the same way as Jcc.

Thanks.

H.J.
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Re: [PATCH 2/5] x86-64: adjust stack insn test case

Sourceware - binutils list mailing list
In reply to this post by Jan Beulich-2
On Tue, Jul 14, 2020 at 12:12:56PM +0200, Jan Beulich wrote:

> The value chosen for the 16-/32-bit immediate cases didn't work well
> with the subsequent insn's REX prefix - we ought to pick a value the
> upper two bytes of which evaluate to a 2-byte insn. Bump the values
> accordingly, allowing the subsequent insn to actually have the intended
> REX.W.
>
> gas/
> 2020-07-XX  Jan Beulich  <[hidden email]>
>
> * testsuite/gas/i386/x86-64-stack.s: Adjust 32-bit push
> immediate.
> * testsuite/gas/i386/x86-64-stack-intel.d,
> testsuite/gas/i386/x86-64-stack-suffix.d,
> testsuite/gas/i386/x86-64-stack.d: Adjust expectations.
>

OK.

Thanks.

H.J.
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Re: [PATCH 3/5] x86: make PUSH/POP disassembly uniform

Sourceware - binutils list mailing list
In reply to this post by Jan Beulich-2
On Tue, Jul 14, 2020 at 12:13:17PM +0200, Jan Beulich wrote:

> Irrespective of their encoding the resulting output should look the
> same. Therefore wire the handling of PUSH/POP with GPR operands
> encoded in the main opcode byte to the same logic used for other
> operands. This frees up yet another macro character.
>
> opcodes/
> 2020-07-XX  Jan Beulich  <[hidden email]>
>
> * i386-dis.c (dis386): Adjust 'V' description. Use P-based
> construct for push/pop of register.
> (putop): Honor cond when handling 'P'. Drop handling of plain
> 'V'.
>

OK.

Thanks.

H.J.
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Re: [PATCH 5/5] x86: move putop() case labels to restore alphabetic sorting

Sourceware - binutils list mailing list
In reply to this post by Jan Beulich-2
On Tue, Jul 14, 2020 at 12:14:17PM +0200, Jan Beulich wrote:
> ... as far as non-fall-through behavior permits.
>
> opcodes/
> 2020-07-XX  Jan Beulich  <[hidden email]>
>
> * i386-dis.c (putop): Move 'V' and 'W' handling.
>

OK.

Thanks.

H.J.
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Re: [PATCH 4/5] x86-64: Intel64 adjustments for conditional jumps

Jan Beulich-2
In reply to this post by Sourceware - binutils list mailing list
On 14.07.2020 14:59, H.J. Lu wrote:

> On Tue, Jul 14, 2020 at 5:47 AM Jan Beulich <[hidden email]> wrote:
>>
>> On 14.07.2020 14:36, H.J. Lu wrote:
>>> On Tue, Jul 14, 2020 at 5:20 AM Jan Beulich <[hidden email]> wrote:
>>>>
>>>> On 14.07.2020 14:18, Jan Beulich wrote:
>>>>> On 14.07.2020 14:00, H.J. Lu wrote:
>>>>>> On Tue, Jul 14, 2020 at 3:13 AM Jan Beulich <[hidden email]> wrote:
>>>>>>> --- a/gas/testsuite/gas/i386/opcode-suffix.d
>>>>>>> +++ b/gas/testsuite/gas/i386/opcode-suffix.d
>>>>>>> @@ -305,22 +305,22 @@ Disassembly of section .text:
>>>>>>>   *[0-9a-f]+:   0f 77[  ]+emms[         ]+
>>>>>>>   *[0-9a-f]+:   0f 7e 90 90 90 90 90[   ]+movd[         ]+%mm2,-0x6f6f6f70\(%eax\)
>>>>>>>   *[0-9a-f]+:   0f 7f 90 90 90 90 90[   ]+movq[         ]+%mm2,-0x6f6f6f70\(%eax\)
>>>>>>> - *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jo[   ]+909094e2 <foo\+0x909094e2>
>>>>>>> - *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jno[  ]+909094e8 <foo\+0x909094e8>
>>>>>>> - *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jb[   ]+909094ee <foo\+0x909094ee>
>>>>>>> - *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jae[  ]+909094f4 <foo\+0x909094f4>
>>>>>>> - *[0-9a-f]+:   0f 84 90 90 90 90[      ]+je[   ]+909094fa <foo\+0x909094fa>
>>>>>>> - *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jne[  ]+90909500 <foo\+0x90909500>
>>>>>>> - *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbe[  ]+90909506 <foo\+0x90909506>
>>>>>>> - *[0-9a-f]+:   0f 87 90 90 90 90[      ]+ja[   ]+9090950c <foo\+0x9090950c>
>>>>>>> - *[0-9a-f]+:   0f 88 90 90 90 90[      ]+js[   ]+90909512 <foo\+0x90909512>
>>>>>>> - *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jns[  ]+90909518 <foo\+0x90909518>
>>>>>>> - *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jp[   ]+9090951e <foo\+0x9090951e>
>>>>>>> - *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnp[  ]+90909524 <foo\+0x90909524>
>>>>>>> - *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jl[   ]+9090952a <foo\+0x9090952a>
>>>>>>> - *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jge[  ]+90909530 <foo\+0x90909530>
>>>>>>> - *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jle[  ]+90909536 <foo\+0x90909536>
>>>>>>> - *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jg[   ]+9090953c <foo\+0x9090953c>
>>>>>>> + *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jol[  ]+909094e2 <foo\+0x909094e2>
>>>>>>> + *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jnol[         ]+909094e8 <foo\+0x909094e8>
>>>>>>> + *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jbl[  ]+909094ee <foo\+0x909094ee>
>>>>>>> + *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jael[         ]+909094f4 <foo\+0x909094f4>
>>>>>>> + *[0-9a-f]+:   0f 84 90 90 90 90[      ]+jel[  ]+909094fa <foo\+0x909094fa>
>>>>>>> + *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jnel[         ]+90909500 <foo\+0x90909500>
>>>>>>> + *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbel[         ]+90909506 <foo\+0x90909506>
>>>>>>> + *[0-9a-f]+:   0f 87 90 90 90 90[      ]+jal[  ]+9090950c <foo\+0x9090950c>
>>>>>>> + *[0-9a-f]+:   0f 88 90 90 90 90[      ]+jsl[  ]+90909512 <foo\+0x90909512>
>>>>>>> + *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jnsl[         ]+90909518 <foo\+0x90909518>
>>>>>>> + *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jpl[  ]+9090951e <foo\+0x9090951e>
>>>>>>> + *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnpl[         ]+90909524 <foo\+0x90909524>
>>>>>>> + *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jll[  ]+9090952a <foo\+0x9090952a>
>>>>>>> + *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jgel[         ]+90909530 <foo\+0x90909530>
>>>>>>> + *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jlel[         ]+90909536 <foo\+0x90909536>
>>>>>>> + *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jgl[  ]+9090953c <foo\+0x9090953c>
>>>>>>>   *[0-9a-f]+:   0f 90 80 90 90 90 90[   ]+seto[         ]+-0x6f6f6f70\(%eax\)
>>>>>>>   *[0-9a-f]+:   0f 91 80 90 90 90 90[   ]+setno[        ]+-0x6f6f6f70\(%eax\)
>>>>>>>   *[0-9a-f]+:   0f 92 80 90 90 90 90[   ]+setb[         ]+-0x6f6f6f70\(%eax\)
>>>>>>
>>>>>> There are instructions like jl and jnl.  Will assembler properly
>>>>>> handle `l' as a suffix here?
>>>>>
>>>>> j<cc> as well as jmp (with displacement) have No_lSuf set, so won't
>>>>> accept l suffixes (same for the w one). Nevertheless already prior
>>>>> to this change the disassembler will produce "jmpl" (and "jmpw").
>>>>> IOW a disagreement between disassembler and assembler already exists.
>>>
>>> We should avoid it as much as we can.
>>>
>>>>>> If we do need to distinguish them, can we generate {disp32} pseudo prefix
>>>>>> instead?
>>>>>
>>>>> We could, but then consistently for Jcc, JMP, and CALL. But how is
>>>>> emitting a pseudo-prefix in line with the name of the controlling
>>>>> command line option "-Msuffix"?
>>>
>>> That works for me.
>>
>> Okay, but you didn't answer my question.
>
> We can always generate pseudo prefix.

But my question was towards "prefix" != "suffix".

>>>> FAOD to achieve consistency I think the preferred route would then
>>>> be for the assembler to accept l and w suffixes for Jcc and JMP.
>>>> Not sure though what fallout this may mean.
>>>
>>> That could be quite messy.
>>
>> I guess I'd still prefer to try that first, and resort to the
>> alternative only if it really turns out to be.
>
> Please give it a try.
>
>>>  I think pseudo prefix is much less invasive.
>>
>> Maybe to the disassembler; I'm less sure about the testsuites of both
>> gas and ld.
>>
>> Actually - if we were to go this route, then why pseudo prefixes in
>> the first place? We already emit data{16,32} prefixes for other
>> reasons, so we could do so here as well in place of the suffixes.
>
> There is data32 prefix.  But there is no disp32 prefix.  I call it
> pseudo prefix.

But the prefix _is_ a data size override, i.e. data{16,32} _is_ what
we want to express. My question here is why to invent yet another
prefix when we already have a suitable one.

Jan
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Re: [PATCH 4/5] x86-64: Intel64 adjustments for conditional jumps

Sourceware - binutils list mailing list
On Tue, Jul 14, 2020 at 11:08 PM Jan Beulich <[hidden email]> wrote:

>
> On 14.07.2020 14:59, H.J. Lu wrote:
> > On Tue, Jul 14, 2020 at 5:47 AM Jan Beulich <[hidden email]> wrote:
> >>
> >> On 14.07.2020 14:36, H.J. Lu wrote:
> >>> On Tue, Jul 14, 2020 at 5:20 AM Jan Beulich <[hidden email]> wrote:
> >>>>
> >>>> On 14.07.2020 14:18, Jan Beulich wrote:
> >>>>> On 14.07.2020 14:00, H.J. Lu wrote:
> >>>>>> On Tue, Jul 14, 2020 at 3:13 AM Jan Beulich <[hidden email]> wrote:
> >>>>>>> --- a/gas/testsuite/gas/i386/opcode-suffix.d
> >>>>>>> +++ b/gas/testsuite/gas/i386/opcode-suffix.d
> >>>>>>> @@ -305,22 +305,22 @@ Disassembly of section .text:
> >>>>>>>   *[0-9a-f]+:   0f 77[  ]+emms[         ]+
> >>>>>>>   *[0-9a-f]+:   0f 7e 90 90 90 90 90[   ]+movd[         ]+%mm2,-0x6f6f6f70\(%eax\)
> >>>>>>>   *[0-9a-f]+:   0f 7f 90 90 90 90 90[   ]+movq[         ]+%mm2,-0x6f6f6f70\(%eax\)
> >>>>>>> - *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jo[   ]+909094e2 <foo\+0x909094e2>
> >>>>>>> - *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jno[  ]+909094e8 <foo\+0x909094e8>
> >>>>>>> - *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jb[   ]+909094ee <foo\+0x909094ee>
> >>>>>>> - *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jae[  ]+909094f4 <foo\+0x909094f4>
> >>>>>>> - *[0-9a-f]+:   0f 84 90 90 90 90[      ]+je[   ]+909094fa <foo\+0x909094fa>
> >>>>>>> - *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jne[  ]+90909500 <foo\+0x90909500>
> >>>>>>> - *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbe[  ]+90909506 <foo\+0x90909506>
> >>>>>>> - *[0-9a-f]+:   0f 87 90 90 90 90[      ]+ja[   ]+9090950c <foo\+0x9090950c>
> >>>>>>> - *[0-9a-f]+:   0f 88 90 90 90 90[      ]+js[   ]+90909512 <foo\+0x90909512>
> >>>>>>> - *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jns[  ]+90909518 <foo\+0x90909518>
> >>>>>>> - *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jp[   ]+9090951e <foo\+0x9090951e>
> >>>>>>> - *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnp[  ]+90909524 <foo\+0x90909524>
> >>>>>>> - *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jl[   ]+9090952a <foo\+0x9090952a>
> >>>>>>> - *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jge[  ]+90909530 <foo\+0x90909530>
> >>>>>>> - *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jle[  ]+90909536 <foo\+0x90909536>
> >>>>>>> - *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jg[   ]+9090953c <foo\+0x9090953c>
> >>>>>>> + *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jol[  ]+909094e2 <foo\+0x909094e2>
> >>>>>>> + *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jnol[         ]+909094e8 <foo\+0x909094e8>
> >>>>>>> + *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jbl[  ]+909094ee <foo\+0x909094ee>
> >>>>>>> + *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jael[         ]+909094f4 <foo\+0x909094f4>
> >>>>>>> + *[0-9a-f]+:   0f 84 90 90 90 90[      ]+jel[  ]+909094fa <foo\+0x909094fa>
> >>>>>>> + *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jnel[         ]+90909500 <foo\+0x90909500>
> >>>>>>> + *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbel[         ]+90909506 <foo\+0x90909506>
> >>>>>>> + *[0-9a-f]+:   0f 87 90 90 90 90[      ]+jal[  ]+9090950c <foo\+0x9090950c>
> >>>>>>> + *[0-9a-f]+:   0f 88 90 90 90 90[      ]+jsl[  ]+90909512 <foo\+0x90909512>
> >>>>>>> + *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jnsl[         ]+90909518 <foo\+0x90909518>
> >>>>>>> + *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jpl[  ]+9090951e <foo\+0x9090951e>
> >>>>>>> + *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnpl[         ]+90909524 <foo\+0x90909524>
> >>>>>>> + *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jll[  ]+9090952a <foo\+0x9090952a>
> >>>>>>> + *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jgel[         ]+90909530 <foo\+0x90909530>
> >>>>>>> + *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jlel[         ]+90909536 <foo\+0x90909536>
> >>>>>>> + *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jgl[  ]+9090953c <foo\+0x9090953c>
> >>>>>>>   *[0-9a-f]+:   0f 90 80 90 90 90 90[   ]+seto[         ]+-0x6f6f6f70\(%eax\)
> >>>>>>>   *[0-9a-f]+:   0f 91 80 90 90 90 90[   ]+setno[        ]+-0x6f6f6f70\(%eax\)
> >>>>>>>   *[0-9a-f]+:   0f 92 80 90 90 90 90[   ]+setb[         ]+-0x6f6f6f70\(%eax\)
> >>>>>>
> >>>>>> There are instructions like jl and jnl.  Will assembler properly
> >>>>>> handle `l' as a suffix here?
> >>>>>
> >>>>> j<cc> as well as jmp (with displacement) have No_lSuf set, so won't
> >>>>> accept l suffixes (same for the w one). Nevertheless already prior
> >>>>> to this change the disassembler will produce "jmpl" (and "jmpw").
> >>>>> IOW a disagreement between disassembler and assembler already exists.
> >>>
> >>> We should avoid it as much as we can.
> >>>
> >>>>>> If we do need to distinguish them, can we generate {disp32} pseudo prefix
> >>>>>> instead?
> >>>>>
> >>>>> We could, but then consistently for Jcc, JMP, and CALL. But how is
> >>>>> emitting a pseudo-prefix in line with the name of the controlling
> >>>>> command line option "-Msuffix"?
> >>>
> >>> That works for me.
> >>
> >> Okay, but you didn't answer my question.
> >
> > We can always generate pseudo prefix.
>
> But my question was towards "prefix" != "suffix".
>
> >>>> FAOD to achieve consistency I think the preferred route would then
> >>>> be for the assembler to accept l and w suffixes for Jcc and JMP.
> >>>> Not sure though what fallout this may mean.
> >>>
> >>> That could be quite messy.
> >>
> >> I guess I'd still prefer to try that first, and resort to the
> >> alternative only if it really turns out to be.
> >
> > Please give it a try.
> >
> >>>  I think pseudo prefix is much less invasive.
> >>
> >> Maybe to the disassembler; I'm less sure about the testsuites of both
> >> gas and ld.
> >>
> >> Actually - if we were to go this route, then why pseudo prefixes in
> >> the first place? We already emit data{16,32} prefixes for other
> >> reasons, so we could do so here as well in place of the suffixes.
> >
> > There is data32 prefix.  But there is no disp32 prefix.  I call it
> > pseudo prefix.
>
> But the prefix _is_ a data size override, i.e. data{16,32} _is_ what
> we want to express. My question here is why to invent yet another
> prefix when we already have a suitable one.
>

We should use a prefix which can be processed by assembler.
{dispXX} tells assembler to prefer a specific displacement size.

--
H.J.
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Re: [PATCH 4/5] x86-64: Intel64 adjustments for conditional jumps

Jan Beulich-2
On 15.07.2020 16:02, H.J. Lu wrote:

> On Tue, Jul 14, 2020 at 11:08 PM Jan Beulich <[hidden email]> wrote:
>>
>> On 14.07.2020 14:59, H.J. Lu wrote:
>>> On Tue, Jul 14, 2020 at 5:47 AM Jan Beulich <[hidden email]> wrote:
>>>>
>>>> On 14.07.2020 14:36, H.J. Lu wrote:
>>>>> On Tue, Jul 14, 2020 at 5:20 AM Jan Beulich <[hidden email]> wrote:
>>>>>>
>>>>>> On 14.07.2020 14:18, Jan Beulich wrote:
>>>>>>> On 14.07.2020 14:00, H.J. Lu wrote:
>>>>>>>> On Tue, Jul 14, 2020 at 3:13 AM Jan Beulich <[hidden email]> wrote:
>>>>>>>>> --- a/gas/testsuite/gas/i386/opcode-suffix.d
>>>>>>>>> +++ b/gas/testsuite/gas/i386/opcode-suffix.d
>>>>>>>>> @@ -305,22 +305,22 @@ Disassembly of section .text:
>>>>>>>>>   *[0-9a-f]+:   0f 77[  ]+emms[         ]+
>>>>>>>>>   *[0-9a-f]+:   0f 7e 90 90 90 90 90[   ]+movd[         ]+%mm2,-0x6f6f6f70\(%eax\)
>>>>>>>>>   *[0-9a-f]+:   0f 7f 90 90 90 90 90[   ]+movq[         ]+%mm2,-0x6f6f6f70\(%eax\)
>>>>>>>>> - *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jo[   ]+909094e2 <foo\+0x909094e2>
>>>>>>>>> - *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jno[  ]+909094e8 <foo\+0x909094e8>
>>>>>>>>> - *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jb[   ]+909094ee <foo\+0x909094ee>
>>>>>>>>> - *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jae[  ]+909094f4 <foo\+0x909094f4>
>>>>>>>>> - *[0-9a-f]+:   0f 84 90 90 90 90[      ]+je[   ]+909094fa <foo\+0x909094fa>
>>>>>>>>> - *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jne[  ]+90909500 <foo\+0x90909500>
>>>>>>>>> - *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbe[  ]+90909506 <foo\+0x90909506>
>>>>>>>>> - *[0-9a-f]+:   0f 87 90 90 90 90[      ]+ja[   ]+9090950c <foo\+0x9090950c>
>>>>>>>>> - *[0-9a-f]+:   0f 88 90 90 90 90[      ]+js[   ]+90909512 <foo\+0x90909512>
>>>>>>>>> - *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jns[  ]+90909518 <foo\+0x90909518>
>>>>>>>>> - *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jp[   ]+9090951e <foo\+0x9090951e>
>>>>>>>>> - *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnp[  ]+90909524 <foo\+0x90909524>
>>>>>>>>> - *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jl[   ]+9090952a <foo\+0x9090952a>
>>>>>>>>> - *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jge[  ]+90909530 <foo\+0x90909530>
>>>>>>>>> - *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jle[  ]+90909536 <foo\+0x90909536>
>>>>>>>>> - *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jg[   ]+9090953c <foo\+0x9090953c>
>>>>>>>>> + *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jol[  ]+909094e2 <foo\+0x909094e2>
>>>>>>>>> + *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jnol[         ]+909094e8 <foo\+0x909094e8>
>>>>>>>>> + *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jbl[  ]+909094ee <foo\+0x909094ee>
>>>>>>>>> + *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jael[         ]+909094f4 <foo\+0x909094f4>
>>>>>>>>> + *[0-9a-f]+:   0f 84 90 90 90 90[      ]+jel[  ]+909094fa <foo\+0x909094fa>
>>>>>>>>> + *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jnel[         ]+90909500 <foo\+0x90909500>
>>>>>>>>> + *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbel[         ]+90909506 <foo\+0x90909506>
>>>>>>>>> + *[0-9a-f]+:   0f 87 90 90 90 90[      ]+jal[  ]+9090950c <foo\+0x9090950c>
>>>>>>>>> + *[0-9a-f]+:   0f 88 90 90 90 90[      ]+jsl[  ]+90909512 <foo\+0x90909512>
>>>>>>>>> + *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jnsl[         ]+90909518 <foo\+0x90909518>
>>>>>>>>> + *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jpl[  ]+9090951e <foo\+0x9090951e>
>>>>>>>>> + *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnpl[         ]+90909524 <foo\+0x90909524>
>>>>>>>>> + *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jll[  ]+9090952a <foo\+0x9090952a>
>>>>>>>>> + *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jgel[         ]+90909530 <foo\+0x90909530>
>>>>>>>>> + *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jlel[         ]+90909536 <foo\+0x90909536>
>>>>>>>>> + *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jgl[  ]+9090953c <foo\+0x9090953c>
>>>>>>>>>   *[0-9a-f]+:   0f 90 80 90 90 90 90[   ]+seto[         ]+-0x6f6f6f70\(%eax\)
>>>>>>>>>   *[0-9a-f]+:   0f 91 80 90 90 90 90[   ]+setno[        ]+-0x6f6f6f70\(%eax\)
>>>>>>>>>   *[0-9a-f]+:   0f 92 80 90 90 90 90[   ]+setb[         ]+-0x6f6f6f70\(%eax\)
>>>>>>>>
>>>>>>>> There are instructions like jl and jnl.  Will assembler properly
>>>>>>>> handle `l' as a suffix here?
>>>>>>>
>>>>>>> j<cc> as well as jmp (with displacement) have No_lSuf set, so won't
>>>>>>> accept l suffixes (same for the w one). Nevertheless already prior
>>>>>>> to this change the disassembler will produce "jmpl" (and "jmpw").
>>>>>>> IOW a disagreement between disassembler and assembler already exists.
>>>>>
>>>>> We should avoid it as much as we can.
>>>>>
>>>>>>>> If we do need to distinguish them, can we generate {disp32} pseudo prefix
>>>>>>>> instead?
>>>>>>>
>>>>>>> We could, but then consistently for Jcc, JMP, and CALL. But how is
>>>>>>> emitting a pseudo-prefix in line with the name of the controlling
>>>>>>> command line option "-Msuffix"?
>>>>>
>>>>> That works for me.
>>>>
>>>> Okay, but you didn't answer my question.
>>>
>>> We can always generate pseudo prefix.
>>
>> But my question was towards "prefix" != "suffix".
>>
>>>>>> FAOD to achieve consistency I think the preferred route would then
>>>>>> be for the assembler to accept l and w suffixes for Jcc and JMP.
>>>>>> Not sure though what fallout this may mean.
>>>>>
>>>>> That could be quite messy.
>>>>
>>>> I guess I'd still prefer to try that first, and resort to the
>>>> alternative only if it really turns out to be.
>>>
>>> Please give it a try.
>>>
>>>>>  I think pseudo prefix is much less invasive.
>>>>
>>>> Maybe to the disassembler; I'm less sure about the testsuites of both
>>>> gas and ld.
>>>>
>>>> Actually - if we were to go this route, then why pseudo prefixes in
>>>> the first place? We already emit data{16,32} prefixes for other
>>>> reasons, so we could do so here as well in place of the suffixes.
>>>
>>> There is data32 prefix.  But there is no disp32 prefix.  I call it
>>> pseudo prefix.
>>
>> But the prefix _is_ a data size override, i.e. data{16,32} _is_ what
>> we want to express. My question here is why to invent yet another
>> prefix when we already have a suitable one.
>>
>
> We should use a prefix which can be processed by assembler.
> {dispXX} tells assembler to prefer a specific displacement size.

Funny you should say this: There's no {disp16}. And the assembler
understands (to a certain degree, but this got improved recently)
data16 / data32. IOW yet another argument towards data16 / data32,
if we are to go this route in the first place (which right now is
only the fallback in case allowing the suffixes in the assembler
causes overly difficult problems, and which continues to pend your
response to me pointing out that emitting _prefixes_ is not in
line with _suffix_ in -Msuffix).

Jan
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Re: [PATCH 4/5] x86-64: Intel64 adjustments for conditional jumps

Sourceware - binutils list mailing list
On Thu, Jul 16, 2020 at 2:53 AM Jan Beulich <[hidden email]> wrote:

>
> On 15.07.2020 16:02, H.J. Lu wrote:
> > On Tue, Jul 14, 2020 at 11:08 PM Jan Beulich <[hidden email]> wrote:
> >>
> >> On 14.07.2020 14:59, H.J. Lu wrote:
> >>> On Tue, Jul 14, 2020 at 5:47 AM Jan Beulich <[hidden email]> wrote:
> >>>>
> >>>> On 14.07.2020 14:36, H.J. Lu wrote:
> >>>>> On Tue, Jul 14, 2020 at 5:20 AM Jan Beulich <[hidden email]> wrote:
> >>>>>>
> >>>>>> On 14.07.2020 14:18, Jan Beulich wrote:
> >>>>>>> On 14.07.2020 14:00, H.J. Lu wrote:
> >>>>>>>> On Tue, Jul 14, 2020 at 3:13 AM Jan Beulich <[hidden email]> wrote:
> >>>>>>>>> --- a/gas/testsuite/gas/i386/opcode-suffix.d
> >>>>>>>>> +++ b/gas/testsuite/gas/i386/opcode-suffix.d
> >>>>>>>>> @@ -305,22 +305,22 @@ Disassembly of section .text:
> >>>>>>>>>   *[0-9a-f]+:   0f 77[  ]+emms[         ]+
> >>>>>>>>>   *[0-9a-f]+:   0f 7e 90 90 90 90 90[   ]+movd[         ]+%mm2,-0x6f6f6f70\(%eax\)
> >>>>>>>>>   *[0-9a-f]+:   0f 7f 90 90 90 90 90[   ]+movq[         ]+%mm2,-0x6f6f6f70\(%eax\)
> >>>>>>>>> - *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jo[   ]+909094e2 <foo\+0x909094e2>
> >>>>>>>>> - *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jno[  ]+909094e8 <foo\+0x909094e8>
> >>>>>>>>> - *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jb[   ]+909094ee <foo\+0x909094ee>
> >>>>>>>>> - *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jae[  ]+909094f4 <foo\+0x909094f4>
> >>>>>>>>> - *[0-9a-f]+:   0f 84 90 90 90 90[      ]+je[   ]+909094fa <foo\+0x909094fa>
> >>>>>>>>> - *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jne[  ]+90909500 <foo\+0x90909500>
> >>>>>>>>> - *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbe[  ]+90909506 <foo\+0x90909506>
> >>>>>>>>> - *[0-9a-f]+:   0f 87 90 90 90 90[      ]+ja[   ]+9090950c <foo\+0x9090950c>
> >>>>>>>>> - *[0-9a-f]+:   0f 88 90 90 90 90[      ]+js[   ]+90909512 <foo\+0x90909512>
> >>>>>>>>> - *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jns[  ]+90909518 <foo\+0x90909518>
> >>>>>>>>> - *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jp[   ]+9090951e <foo\+0x9090951e>
> >>>>>>>>> - *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnp[  ]+90909524 <foo\+0x90909524>
> >>>>>>>>> - *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jl[   ]+9090952a <foo\+0x9090952a>
> >>>>>>>>> - *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jge[  ]+90909530 <foo\+0x90909530>
> >>>>>>>>> - *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jle[  ]+90909536 <foo\+0x90909536>
> >>>>>>>>> - *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jg[   ]+9090953c <foo\+0x9090953c>
> >>>>>>>>> + *[0-9a-f]+:   0f 80 90 90 90 90[      ]+jol[  ]+909094e2 <foo\+0x909094e2>
> >>>>>>>>> + *[0-9a-f]+:   0f 81 90 90 90 90[      ]+jnol[         ]+909094e8 <foo\+0x909094e8>
> >>>>>>>>> + *[0-9a-f]+:   0f 82 90 90 90 90[      ]+jbl[  ]+909094ee <foo\+0x909094ee>
> >>>>>>>>> + *[0-9a-f]+:   0f 83 90 90 90 90[      ]+jael[         ]+909094f4 <foo\+0x909094f4>
> >>>>>>>>> + *[0-9a-f]+:   0f 84 90 90 90 90[      ]+jel[  ]+909094fa <foo\+0x909094fa>
> >>>>>>>>> + *[0-9a-f]+:   0f 85 90 90 90 90[      ]+jnel[         ]+90909500 <foo\+0x90909500>
> >>>>>>>>> + *[0-9a-f]+:   0f 86 90 90 90 90[      ]+jbel[         ]+90909506 <foo\+0x90909506>
> >>>>>>>>> + *[0-9a-f]+:   0f 87 90 90 90 90[      ]+jal[  ]+9090950c <foo\+0x9090950c>
> >>>>>>>>> + *[0-9a-f]+:   0f 88 90 90 90 90[      ]+jsl[  ]+90909512 <foo\+0x90909512>
> >>>>>>>>> + *[0-9a-f]+:   0f 89 90 90 90 90[      ]+jnsl[         ]+90909518 <foo\+0x90909518>
> >>>>>>>>> + *[0-9a-f]+:   0f 8a 90 90 90 90[      ]+jpl[  ]+9090951e <foo\+0x9090951e>
> >>>>>>>>> + *[0-9a-f]+:   0f 8b 90 90 90 90[      ]+jnpl[         ]+90909524 <foo\+0x90909524>
> >>>>>>>>> + *[0-9a-f]+:   0f 8c 90 90 90 90[      ]+jll[  ]+9090952a <foo\+0x9090952a>
> >>>>>>>>> + *[0-9a-f]+:   0f 8d 90 90 90 90[      ]+jgel[         ]+90909530 <foo\+0x90909530>
> >>>>>>>>> + *[0-9a-f]+:   0f 8e 90 90 90 90[      ]+jlel[         ]+90909536 <foo\+0x90909536>
> >>>>>>>>> + *[0-9a-f]+:   0f 8f 90 90 90 90[      ]+jgl[  ]+9090953c <foo\+0x9090953c>
> >>>>>>>>>   *[0-9a-f]+:   0f 90 80 90 90 90 90[   ]+seto[         ]+-0x6f6f6f70\(%eax\)
> >>>>>>>>>   *[0-9a-f]+:   0f 91 80 90 90 90 90[   ]+setno[        ]+-0x6f6f6f70\(%eax\)
> >>>>>>>>>   *[0-9a-f]+:   0f 92 80 90 90 90 90[   ]+setb[         ]+-0x6f6f6f70\(%eax\)
> >>>>>>>>
> >>>>>>>> There are instructions like jl and jnl.  Will assembler properly
> >>>>>>>> handle `l' as a suffix here?
> >>>>>>>
> >>>>>>> j<cc> as well as jmp (with displacement) have No_lSuf set, so won't
> >>>>>>> accept l suffixes (same for the w one). Nevertheless already prior
> >>>>>>> to this change the disassembler will produce "jmpl" (and "jmpw").
> >>>>>>> IOW a disagreement between disassembler and assembler already exists.
> >>>>>
> >>>>> We should avoid it as much as we can.
> >>>>>
> >>>>>>>> If we do need to distinguish them, can we generate {disp32} pseudo prefix
> >>>>>>>> instead?
> >>>>>>>
> >>>>>>> We could, but then consistently for Jcc, JMP, and CALL. But how is
> >>>>>>> emitting a pseudo-prefix in line with the name of the controlling
> >>>>>>> command line option "-Msuffix"?
> >>>>>
> >>>>> That works for me.
> >>>>
> >>>> Okay, but you didn't answer my question.
> >>>
> >>> We can always generate pseudo prefix.
> >>
> >> But my question was towards "prefix" != "suffix".
> >>
> >>>>>> FAOD to achieve consistency I think the preferred route would then
> >>>>>> be for the assembler to accept l and w suffixes for Jcc and JMP.
> >>>>>> Not sure though what fallout this may mean.
> >>>>>
> >>>>> That could be quite messy.
> >>>>
> >>>> I guess I'd still prefer to try that first, and resort to the
> >>>> alternative only if it really turns out to be.
> >>>
> >>> Please give it a try.
> >>>
> >>>>>  I think pseudo prefix is much less invasive.
> >>>>
> >>>> Maybe to the disassembler; I'm less sure about the testsuites of both
> >>>> gas and ld.
> >>>>
> >>>> Actually - if we were to go this route, then why pseudo prefixes in
> >>>> the first place? We already emit data{16,32} prefixes for other
> >>>> reasons, so we could do so here as well in place of the suffixes.
> >>>
> >>> There is data32 prefix.  But there is no disp32 prefix.  I call it
> >>> pseudo prefix.
> >>
> >> But the prefix _is_ a data size override, i.e. data{16,32} _is_ what
> >> we want to express. My question here is why to invent yet another
> >> prefix when we already have a suitable one.
> >>
> >
> > We should use a prefix which can be processed by assembler.
> > {dispXX} tells assembler to prefer a specific displacement size.
>
> Funny you should say this: There's no {disp16}. And the assembler
> understands (to a certain degree, but this got improved recently)
> data16 / data32. IOW yet another argument towards data16 / data32,
> if we are to go this route in the first place (which right now is
> only the fallback in case allowing the suffixes in the assembler
> causes overly difficult problems, and which continues to pend your
> response to me pointing out that emitting _prefixes_ is not in
> line with _suffix_ in -Msuffix).
>

If needed, we can add {disp16}.


--
H.J.
12