[PATCH 0/4] arc: Add GNU/Linux support

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Re: [PATCH v2 3/4] arc: Add GNU/Linux support for ARC

Simon Marchi-4
On 2020-04-28 12:04 p.m., Shahab Vahedi via Gdb-patches wrote:
> +/* Implement the "breakpoint_kind_from_pc" gdbarch method.  */
> +
> +static int
> +arc_linux_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
> +{
> +  return 2;

What is 2?

> +}
> +
> +/* Implement the "sw_breakpoint_from_kind" gdbarch method.  */
> +
> +static const gdb_byte *
> +arc_linux_sw_breakpoint_from_kind (struct gdbarch *gdbarch,
> +   int kind, int *size)
> +{
> +  *size = kind;
> +  return ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
> +  ? arc_linux_trap_s_be
> +  : arc_linux_trap_s_le);
> +}
> +
> +/* Implement the "software_single_step" gdbarch method.  */
> +
> +static std::vector<CORE_ADDR>
> +arc_linux_software_single_step (struct regcache *regcache)
> +{
> +  struct gdbarch *gdbarch = regcache->arch ();
> +  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
> +  struct disassemble_info di = arc_disassemble_info (gdbarch);
> +
> +  /* Read current instruction.  */
> +  struct arc_instruction curr_insn;
> +  arc_insn_decode (regcache_read_pc (regcache), &di, arc_delayed_print_insn,
> +   &curr_insn);
> +  CORE_ADDR next_pc = arc_insn_get_linear_next_pc (curr_insn);
> +
> +  std::vector<CORE_ADDR> next_pcs;
> +
> +  /* For instructions with delay slots, the fall thru is not the
> +     instruction immediately after the current instruction, but the one
> +     after that.  */
> +  if (curr_insn.has_delay_slot)
> +    {
> +      struct arc_instruction next_insn;
> +      arc_insn_decode (next_pc, &di, arc_delayed_print_insn, &next_insn);
> +      next_pcs.push_back (arc_insn_get_linear_next_pc (next_insn));
> +    }
> +  else
> +    {
> +      next_pcs.push_back (next_pc);
> +    }

Remove curly braces here.

> +
> +  ULONGEST status32;
> +  regcache_cooked_read_unsigned (regcache, gdbarch_ps_regnum (gdbarch),
> + &status32);
> +
> +  if (curr_insn.is_control_flow)
> +    {
> +      CORE_ADDR branch_pc = arc_insn_get_branch_target (curr_insn);
> +      if (branch_pc != next_pc)
> + next_pcs.push_back (branch_pc);
> +    }
> +  /* Is current instruction the last in a loop body?  */
> +  else if (tdep->has_hw_loops)
> +    {
> +      /* If STATUS32.L is 1, then ZD-loops are disabled.  */
> +      if ((status32 & ARC_STATUS32_L_MASK) == 0)
> + {
> +  ULONGEST lp_end, lp_start, lp_count;
> +  regcache_cooked_read_unsigned (regcache, ARC_LP_START_REGNUM,
> + &lp_start);
> +  regcache_cooked_read_unsigned (regcache, ARC_LP_END_REGNUM, &lp_end);
> +  regcache_cooked_read_unsigned (regcache, ARC_LP_COUNT_REGNUM,
> + &lp_count);
> +
> +  if (arc_debug)
> +    {
> +      debug_printf ("arc-linux: lp_start = %s, lp_end = %s, "
> +    "lp_count = %s, next_pc = %s\n",
> +    paddress (gdbarch, lp_start),
> +    paddress (gdbarch, lp_end),
> +    pulongest (lp_count),
> +    paddress (gdbarch, next_pc));
> +    }
> +
> +  if (next_pc == lp_end && lp_count > 1)
> +    {
> +      /* The instruction is in effect a jump back to the start of
> + the loop.  */
> +      next_pcs.push_back (lp_start);
> +    }
> +
> + }
> +    }
> +
> +  /* Is this a delay slot?  Then next PC is in BTA register.  */
> +  if ((status32 & ARC_STATUS32_DE_MASK) != 0)
> +    {
> +      ULONGEST bta;
> +      regcache_cooked_read_unsigned (regcache, ARC_BTA_REGNUM, &bta);
> +      next_pcs.push_back (bta);
> +    }
> +
> +  return next_pcs;
> +}
> +
> +/* Implement the "skip_solib_resolver" gdbarch method.
> +
> +   See glibc_skip_solib_resolver for details.  */
> +
> +static CORE_ADDR
> +arc_linux_skip_solib_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
> +{
> +  /* For uClibc 0.9.26+.
> +
> +     An unresolved PLT entry points to "__dl_linux_resolve", which calls
> +     "_dl_linux_resolver" to do the resolving and then eventually jumps to
> +     the function.
> +
> +     So we look for the symbol `_dl_linux_resolver', and if we are there,
> +     gdb sets a breakpoint at the return address, and continues.  */
> +  struct bound_minimal_symbol resolver =
> +    lookup_minimal_symbol ("_dl_linux_resolver", NULL, NULL);
> +
> +  if (arc_debug)
> +    {
> +      if (resolver.minsym)
> + {
> +  CORE_ADDR res_addr = BMSYMBOL_VALUE_ADDRESS (resolver);
> +  debug_printf ("arc-linux: skip_solib_resolver (): "
> + "pc = %s, resolver at %s\n",
> + print_core_address (gdbarch, pc),
> + print_core_address (gdbarch, res_addr));
> + }
> +      else
> + {
> +  debug_printf ("arc-linux: skip_solib_resolver (): "
> + "pc = %s, no resolver found\n",
> + print_core_address (gdbarch, pc));
> + }
> +    }
> +
> +  if (resolver.minsym && BMSYMBOL_VALUE_ADDRESS (resolver) == pc)
> +    {
> +      /* Find the return address.  */
> +      return frame_unwind_caller_pc (get_current_frame ());
> +    }
> +  else
> +    {
> +      /* No breakpoint required.  */
> +      return 0;
> +    }
> +}
> +
> +/* Initialization specific to Linux environment.  */
> +
> +static void
> +arc_linux_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
> +{
> +  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
> +
> +  if (arc_debug)
> +    debug_printf ("arc-linux: GNU/Linux OS/ABI initialization.\n");
> +
> +  /* If we are using Linux, we have in uClibc
> +     (libc/sysdeps/linux/arc/bits/setjmp.h):
> +
> +     typedef int __jmp_buf[13+1+1+1];    //r13-r25, fp, sp, blink
> +
> +     Where "blink" is a stored PC of a caller function.
> +   */
> +  tdep->jb_pc = 15;

I don't really understand this, could you dumb it down a bit for me?

> +/* Suppress warning from -Wmissing-prototypes.  */
> +extern initialize_file_ftype _initialize_arc_linux_tdep;
> +
> +void
> +_initialize_arc_linux_tdep (void)

Remove the void.

Simon
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Re: [PATCH v2 4/4] arc: Add arc-*-linux regformats

Simon Marchi-4
In reply to this post by Sourceware - gdb-patches mailing list
On 2020-04-28 12:04 p.m., Shahab Vahedi via Gdb-patches wrote:
> From: Anton Kolesov <[hidden email]>
>
> gdb/ChangeLog:
> 2020-04-28  Anton Kolesov <[hidden email]>
>
> * features/Makefile: Add new files and expedite registers.
> * regformats/arc-arcompact-Linux.dat: New file.
> * regformats/arc-v2-Linux.dat: Likewise.

Can you explain why this is useful?  I always forget, but I have the feeling
that regformats are something we are going away from, and that if you support
target descriptions, you don't need that... but I would need to refresh my
memory.

Simon

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Re: [PATCH v2 3/4] arc: Add GNU/Linux support for ARC

Sourceware - gdb-patches mailing list
In reply to this post by Simon Marchi-4
On Thu, May 14, 2020 at 11:09:08AM -0400, Simon Marchi wrote:

> On 2020-04-28 12:04 p.m., Shahab Vahedi via Gdb-patches wrote:
> > +/* Initialization specific to Linux environment.  */
> > +
> > +static void
> > +arc_linux_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
> > +{
> > +  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
> > +
> > +  if (arc_debug)
> > +    debug_printf ("arc-linux: GNU/Linux OS/ABI initialization.\n");
> > +
> > +  /* If we are using Linux, we have in uClibc
> > +     (libc/sysdeps/linux/arc/bits/setjmp.h):
> > +
> > +     typedef int __jmp_buf[13+1+1+1];    //r13-r25, fp, sp, blink
> > +
> > +     Where "blink" is a stored PC of a caller function.
> > +   */
> > +  tdep->jb_pc = 15;
>
> I don't really understand this, could you dumb it down a bit for me?

In advance, I appologize if my explanation is not right on the spot
or is too verbose. I am not 100% sure what is not clear, so I try to
explain as much as I can.

If you mean why "tdep->jb_pc" is 15 and what the comments mean, then:

fp    -> Frame Pointer register
sp    -> Stack Pointer register
blink -> Branch and LINK register (acts like a "return" register)

blink register is set (implicitly) when "bl @name_of_fuction" instruction
is used. It will point to the instruction that comes after "bl" (branch
and link). e.g.:

  0x100: add r0, r1, r2
  0x104: bl @galaxy_far_away     # pc=@galaxy_far_away; blink=0x108
  0x108: add r3, r4, r5

a simple "j(ump)  blink" will return from the function.

-----

The layout of "__jump_buf" looks like:
0..12:   stored registers r13, r14, ..., r25
13:      stored fp
14:      stored sp
15:      stored blink

This is how the "calling" convention in ARC saves the
registers before switching the frame to another function.

I hope it is clear now.


Shahab
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Re: [PATCH v2 4/4] arc: Add arc-*-linux regformats

Sourceware - gdb-patches mailing list
In reply to this post by Simon Marchi-4
On Thu, May 14, 2020 at 11:12:55AM -0400, Simon Marchi wrote:

> On 2020-04-28 12:04 p.m., Shahab Vahedi via Gdb-patches wrote:
> > From: Anton Kolesov <[hidden email]>
> >
> > gdb/ChangeLog:
> > 2020-04-28  Anton Kolesov <[hidden email]>
> >
> > * features/Makefile: Add new files and expedite registers.
> > * regformats/arc-arcompact-Linux.dat: New file.
> > * regformats/arc-v2-Linux.dat: Likewise.
>
> Can you explain why this is useful?  I always forget, but I have the feeling
> that regformats are something we are going away from, and that if you support
> target descriptions, you don't need that... but I would need to refresh my
> memory.

To my understanding, the values of "expedite" registers are always transferred
from the "server" to GDB client. With every step you take, or any stop you do,
GDB client will know about the value of "expedite" registers. In case of ARC,
those are the "program counter" and "stack pointer" registers.
I _think_ the "dat" files are the mechanism holding information about that.
After all it is generated from the XML and we also followed other targets
in doing so.


Shahab
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Re: [PATCH v2 3/4] arc: Add GNU/Linux support for ARC

Simon Marchi-4
In reply to this post by Sourceware - gdb-patches mailing list
On 2020-06-15 7:13 p.m., Shahab Vahedi wrote:

> On Thu, May 14, 2020 at 11:09:08AM -0400, Simon Marchi wrote:
>> On 2020-04-28 12:04 p.m., Shahab Vahedi via Gdb-patches wrote:
>>> +/* Initialization specific to Linux environment.  */
>>> +
>>> +static void
>>> +arc_linux_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
>>> +{
>>> +  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
>>> +
>>> +  if (arc_debug)
>>> +    debug_printf ("arc-linux: GNU/Linux OS/ABI initialization.\n");
>>> +
>>> +  /* If we are using Linux, we have in uClibc
>>> +     (libc/sysdeps/linux/arc/bits/setjmp.h):
>>> +
>>> +     typedef int __jmp_buf[13+1+1+1];    //r13-r25, fp, sp, blink
>>> +
>>> +     Where "blink" is a stored PC of a caller function.
>>> +   */
>>> +  tdep->jb_pc = 15;
>>
>> I don't really understand this, could you dumb it down a bit for me?
>
> In advance, I appologize if my explanation is not right on the spot
> or is too verbose. I am not 100% sure what is not clear, so I try to
> explain as much as I can.
>
> If you mean why "tdep->jb_pc" is 15 and what the comments mean, then:
>
> fp    -> Frame Pointer register
> sp    -> Stack Pointer register
> blink -> Branch and LINK register (acts like a "return" register)
>
> blink register is set (implicitly) when "bl @name_of_fuction" instruction
> is used. It will point to the instruction that comes after "bl" (branch
> and link). e.g.:
>
>   0x100: add r0, r1, r2
>   0x104: bl @galaxy_far_away     # pc=@galaxy_far_away; blink=0x108
>   0x108: add r3, r4, r5
>
> a simple "j(ump)  blink" will return from the function.
>
> -----
>
> The layout of "__jump_buf" looks like:
> 0..12:   stored registers r13, r14, ..., r25
> 13:      stored fp
> 14:      stored sp
> 15:      stored blink
>
> This is how the "calling" convention in ARC saves the
> registers before switching the frame to another function.
>
> I hope it is clear now.

Ah ok, and that value is the offset of the PC in the buffer.  I see that the
comment above the definition of the jb_pc explains that, I might have missed
it the first time.

Thanks,

Simon
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Re: [PATCH v2 4/4] arc: Add arc-*-linux regformats

Simon Marchi-4
In reply to this post by Sourceware - gdb-patches mailing list
On 2020-06-15 7:37 p.m., Shahab Vahedi wrote:

> On Thu, May 14, 2020 at 11:12:55AM -0400, Simon Marchi wrote:
>> On 2020-04-28 12:04 p.m., Shahab Vahedi via Gdb-patches wrote:
>>> From: Anton Kolesov <[hidden email]>
>>>
>>> gdb/ChangeLog:
>>> 2020-04-28  Anton Kolesov <[hidden email]>
>>>
>>> * features/Makefile: Add new files and expedite registers.
>>> * regformats/arc-arcompact-Linux.dat: New file.
>>> * regformats/arc-v2-Linux.dat: Likewise.
>>
>> Can you explain why this is useful?  I always forget, but I have the feeling
>> that regformats are something we are going away from, and that if you support
>> target descriptions, you don't need that... but I would need to refresh my
>> memory.
>
> To my understanding, the values of "expedite" registers are always transferred
> from the "server" to GDB client. With every step you take, or any stop you do,
> GDB client will know about the value of "expedite" registers. In case of ARC,
> those are the "program counter" and "stack pointer" registers.
> I _think_ the "dat" files are the mechanism holding information about that.
> After all it is generated from the XML and we also followed other targets
> in doing so.

It's true that these .dat files do that, but it's not the only way.  They
don't offer any flexibility for architectures that have optional set of
registers, as it requires you to generate one format for each possible
combination of these options.  So the trend has been to move away from that,
towards target descriptions assembled at runtime.

I would encourage you to look at how aarch64 handles it, as it's one of the
latest that was introduced.  You'll notice that there is one xml file for
each "feature".  They are then assembled at runtime based on the features
detected on the current hardware.  The expedite registers are also taken
care of, it's all in gdbserver/linux-aarch64-tdesc.cc.

I'd prefer if we didn't add a new architecture that uses the old method.

Simon


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Re: [PATCH v2 2/4] arc: Recognize registers available on Linux targets

Sourceware - gdb-patches mailing list
In reply to this post by Simon Marchi-4
Hi Simon,

On Thu, May 14, 2020 at 11:01:44AM -0400, Simon Marchi wrote:

> Just some nits - I don't really know about the specific details of the ARC architecture.
>
> On 2020-04-28 12:04 p.m., Shahab Vahedi via Gdb-patches wrote:
> >    struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep);
> >  
> >    /* Data types.  */
> > @@ -1987,6 +2025,13 @@ arc_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
> >    set_gdbarch_ps_regnum (gdbarch, ARC_STATUS32_REGNUM);
> >    set_gdbarch_fp0_regnum (gdbarch, -1); /* No FPU registers.  */
> >  
> > +  /* Confirm that register name lists have proper length.  */
> > +  gdb_static_assert (ARC_LAST_REGNUM + 1
> > +     == (ARRAY_SIZE (core_v2_register_names)
> > + + ARRAY_SIZE (aux_minimal_register_names)));
> > +  gdb_static_assert (ARRAY_SIZE (core_v2_register_names)
> > +     == ARRAY_SIZE (core_arcompact_register_names));
>
> Does this need to be here?  I would expect them to be near (just after) the definitions
> of said arrays.

*_register_names are static arrays. That should be why gdb_STATIC_assert
is used as well. I believe this place in the code is OK for making that
check.

Shahab
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[PATCH v3 0/3] arc: Add GNU/Linux support

Sourceware - gdb-patches mailing list
In reply to this post by Sourceware - gdb-patches mailing list
From: Shahab Vahedi <[hidden email]>

This is a series of changes to enable debugging ARC targets that are
running on a native ARC GNU/Linux system.  Since this heavily relies
on XML target descriptions provided for different targets, that piece
of code has been refactored to accomadate flexible register support.

After this series, there will come patches that add support for
native ARC gdb/gdbserver.

v3: Changes after Simon's remarks:
The XML files have reduced to minimal comprehensible set.
The code is adjusted to work with new reg sets and be platform agnostic.

v2: Changes after Tom's remarks:
 arc-tdep.c
  - arc_tdesc_init(): Use "ARC_{R58,R59}_REGNUM" to index "core_regs[]".
  - arc_gdbarch_init(): Use "xfree ()" instead of "XDELETE ()"
  - arc_gdbarch_init(): return "nullptr" instead of "NULL".
  - Use explicit number evaluation, e.g: if (a & b) -> if ((a & b) != 0)
 arc-linux-tdep.c
  - Use true/false instead of TRUE/FALSE.
  - arc_linux_sw_breakpoint_from_kind (): Break long lines into two.
  - arc_linux_sw_breakpoint_from_kind (): Remove starting blank line.
  - Use explicit number evaluation, e.g: if (a & b) -> if ((a & b) != 0)
 gdb/configure.tgt
  - arc*-*-linux*): Remove "build_gdbserver=yes".

Anton Kolesov (1):
  arc: Add GNU/Linux support for ARC

Shahab Vahedi (2):
  arc: Add ARCv2 XML target along with refactoring
  arc: Add hardware loop detection

 gdb/Makefile.in                               |   1 +
 gdb/arc-linux-tdep.c                          | 283 ++++++++
 gdb/arc-tdep.c                                | 657 +++++++++++-------
 gdb/arc-tdep.h                                |  30 +-
 gdb/arch/arc.c                                | 106 ++-
 gdb/arch/arc.h                                |  76 +-
 gdb/configure.tgt                             |   5 +
 gdb/doc/gdb.texinfo                           |   3 +-
 gdb/features/Makefile                         |   8 +-
 .../arc/{aux-arcompact.c => v1-aux.c}         |   9 +-
 .../arc/{aux-arcompact.xml => v1-aux.xml}     |   7 +-
 .../arc/{core-arcompact.c => v1-core.c}       |   8 +-
 .../arc/{core-arcompact.xml => v1-core.xml}   |   4 +-
 gdb/features/arc/{aux-v2.c => v2-aux.c}       |   9 +-
 gdb/features/arc/{aux-v2.xml => v2-aux.xml}   |   5 +-
 gdb/features/arc/{core-v2.c => v2-core.c}     |   7 +-
 gdb/features/arc/{core-v2.xml => v2-core.xml} |   7 +-
 17 files changed, 907 insertions(+), 318 deletions(-)
 create mode 100644 gdb/arc-linux-tdep.c
 rename gdb/features/arc/{aux-arcompact.c => v1-aux.c} (73%)
 rename gdb/features/arc/{aux-arcompact.xml => v1-aux.xml} (80%)
 rename gdb/features/arc/{core-arcompact.c => v1-core.c} (87%)
 rename gdb/features/arc/{core-arcompact.xml => v1-core.xml} (92%)
 rename gdb/features/arc/{aux-v2.c => v2-aux.c} (76%)
 rename gdb/features/arc/{aux-v2.xml => v2-aux.xml} (86%)
 rename gdb/features/arc/{core-v2.c => v2-core.c} (91%)
 rename gdb/features/arc/{core-v2.xml => v2-core.xml} (90%)

--
2.27.0

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[PATCH v3 1/3] arc: Add ARCv2 XML target along with refactoring

Sourceware - gdb-patches mailing list
From: Shahab Vahedi <[hidden email]>

A few changes have been made to make the register support simpler,
more flexible and extendible.  The trigger for most of these changes
are the remarks [1] made earlier for v2 of this patch.  The noticeable
improvements are:

- The arc XML target features are placed under gdb/features/arc
- There are two cores (based on ISA) and one auxiliary feature:
  v1-core: ARC600, ARC601, ARC700
  v2-core: ARC EM, ARC HS
  aux: common in both
- The XML target features represent a minimalistic sane set of
  registers irrespective of application (baremetal or linux).
- A concept of "feature" class has been introduced in the code.
  The "feature" object is constructed from BFD and GDBARCH data.
  It contains necessary information (ISA and register size) to
  determine which XML target feature to use.
- A new structure (ARC_REGISTER_FEATURE) is added that allows
  providing index, names, and the necessity of registers. This
  simplifies the sanity checks and future extendibility.

The last two points were inspired from RiscV port.

[1]
https://sourceware.org/pipermail/gdb-patches/2020-May/168511.html

gdb/ChangeLog:
2020-07-09  Shahab Vahedi  <[hidden email]>

        * arch/arc.h
          (arc_gdbarch_features): New class to stir the selection of target XML.
          (arc_create_target_description): Use FEATURES to choose XML target.
          (arc_lookup_target_description): Use arc_create_target_description
          to create _new_ target descriptions or return the already created
          ones if the FEATURES is the same.
        * arch/arc.c: Implementation of prototypes described above.
        * gdb/arc-tdep.h (arc_regnum enum): Add more registers.
          (arc_gdbarch_features_init): Initialize the FEATURES struct.
        * arc-tdep.c (*_feature_name): Make feature names consistent.
          (arc_register_feature): A new struct to hold information about
          registers of a particular target/feature.
          (arc_check_tdesc_feature): Check if XML provides registers in
          compliance with ARC_REGISTER_FEATURE structs.
          (arc_update_acc_reg_names): Add aliases for r58 and r59.
          (determine_*_reg_feature_set): Which feature name to look for.
          (arc_gdbarch_features_init): Given MACH and ABFD, initialize FEATURES.
          (mach_type_to_arc_isa): Convert from a set of binutils machine types
          to expected ISA enums to be used in arc_gdbarch_features structs.
        * features/Makefile (FEATURE_XMLFILES): Add new files.
        * gdb/features/arc/v1-aux.c: New file.
        * gdb/features/arc/v1-aux.xml: Likewise.
        * gdb/features/arc/v1-core.c: Likewise.
        * gdb/features/arc/v1-core.xml: Likewise.
        * gdb/features/arc/v2-aux.c: Likewise.
        * gdb/features/arc/v2-aux.xml: Likewise.
        * gdb/features/arc/v2-core.c: Likewise.
        * gdb/features/arc/v2-core.xml: Likewise.
---
 gdb/arc-tdep.c                                | 615 +++++++++++-------
 gdb/arc-tdep.h                                |  21 +-
 gdb/arch/arc.c                                | 106 ++-
 gdb/arch/arc.h                                |  76 ++-
 gdb/features/Makefile                         |   8 +-
 .../arc/{aux-arcompact.c => v1-aux.c}         |   9 +-
 .../arc/{aux-arcompact.xml => v1-aux.xml}     |   7 +-
 .../arc/{core-arcompact.c => v1-core.c}       |   8 +-
 .../arc/{core-arcompact.xml => v1-core.xml}   |   4 +-
 gdb/features/arc/{aux-v2.c => v2-aux.c}       |   9 +-
 gdb/features/arc/{aux-v2.xml => v2-aux.xml}   |   5 +-
 gdb/features/arc/{core-v2.c => v2-core.c}     |   7 +-
 gdb/features/arc/{core-v2.xml => v2-core.xml} |   7 +-
 13 files changed, 571 insertions(+), 311 deletions(-)
 rename gdb/features/arc/{aux-arcompact.c => v1-aux.c} (73%)
 rename gdb/features/arc/{aux-arcompact.xml => v1-aux.xml} (80%)
 rename gdb/features/arc/{core-arcompact.c => v1-core.c} (87%)
 rename gdb/features/arc/{core-arcompact.xml => v1-core.xml} (92%)
 rename gdb/features/arc/{aux-v2.c => v2-aux.c} (76%)
 rename gdb/features/arc/{aux-v2.xml => v2-aux.xml} (86%)
 rename gdb/features/arc/{core-v2.c => v2-core.c} (91%)
 rename gdb/features/arc/{core-v2.xml => v2-core.xml} (90%)

diff --git a/gdb/arc-tdep.c b/gdb/arc-tdep.c
index 7e6d29c334b..6979c2ad7d0 100644
--- a/gdb/arc-tdep.c
+++ b/gdb/arc-tdep.c
@@ -21,6 +21,7 @@
 /* GDB header files.  */
 #include "defs.h"
 #include "arch-utils.h"
+#include "elf-bfd.h"
 #include "disasm.h"
 #include "dwarf2/frame.h"
 #include "frame-base.h"
@@ -41,6 +42,7 @@
 
 /* Standard headers.  */
 #include <algorithm>
+#include <sstream>
 
 /* The frame unwind cache for ARC.  */
 
@@ -91,63 +93,201 @@ int arc_debug;
 
 static struct cmd_list_element *maintenance_print_arc_list = NULL;
 
-/* XML target description features.  */
-
-static const char core_v2_feature_name[] = "org.gnu.gdb.arc.core.v2";
-static const char
-  core_reduced_v2_feature_name[] = "org.gnu.gdb.arc.core-reduced.v2";
-static const char
-  core_arcompact_feature_name[] = "org.gnu.gdb.arc.core.arcompact";
-static const char aux_minimal_feature_name[] = "org.gnu.gdb.arc.aux-minimal";
-
-/* XML target description known registers.  */
-
-static const char *const core_v2_register_names[] = {
-  "r0", "r1", "r2", "r3",
-  "r4", "r5", "r6", "r7",
-  "r8", "r9", "r10", "r11",
-  "r12", "r13", "r14", "r15",
-  "r16", "r17", "r18", "r19",
-  "r20", "r21", "r22", "r23",
-  "r24", "r25", "gp", "fp",
-  "sp", "ilink", "r30", "blink",
-  "r32", "r33", "r34", "r35",
-  "r36", "r37", "r38", "r39",
-  "r40", "r41", "r42", "r43",
-  "r44", "r45", "r46", "r47",
-  "r48", "r49", "r50", "r51",
-  "r52", "r53", "r54", "r55",
-  "r56", "r57", "accl", "acch",
-  "lp_count", "reserved", "limm", "pcl",
+/* A set of registers that we expect to find in a tdesc_feature.  These
+   are used in ARC_TDESC_INIT when processing the target description.  */
+
+struct arc_register_feature
+{
+  /* Information for a single register.  */
+  struct register_info
+  {
+    /* The GDB register number for this register.  */
+    int regnum;
+
+    /* List of names for this register.  The first name in this list is the
+       preferred name, the name GDB will use when describing this register.  */
+    std::vector<const char *> names;
+
+    /* When true, this register must be present in this feature set.  */
+    bool required_p;
+  };
+
+  /* The name for this feature.  This is the name used to find this feature
+     within the target description.  */
+  const char *name;
+
+  /* List of all the registers that we expect to encounter in this register
+     set.  */
+  std::vector<struct register_info> registers;
 };
 
-static const char *const aux_minimal_register_names[] = {
-  "pc", "status32",
+static const char *ARC_CORE_FEATURE_NAME="org.gnu.gdb.arc.core";
+static const char *ARC_AUX_FEATURE_NAME="org.gnu.gdb.arc.aux";
+
+/* ARCv1 (ARC600, ARC601, ARC700) general core registers feature set.
+   See also arc_update_acc_reg_names() for "accl/acch" names.  */
+
+static struct arc_register_feature arc_v1_core_reg_feature =
+{
+  ARC_CORE_FEATURE_NAME,
+  {
+    { ARC_R0_REGNUM + 0, { "r0" }, true },
+    { ARC_R0_REGNUM + 1, { "r1" }, true },
+    { ARC_R0_REGNUM + 2, { "r2" }, true },
+    { ARC_R0_REGNUM + 3, { "r3" }, true },
+    { ARC_R0_REGNUM + 4, { "r4" }, false },
+    { ARC_R0_REGNUM + 5, { "r5" }, false },
+    { ARC_R0_REGNUM + 6, { "r6" }, false },
+    { ARC_R0_REGNUM + 7, { "r7" }, false },
+    { ARC_R0_REGNUM + 8, { "r8" }, false },
+    { ARC_R0_REGNUM + 9, { "r9" }, false },
+    { ARC_R0_REGNUM + 10, { "r10" }, true },
+    { ARC_R0_REGNUM + 11, { "r11" }, true },
+    { ARC_R0_REGNUM + 12, { "r12" }, true },
+    { ARC_R0_REGNUM + 13, { "r13" }, true },
+    { ARC_R0_REGNUM + 14, { "r14" }, true },
+    { ARC_R0_REGNUM + 15, { "r15" }, true },
+    { ARC_R0_REGNUM + 16, { "r16" }, false },
+    { ARC_R0_REGNUM + 17, { "r17" }, false },
+    { ARC_R0_REGNUM + 18, { "r18" }, false },
+    { ARC_R0_REGNUM + 19, { "r19" }, false },
+    { ARC_R0_REGNUM + 20, { "r20" }, false },
+    { ARC_R0_REGNUM + 21, { "r21" }, false },
+    { ARC_R0_REGNUM + 22, { "r22" }, false },
+    { ARC_R0_REGNUM + 23, { "r23" }, false },
+    { ARC_R0_REGNUM + 24, { "r24" }, false },
+    { ARC_R0_REGNUM + 25, { "r25" }, false },
+    { ARC_R0_REGNUM + 26, { "gp" }, true },
+    { ARC_R0_REGNUM + 27, { "fp" }, true },
+    { ARC_R0_REGNUM + 28, { "sp" }, true },
+    { ARC_R0_REGNUM + 29, { "ilink1" }, false },
+    { ARC_R0_REGNUM + 30, { "ilink2" }, false },
+    { ARC_R0_REGNUM + 31, { "blink" }, true },
+    { ARC_R0_REGNUM + 32, { "r32" }, false },
+    { ARC_R0_REGNUM + 33, { "r33" }, false },
+    { ARC_R0_REGNUM + 34, { "r34" }, false },
+    { ARC_R0_REGNUM + 35, { "r35" }, false },
+    { ARC_R0_REGNUM + 36, { "r36" }, false },
+    { ARC_R0_REGNUM + 37, { "r37" }, false },
+    { ARC_R0_REGNUM + 38, { "r38" }, false },
+    { ARC_R0_REGNUM + 39, { "r39" }, false },
+    { ARC_R0_REGNUM + 40, { "r40" }, false },
+    { ARC_R0_REGNUM + 41, { "r41" }, false },
+    { ARC_R0_REGNUM + 42, { "r42" }, false },
+    { ARC_R0_REGNUM + 43, { "r43" }, false },
+    { ARC_R0_REGNUM + 44, { "r44" }, false },
+    { ARC_R0_REGNUM + 45, { "r45" }, false },
+    { ARC_R0_REGNUM + 46, { "r46" }, false },
+    { ARC_R0_REGNUM + 47, { "r47" }, false },
+    { ARC_R0_REGNUM + 48, { "r48" }, false },
+    { ARC_R0_REGNUM + 49, { "r49" }, false },
+    { ARC_R0_REGNUM + 50, { "r50" }, false },
+    { ARC_R0_REGNUM + 51, { "r51" }, false },
+    { ARC_R0_REGNUM + 52, { "r52" }, false },
+    { ARC_R0_REGNUM + 53, { "r53" }, false },
+    { ARC_R0_REGNUM + 54, { "r54" }, false },
+    { ARC_R0_REGNUM + 55, { "r55" }, false },
+    { ARC_R0_REGNUM + 56, { "r56" }, false },
+    { ARC_R0_REGNUM + 57, { "r57" }, false },
+    { ARC_R0_REGNUM + 58, { "r58", "accl" }, false },
+    { ARC_R0_REGNUM + 59, { "r59", "acch" }, false },
+    { ARC_R0_REGNUM + 60, { "lp_count" }, false },
+    { ARC_R0_REGNUM + 61, { "reserved" }, false },
+    { ARC_R0_REGNUM + 62, { "limm" }, false },
+    { ARC_R0_REGNUM + 63, { "pcl" }, true }
+  }
 };
 
-static const char *const core_arcompact_register_names[] = {
-  "r0", "r1", "r2", "r3",
-  "r4", "r5", "r6", "r7",
-  "r8", "r9", "r10", "r11",
-  "r12", "r13", "r14", "r15",
-  "r16", "r17", "r18", "r19",
-  "r20", "r21", "r22", "r23",
-  "r24", "r25", "gp", "fp",
-  "sp", "ilink1", "ilink2", "blink",
-  "r32", "r33", "r34", "r35",
-  "r36", "r37", "r38", "r39",
-  "r40", "r41", "r42", "r43",
-  "r44", "r45", "r46", "r47",
-  "r48", "r49", "r50", "r51",
-  "r52", "r53", "r54", "r55",
-  "r56", "r57", "r58", "r59",
-  "lp_count", "reserved", "limm", "pcl",
+/* ARCv2 (ARCHS) general core registers feature set.  See also
+   arc_update_acc_reg_names() for "accl/acch" names.  */
+
+static struct arc_register_feature arc_v2_core_reg_feature =
+{
+  ARC_CORE_FEATURE_NAME,
+  {
+    { ARC_R0_REGNUM + 0, { "r0" }, true },
+    { ARC_R0_REGNUM + 1, { "r1" }, true },
+    { ARC_R0_REGNUM + 2, { "r2" }, true },
+    { ARC_R0_REGNUM + 3, { "r3" }, true },
+    { ARC_R0_REGNUM + 4, { "r4" }, false },
+    { ARC_R0_REGNUM + 5, { "r5" }, false },
+    { ARC_R0_REGNUM + 6, { "r6" }, false },
+    { ARC_R0_REGNUM + 7, { "r7" }, false },
+    { ARC_R0_REGNUM + 8, { "r8" }, false },
+    { ARC_R0_REGNUM + 9, { "r9" }, false },
+    { ARC_R0_REGNUM + 10, { "r10" }, true },
+    { ARC_R0_REGNUM + 11, { "r11" }, true },
+    { ARC_R0_REGNUM + 12, { "r12" }, true },
+    { ARC_R0_REGNUM + 13, { "r13" }, true },
+    { ARC_R0_REGNUM + 14, { "r14" }, true },
+    { ARC_R0_REGNUM + 15, { "r15" }, true },
+    { ARC_R0_REGNUM + 16, { "r16" }, false },
+    { ARC_R0_REGNUM + 17, { "r17" }, false },
+    { ARC_R0_REGNUM + 18, { "r18" }, false },
+    { ARC_R0_REGNUM + 19, { "r19" }, false },
+    { ARC_R0_REGNUM + 20, { "r20" }, false },
+    { ARC_R0_REGNUM + 21, { "r21" }, false },
+    { ARC_R0_REGNUM + 22, { "r22" }, false },
+    { ARC_R0_REGNUM + 23, { "r23" }, false },
+    { ARC_R0_REGNUM + 24, { "r24" }, false },
+    { ARC_R0_REGNUM + 25, { "r25" }, false },
+    { ARC_R0_REGNUM + 26, { "gp" }, true },
+    { ARC_R0_REGNUM + 27, { "fp" }, true },
+    { ARC_R0_REGNUM + 28, { "sp" }, true },
+    { ARC_R0_REGNUM + 29, { "ilink" }, false },
+    { ARC_R0_REGNUM + 30, { "r30" }, true },
+    { ARC_R0_REGNUM + 31, { "blink" }, true },
+    { ARC_R0_REGNUM + 32, { "r32" }, false },
+    { ARC_R0_REGNUM + 33, { "r33" }, false },
+    { ARC_R0_REGNUM + 34, { "r34" }, false },
+    { ARC_R0_REGNUM + 35, { "r35" }, false },
+    { ARC_R0_REGNUM + 36, { "r36" }, false },
+    { ARC_R0_REGNUM + 37, { "r37" }, false },
+    { ARC_R0_REGNUM + 38, { "r38" }, false },
+    { ARC_R0_REGNUM + 39, { "r39" }, false },
+    { ARC_R0_REGNUM + 40, { "r40" }, false },
+    { ARC_R0_REGNUM + 41, { "r41" }, false },
+    { ARC_R0_REGNUM + 42, { "r42" }, false },
+    { ARC_R0_REGNUM + 43, { "r43" }, false },
+    { ARC_R0_REGNUM + 44, { "r44" }, false },
+    { ARC_R0_REGNUM + 45, { "r45" }, false },
+    { ARC_R0_REGNUM + 46, { "r46" }, false },
+    { ARC_R0_REGNUM + 47, { "r47" }, false },
+    { ARC_R0_REGNUM + 48, { "r48" }, false },
+    { ARC_R0_REGNUM + 49, { "r49" }, false },
+    { ARC_R0_REGNUM + 50, { "r50" }, false },
+    { ARC_R0_REGNUM + 51, { "r51" }, false },
+    { ARC_R0_REGNUM + 52, { "r52" }, false },
+    { ARC_R0_REGNUM + 53, { "r53" }, false },
+    { ARC_R0_REGNUM + 54, { "r54" }, false },
+    { ARC_R0_REGNUM + 55, { "r55" }, false },
+    { ARC_R0_REGNUM + 56, { "r56" }, false },
+    { ARC_R0_REGNUM + 57, { "r57" }, false },
+    { ARC_R0_REGNUM + 58, { "r58", "accl" }, false },
+    { ARC_R0_REGNUM + 59, { "r59", "acch" }, false },
+    { ARC_R0_REGNUM + 60, { "lp_count" }, false },
+    { ARC_R0_REGNUM + 61, { "reserved" }, false },
+    { ARC_R0_REGNUM + 62, { "limm" }, false },
+    { ARC_R0_REGNUM + 63, { "pcl" }, true }
+  }
 };
 
-static char *arc_disassembler_options = NULL;
+/* The common auxiliary registers feature set.  The REGNUM field
+   must match the ARC_REGNUM enum in arc-tdep.h.  */
 
-/* Possible arc target descriptors.  */
-static struct target_desc *tdesc_arc_list[ARC_SYS_TYPE_NUM];
+static const struct arc_register_feature arc_common_aux_reg_feature =
+{
+  ARC_AUX_FEATURE_NAME,
+  {
+    { ARC_FIRST_AUX_REGNUM + 0, { "pc" }, true },
+    { ARC_FIRST_AUX_REGNUM + 1, { "status32" }, true },
+    { ARC_FIRST_AUX_REGNUM + 2, { "lp_start" }, false },
+    { ARC_FIRST_AUX_REGNUM + 3, { "lp_end" }, false },
+    { ARC_FIRST_AUX_REGNUM + 4, { "bta" }, false }
+  }
+};
+
+static char *arc_disassembler_options = NULL;
 
 /* Functions are sorted in the order as they are used in the
    _initialize_arc_tdep (), which uses the same order as gdbarch.h.  Static
@@ -1717,192 +1857,227 @@ static const struct frame_base arc_normal_base = {
   arc_frame_base_address
 };
 
-/* Initialize target description for the ARC.
-
-   Returns TRUE if input tdesc was valid and in this case it will assign TDESC
-   and TDESC_DATA output parameters.  */
-
-static bool
-arc_tdesc_init (struct gdbarch_info info, const struct target_desc **tdesc,
- struct tdesc_arch_data **tdesc_data)
+static inline enum
+arc_isa mach_type_to_arc_isa (const unsigned long mach)
 {
-  if (arc_debug)
-    debug_printf ("arc: Target description initialization.\n");
-
-  const struct target_desc *tdesc_loc = info.target_desc;
-
-  /* Depending on whether this is ARCompact or ARCv2 we will assign
-     different default registers sets (which will differ in exactly two core
-     registers).  GDB will also refuse to accept register feature from invalid
-     ISA - v2 features can be used only with v2 ARChitecture.  We read
-     bfd_arch_info, which looks like to be a safe bet here, as it looks like it
-     is always initialized even when we don't pass any elf file to GDB at all
-     (it uses default arch in this case).  Also GDB will call this function
-     multiple times, and if XML target description file contains architecture
-     specifications, then GDB will set this architecture to info.bfd_arch_info,
-     overriding value from ELF file if they are different.  That means that,
-     where matters, this value is always our best guess on what CPU we are
-     debugging.  It has been noted that architecture specified in tdesc file
-     has higher precedence over ELF and even "set architecture" - that is,
-     using "set architecture" command will have no effect when tdesc has "arch"
-     tag.  */
-  /* Cannot use arc_mach_is_arcv2 (), because gdbarch is not created yet.  */
-  const int is_arcv2 = (info.bfd_arch_info->mach == bfd_mach_arc_arcv2);
-  bool is_reduced_rf;
-  const char *const *core_regs;
-  const char *core_feature_name;
+  switch (mach)
+    {
+    case bfd_mach_arc_arc600:
+    case bfd_mach_arc_arc601:
+    case bfd_mach_arc_arc700:
+      return ARC_ISA_ARCV1;
+      break;
+    case bfd_mach_arc_arcv2:
+      return ARC_ISA_ARCV2;
+      break;
+    default:
+ internal_error (__FILE__, __LINE__,
+ _("unknown machine id %lu"), mach);
+    }
+  return ARC_ISA_NONE;
+}
 
-  /* If target doesn't provide a description, use the default ones.  */
-  if (!tdesc_has_registers (tdesc_loc))
+/* Common construction code for ARC_GDBARCH_FEATURES struct.  If there
+   is no ABFD, then a FEATURE with default values is returned.  */
+void arc_gdbarch_features_init (arc_gdbarch_features &features,
+ const bfd *abfd, const unsigned long mach)
+{
+  /* Try to guess the features parameters by looking at the binary to be
+     executed.  If the user is providing a binary that does not match the
+     target, then tough luck.  This is the last effort to makes sense of
+     what's going on.  */
+  if (abfd != NULL && bfd_get_flavour (abfd) == bfd_target_elf_flavour)
     {
-      if (is_arcv2)
- tdesc_loc = arc_read_description (ARC_SYS_TYPE_ARCV2);
+      unsigned char eclass = elf_elfheader (abfd)->e_ident[EI_CLASS];
+
+      if (eclass == ELFCLASS32)
+ features.reg_size = 4;
+      else if (eclass == ELFCLASS64)
+ features.reg_size = 8;
       else
- tdesc_loc = arc_read_description (ARC_SYS_TYPE_ARCOMPACT);
+ internal_error (__FILE__, __LINE__,
+ _("unknown ELF header class %d"), eclass);
     }
-  else
+
+  /* MACH from a bfd_arch_info struct is used here.  It should be a safe
+     bet, as it looks like the struct is always initialized even when we
+     don't pass any elf file to GDB at all (it uses default arch in that
+     case).  */
+  features.isa = mach_type_to_arc_isa (mach);
+
+  /* Put the most frequent values for the undetermined parameters.  */
+  if (features.reg_size == 0)
+    features.reg_size = 4;
+  if (features.isa == ARC_ISA_NONE)
+    features.reg_size = ARC_ISA_ARCV2;
+}
+
+/* Based on the MACH value, determines which core register features set
+   must be used.  Possible outcomes:
+   {nullptr, &arc_v1_core_reg_feature, &arc_v2_core_reg_feature}  */
+
+static arc_register_feature *
+determine_core_reg_feature_set (const unsigned long mach)
+{
+  switch (mach_type_to_arc_isa (mach))
     {
-      if (arc_debug)
- debug_printf ("arc: Using provided register set.\n");
+    case ARC_ISA_ARCV1:
+      return &arc_v1_core_reg_feature;
+    case ARC_ISA_ARCV2:
+      return &arc_v2_core_reg_feature;
+    default:
+      return nullptr;
     }
-  gdb_assert (tdesc_loc != NULL);
-
-  /* Now we can search for base registers.  Core registers can be either full
-     or reduced.  Summary:
-
-     - core.v2 + aux-minimal
-     - core-reduced.v2 + aux-minimal
-     - core.arcompact + aux-minimal
-
-     NB: It is entirely feasible to have ARCompact with reduced core regs, but
-     we ignore that because GCC doesn't support that and at the same time
-     ARCompact is considered obsolete, so there is not much reason to support
-     that.  */
-  const struct tdesc_feature *feature
-    = tdesc_find_feature (tdesc_loc, core_v2_feature_name);
-  if (feature != NULL)
-    {
-      /* Confirm that register and architecture match, to prevent accidents in
- some situations.  This code will trigger an error if:
+}
 
- 1. XML tdesc doesn't specify arch explicitly, registers are for arch
- X, but ELF specifies arch Y.
+/* At the moment, there is only 1 auxiliary register features set.
+   This is a place holder for future extendability.  */
 
- 2. XML tdesc specifies arch X, but contains registers for arch Y.
+static const arc_register_feature *
+determine_aux_reg_feature_set ()
+{
+  return &arc_common_aux_reg_feature;
+}
 
- It will not protect from case where XML or ELF specify arch X,
- registers are for the same arch X, but the real target is arch Y.  To
- detect this case we need to check IDENTITY register.  */
-      if (!is_arcv2)
- {
-  arc_print (_("Error: ARC v2 target description supplied for "
-       "non-ARCv2 target.\n"));
-  return false;
- }
+/* Update accumulator register names (ACCH/ACCL) for r58 and r59 in the
+   register sets.  The endianness determines the assignment:
 
-      is_reduced_rf = false;
-      core_feature_name = core_v2_feature_name;
-      core_regs = core_v2_register_names;
-    }
-  else
+         ,------.------.
+         |  LE  |  BE  |
+   ,-----|------+------|
+   | r58 | accl | acch |
+   | r59 | acch | accl |
+   `-----^------^------'  */
+
+static void
+arc_update_acc_reg_names (const int byte_order)
+{
+  const char *r58_alias
+    = byte_order == BFD_ENDIAN_LITTLE ? "accl" : "acch";
+  const char *r59_alias
+    = byte_order == BFD_ENDIAN_LITTLE ? "acch" : "accl";
+
+  /* Subscript 1 must be OK because those registers have 2 names.  */
+  arc_v1_core_reg_feature.registers[ARC_R58_REGNUM].names[1] = r58_alias;
+  arc_v1_core_reg_feature.registers[ARC_R59_REGNUM].names[1] = r59_alias;
+  arc_v2_core_reg_feature.registers[ARC_R58_REGNUM].names[1] = r58_alias;
+  arc_v2_core_reg_feature.registers[ARC_R59_REGNUM].names[1] = r59_alias;
+}
+
+/* Go through all the registers in REG_SET and check if they exist
+   in FEATURE.  The TDESC_DATA is updated with the register number
+   in REG_SET if it is found in the feature.  If a required register
+   is not found, this function returns false.  */
+
+static bool
+arc_check_tdesc_feature (struct tdesc_arch_data *tdesc_data,
+ const struct tdesc_feature *feature,
+ const struct arc_register_feature *reg_set)
+{
+  for (const auto &reg : reg_set->registers)
     {
-      feature = tdesc_find_feature (tdesc_loc, core_reduced_v2_feature_name);
-      if (feature != NULL)
+      bool found = false;
+
+      for (const char *name : reg.names)
  {
-  if (!is_arcv2)
-    {
-      arc_print (_("Error: ARC v2 target description supplied for "
-   "non-ARCv2 target.\n"));
-      return false;
-    }
+  found =
+    tdesc_numbered_register (feature, tdesc_data, reg.regnum, name);
 
-  is_reduced_rf = true;
-  core_feature_name = core_reduced_v2_feature_name;
-  core_regs = core_v2_register_names;
+  if (found)
+    break;
  }
-      else
+
+      if (!found && reg.required_p)
  {
-  feature = tdesc_find_feature (tdesc_loc,
- core_arcompact_feature_name);
-  if (feature != NULL)
-    {
-      if (is_arcv2)
- {
-  arc_print (_("Error: ARCompact target description supplied "
-       "for non-ARCompact target.\n"));
-  return false;
- }
-
-      is_reduced_rf = false;
-      core_feature_name = core_arcompact_feature_name;
-      core_regs = core_arcompact_register_names;
-    }
-  else
+  std::ostringstream reg_names;
+  for (std::size_t i = 0; i < reg.names.size(); ++i)
     {
-      arc_print (_("Error: Couldn't find core register feature in "
-   "supplied target description."));
-      return false;
+      if (i == 0)
+ reg_names << "'" << reg.names[0] << "'";
+      else
+ reg_names << " or '" << reg.names[0] << "'";
     }
+  arc_print (_("Error: Cannot find required register(s) %s "
+       "in feature '%s'.\n"), reg_names.str ().c_str (),
+       feature->name.c_str ());
+  return false;
  }
     }
 
-  struct tdesc_arch_data *tdesc_data_loc = tdesc_data_alloc ();
+  return true;
+}
 
-  gdb_assert (feature != NULL);
-  int valid_p = 1;
+/* Initialize target description for the ARC.
 
-  for (int i = 0; i <= ARC_LAST_CORE_REGNUM; i++)
+   Returns true if input TDESC was valid and in this case it will assign TDESC
+   and TDESC_DATA output parameters.  */
+
+static bool
+arc_tdesc_init (struct gdbarch_info info, const struct target_desc **tdesc,
+ struct tdesc_arch_data **tdesc_data)
+{
+  const struct target_desc *tdesc_loc = info.target_desc;
+  if (arc_debug)
+    debug_printf ("arc: Target description initialization.\n");
+
+  /* If target doesn't provide a description, use the default ones.  */
+  if (!tdesc_has_registers (tdesc_loc))
     {
-      /* If rf16, then skip extra registers.  */
-      if (is_reduced_rf && ((i >= ARC_R4_REGNUM && i <= ARC_R9_REGNUM)
-    || (i >= ARC_R16_REGNUM && i <= ARC_R25_REGNUM)))
- continue;
-
-      valid_p = tdesc_numbered_register (feature, tdesc_data_loc, i,
- core_regs[i]);
-
-      /* - Ignore errors in extension registers - they are optional.
- - Ignore missing ILINK because it doesn't make sense for Linux.
- - Ignore missing ILINK2 when architecture is ARCompact, because it
- doesn't make sense for Linux targets.
-
- In theory those optional registers should be in separate features, but
- that would create numerous but tiny features, which looks like an
- overengineering of a rather simple task.  */
-      if (!valid_p && (i <= ARC_SP_REGNUM || i == ARC_BLINK_REGNUM
-       || i == ARC_LP_COUNT_REGNUM || i == ARC_PCL_REGNUM
-       || (i == ARC_R30_REGNUM && is_arcv2)))
- {
-  arc_print (_("Error: Cannot find required register `%s' in "
-       "feature `%s'.\n"), core_regs[i], core_feature_name);
-  tdesc_data_cleanup (tdesc_data_loc);
-  return false;
- }
+      arc_gdbarch_features features;
+      arc_gdbarch_features_init (features, info.abfd,
+ info.bfd_arch_info->mach);
+      tdesc_loc = arc_lookup_target_description (features);
     }
+  gdb_assert (tdesc_loc != nullptr);
+
+  if (arc_debug)
+    debug_printf ("arc: Have got a target description\n");
 
-  /* Mandatory AUX registers are intentionally few and are common between
-     ARCompact and ARC v2, so same code can be used for both.  */
-  feature = tdesc_find_feature (tdesc_loc, aux_minimal_feature_name);
-  if (feature == NULL)
+  const struct tdesc_feature *feature_core
+    = tdesc_find_feature (tdesc_loc, ARC_CORE_FEATURE_NAME);
+  const struct tdesc_feature *feature_aux
+    = tdesc_find_feature (tdesc_loc, ARC_AUX_FEATURE_NAME);
+
+  if (feature_core == nullptr)
     {
-      arc_print (_("Error: Cannot find required feature `%s' in supplied "
-   "target description.\n"), aux_minimal_feature_name);
-      tdesc_data_cleanup (tdesc_data_loc);
+      arc_print (_("Error: Cannot find required feature '%s' in supplied "
+   "target description.\n"), ARC_CORE_FEATURE_NAME);
       return false;
     }
 
-  for (int i = ARC_FIRST_AUX_REGNUM; i <= ARC_LAST_AUX_REGNUM; i++)
+  if (feature_aux == nullptr)
     {
-      const char *name = aux_minimal_register_names[i - ARC_FIRST_AUX_REGNUM];
-      valid_p = tdesc_numbered_register (feature, tdesc_data_loc, i, name);
-      if (!valid_p)
- {
-  arc_print (_("Error: Cannot find required register `%s' "
-       "in feature `%s'.\n"),
-     name, tdesc_feature_name (feature));
-  tdesc_data_cleanup (tdesc_data_loc);
-  return false;
- }
+      arc_print (_("Error: Cannot find required feature '%s' in supplied "
+   "target description.\n"), ARC_AUX_FEATURE_NAME);
+      return false;
+    }
+
+  const auto arc_core_reg_feature
+    = determine_core_reg_feature_set (info.bfd_arch_info->mach);
+  const auto arc_aux_reg_feature
+    = determine_aux_reg_feature_set ();
+
+  if (arc_core_reg_feature == nullptr || arc_aux_reg_feature == nullptr)
+    return false;
+
+  struct tdesc_arch_data *tdesc_data_loc = tdesc_data_alloc ();
+
+  arc_update_acc_reg_names (info.byte_order);
+
+  bool valid_p = arc_check_tdesc_feature (tdesc_data_loc,
+  feature_core,
+  arc_core_reg_feature);
+
+  valid_p &= arc_check_tdesc_feature (tdesc_data_loc,
+      feature_aux,
+      arc_aux_reg_feature);
+
+  if (!valid_p)
+    {
+      if (arc_debug)
+        debug_printf ("arc: Target description is not valid\n");
+      tdesc_data_cleanup (tdesc_data_loc);
+      return false;
     }
 
   *tdesc = tdesc_loc;
@@ -2133,36 +2308,6 @@ dump_arc_instruction_command (const char *args, int from_tty)
 
 /* See arc-tdep.h.  */
 
-const target_desc *
-arc_read_description (arc_sys_type sys_type)
-{
-  if (arc_debug)
-    debug_printf ("arc: Reading target description for \"%s\".\n",
-  arc_sys_type_to_str (sys_type));
-
-  gdb_assert ((sys_type >= 0) && (sys_type < ARC_SYS_TYPE_NUM));
-  struct target_desc *tdesc = tdesc_arc_list[sys_type];
-
-  if (tdesc == nullptr)
-    {
-      tdesc = arc_create_target_description (sys_type);
-      tdesc_arc_list[sys_type] = tdesc;
-
-      if (arc_debug)
- {
-  const char *arch = tdesc_architecture_name (tdesc);
-  const char *abi = tdesc_osabi_name (tdesc);
-  arch = arch != NULL ? arch : "";
-  abi = abi != NULL ? abi : "";
-  debug_printf ("arc: Created target description for "
- "\"%s\": arch=\"%s\", ABI=\"%s\"\n",
- arc_sys_type_to_str (sys_type), arch, abi);
- }
-    }
-
-  return tdesc;
-}
-
 void _initialize_arc_tdep ();
 void
 _initialize_arc_tdep ()
diff --git a/gdb/arc-tdep.h b/gdb/arc-tdep.h
index d72332c7638..f4ce6a9a50a 100644
--- a/gdb/arc-tdep.h
+++ b/gdb/arc-tdep.h
@@ -35,7 +35,6 @@ enum arc_regnum
   {
     /* Core registers.  */
     ARC_R0_REGNUM = 0,
-    ARC_FIRST_CORE_REGNUM = ARC_R0_REGNUM,
     ARC_R1_REGNUM = 1,
     ARC_R4_REGNUM = 4,
     ARC_R7_REGNUM = 7,
@@ -54,6 +53,9 @@ enum arc_regnum
     ARC_R30_REGNUM,
     /* Return address from function.  */
     ARC_BLINK_REGNUM,
+    /* Accumulator registers.  */
+    ARC_R58_REGNUM = 58,
+    ARC_R59_REGNUM,
     /* Zero-delay loop counter.  */
     ARC_LP_COUNT_REGNUM = 60,
     /* Reserved register number.  There should never be a register with such
@@ -69,14 +71,21 @@ enum arc_regnum
     /* Program counter, aligned to 4-bytes, read-only.  */
     ARC_PCL_REGNUM,
     ARC_LAST_CORE_REGNUM = ARC_PCL_REGNUM,
+
     /* AUX registers.  */
     /* Actual program counter.  */
     ARC_PC_REGNUM,
     ARC_FIRST_AUX_REGNUM = ARC_PC_REGNUM,
     /* Status register.  */
     ARC_STATUS32_REGNUM,
-    ARC_LAST_REGNUM = ARC_STATUS32_REGNUM,
-    ARC_LAST_AUX_REGNUM = ARC_STATUS32_REGNUM,
+    /* Zero-delay loop start instruction.  */
+    ARC_LP_START_REGNUM,
+    /* Zero-delay loop next-after-last instruction.  */
+    ARC_LP_END_REGNUM,
+    /* Branch target address.  */
+    ARC_BTA_REGNUM,
+    ARC_LAST_AUX_REGNUM = ARC_BTA_REGNUM,
+    ARC_LAST_REGNUM = ARC_LAST_AUX_REGNUM,
 
     /* Additional ABI constants.  */
     ARC_FIRST_ARG_REGNUM = ARC_R0_REGNUM,
@@ -164,7 +173,9 @@ CORE_ADDR arc_insn_get_branch_target (const struct arc_instruction &insn);
 
 CORE_ADDR arc_insn_get_linear_next_pc (const struct arc_instruction &insn);
 
-/* Get the correct ARC target description for the given system type.  */
-const target_desc *arc_read_description (arc_sys_type sys_type);
+/* Initialize FEATURES from the provided data.  */
+
+void arc_gdbarch_features_init (arc_gdbarch_features &features,
+ const bfd *abfd, const unsigned long mach);
 
 #endif /* ARC_TDEP_H */
diff --git a/gdb/arch/arc.c b/gdb/arch/arc.c
index 9552b4aff97..84bc8df7788 100644
--- a/gdb/arch/arc.c
+++ b/gdb/arch/arc.c
@@ -17,42 +17,104 @@
 
 
 #include "gdbsupport/common-defs.h"
-#include <stdlib.h>
-
 #include "arc.h"
+#include <stdlib.h>
+#include <unordered_map>
+#include <sstream>
 
 /* Target description features.  */
-#include "features/arc/core-v2.c"
-#include "features/arc/aux-v2.c"
-#include "features/arc/core-arcompact.c"
-#include "features/arc/aux-arcompact.c"
+#include "features/arc/v1-core.c"
+#include "features/arc/v1-aux.c"
+#include "features/arc/v2-core.c"
+#include "features/arc/v2-aux.c"
 
-/* See arc.h.  */
+#ifndef GDBSERVER
+#define STATIC_IN_GDB static
+#else
+#define STATIC_IN_GDB
+#endif
 
-target_desc *
-arc_create_target_description (arc_sys_type sys_type)
+STATIC_IN_GDB target_desc *
+arc_create_target_description (const struct arc_gdbarch_features &features)
 {
+  /* Create a new target description.  */
   target_desc *tdesc = allocate_target_description ();
 
-  long regnum = 0;
-
 #ifndef IN_PROCESS_AGENT
-  if (sys_type == ARC_SYS_TYPE_ARCV2)
-    set_tdesc_architecture (tdesc, "arc:ARCv2");
-  else
-    set_tdesc_architecture (tdesc, "arc:ARC700");
-#endif
+  std::string arch_name = "arc";
 
-  if (sys_type == ARC_SYS_TYPE_ARCV2)
+  /* Architecture names here must match the ones in
+     ARCH_INFO_STRUCT in bfd/cpu-arc.c.  */
+  if (features.isa == ARC_ISA_ARCV1 && features.reg_size == 4)
+      arch_name.append (":ARC700");
+  else if (features.isa == ARC_ISA_ARCV2 && features.reg_size == 4)
+      arch_name.append (":ARCv2");
+  else
     {
-      regnum = create_feature_arc_core_v2 (tdesc, regnum);
-      regnum = create_feature_arc_aux_v2 (tdesc, regnum);
+      std::ostringstream msg;
+      msg << "Cannot determine architecture: ISA=" << features.isa
+  << "; bitness=" << 8*features.reg_size;
+      gdb_assert_not_reached (msg.str ().c_str ());
     }
-  else
+
+  set_tdesc_architecture (tdesc, arch_name.c_str ());
+#endif
+
+  long regnum = 0;
+
+  switch (features.isa)
     {
-      regnum = create_feature_arc_core_arcompact (tdesc, regnum);
-      regnum = create_feature_arc_aux_arcompact (tdesc, regnum);
+    case ARC_ISA_ARCV1:
+  regnum = create_feature_arc_v1_core (tdesc, regnum);
+  regnum = create_feature_arc_v1_aux (tdesc, regnum);
+  break;
+    case ARC_ISA_ARCV2:
+  regnum = create_feature_arc_v2_core (tdesc, regnum);
+  regnum = create_feature_arc_v2_aux (tdesc, regnum);
+  break;
+    default:
+  std::ostringstream msg;
+  msg << "Cannot choose target description XML: " << features.isa;
+  gdb_assert_not_reached (msg.str ().c_str ());
     }
 
   return tdesc;
 }
+
+#ifndef GDBSERVER
+
+/* Wrapper used by std::unordered_map to generate hash for features set.  */
+struct arc_gdbarch_features_hasher
+{
+  std::size_t
+  operator() (const arc_gdbarch_features &features) const noexcept
+  {
+    return features.hash ();
+  }
+};
+
+/* Cache of previously created target descriptions, indexed by the hash
+   of the features set used to create them.  */
+static std::unordered_map<arc_gdbarch_features,
+  const target_desc *,
+  arc_gdbarch_features_hasher> arc_tdesc_cache;
+
+/* See arch/arc.h.  */
+
+const target_desc *
+arc_lookup_target_description (const struct arc_gdbarch_features &features)
+{
+  /* Lookup in the cache first.  */
+  const auto it = arc_tdesc_cache.find (features);
+  if (it != arc_tdesc_cache.end ())
+    return it->second;
+
+  target_desc *tdesc = arc_create_target_description (features);
+
+  /* Add the newly created target description to the repertoire.  */
+  arc_tdesc_cache.emplace (features, tdesc);
+
+  return tdesc;
+}
+
+#endif /* !GDBSERVER */
diff --git a/gdb/arch/arc.h b/gdb/arch/arc.h
index fd806ae7d34..4f400c93a7d 100644
--- a/gdb/arch/arc.h
+++ b/gdb/arch/arc.h
@@ -20,29 +20,65 @@
 
 #include "gdbsupport/tdesc.h"
 
-/* Supported ARC system hardware types.  */
-enum arc_sys_type
+/* Supported ARC ISAs.  */
+enum arc_isa
 {
-  ARC_SYS_TYPE_ARCOMPACT = 0,  /* ARC600 or ARC700 */
-  ARC_SYS_TYPE_ARCV2,  /* ARC EM or ARC HS */
-  ARC_SYS_TYPE_NUM
+  ARC_ISA_NONE = 0,
+  ARC_ISA_ARCV1,    /* a.k.a. ARCompact (ARC600, ARC700)  */
+  ARC_ISA_ARCV2    /* such as ARC EM and ARC HS  */
 };
 
-static inline const char *
-arc_sys_type_to_str (const arc_sys_type type)
+struct arc_gdbarch_features
 {
-  switch (type)
-    {
-    case ARC_SYS_TYPE_ARCOMPACT:
-      return "ARC_SYS_TYPE_ARCOMPACT";
-    case ARC_SYS_TYPE_ARCV2:
-      return "ARC_SYS_TYPE_ARCV2";
-    default:
-      return "Invalid";
-    }
-}
-
-/* Create target description for the specified system type.  */
-target_desc *arc_create_target_description (arc_sys_type sys_type);
+  /* Register size in bytes.  Possible values are 4, and 8.  A 0 indicates
+     an uninitialised value.  */
+  int reg_size = 0;
+
+  /* See ARC_ISA enum.  */
+  int isa = ARC_ISA_NONE;
+
+  /* Equality operator.  */
+  bool operator== (const struct arc_gdbarch_features &rhs) const
+  {
+    return (reg_size == rhs.reg_size && isa == rhs.isa);
+  }
+
+  /* Inequality operator.  */
+  bool operator!= (const struct arc_gdbarch_features &rhs) const
+  {
+    return !(*this == rhs);
+  }
+
+  /* Used by std::unordered_map to hash the feature sets.  The hash is
+     calculated in the manner below:
+     REG_SIZE |  ISA
+      5-bits  | 4-bits  */
+
+  std::size_t hash () const noexcept
+  {
+    std::size_t val = ((reg_size & 0x1f) << 8 | (isa & 0xf) << 0);
+    return val;
+  }
+};
+
+#ifdef GDBSERVER
+
+/* Create and return a target description that is compatible with FEATURES.
+   The only external client of this must be the gdbserver which manipulates
+   the returned data.  */
+
+target_desc *arc_create_target_description
+ (const struct arc_gdbarch_features &features);
+
+#else
+
+/* Lookup the cache for a target description matching the FEATURES.
+   If nothing is found, then create one and return it.  */
+
+const target_desc *arc_lookup_target_description
+ (const struct arc_gdbarch_features &features);
+
+#endif /* GDBSERVER */
+
 
 #endif /* ARCH_ARC_H */
diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index cc65baa6eda..532daa8226b 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -204,10 +204,10 @@ $(outdir)/%.dat: %.xml number-regs.xsl sort-regs.xsl gdbserver-regs.xsl
 FEATURE_XMLFILES = aarch64-core.xml \
  aarch64-fpu.xml \
  aarch64-pauth.xml \
- arc/core-v2.xml \
- arc/aux-v2.xml \
- arc/core-arcompact.xml \
- arc/aux-arcompact.xml \
+ arc/v1-core.xml \
+ arc/v1-aux.xml \
+ arc/v2-core.xml \
+ arc/v2-aux.xml \
  arm/arm-core.xml \
  arm/arm-fpa.xml \
  arm/arm-m-profile.xml \
diff --git a/gdb/features/arc/aux-arcompact.c b/gdb/features/arc/v1-aux.c
similarity index 73%
rename from gdb/features/arc/aux-arcompact.c
rename to gdb/features/arc/v1-aux.c
index d8e8c74e639..d1540763433 100644
--- a/gdb/features/arc/aux-arcompact.c
+++ b/gdb/features/arc/v1-aux.c
@@ -1,14 +1,14 @@
 /* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
-  Original: aux-arcompact.xml */
+  Original: v1-aux.xml */
 
 #include "gdbsupport/tdesc.h"
 
 static int
-create_feature_arc_aux_arcompact (struct target_desc *result, long regnum)
+create_feature_arc_v1_aux (struct target_desc *result, long regnum)
 {
   struct tdesc_feature *feature;
 
-  feature = tdesc_create_feature (result, "org.gnu.gdb.arc.aux-minimal");
+  feature = tdesc_create_feature (result, "org.gnu.gdb.arc.aux");
   tdesc_type_with_fields *type_with_fields;
   type_with_fields = tdesc_create_flags (feature, "status32_type", 4);
   tdesc_add_flag (type_with_fields, 0, "H");
@@ -27,5 +27,8 @@ create_feature_arc_aux_arcompact (struct target_desc *result, long regnum)
 
   tdesc_create_reg (feature, "pc", regnum++, 1, NULL, 32, "code_ptr");
   tdesc_create_reg (feature, "status32", regnum++, 1, NULL, 32, "status32_type");
+  tdesc_create_reg (feature, "lp_start", regnum++, 1, NULL, 32, "code_ptr");
+  tdesc_create_reg (feature, "lp_end", regnum++, 1, NULL, 32, "code_ptr");
+  tdesc_create_reg (feature, "bta", regnum++, 1, NULL, 32, "code_ptr");
   return regnum;
 }
diff --git a/gdb/features/arc/aux-arcompact.xml b/gdb/features/arc/v1-aux.xml
similarity index 80%
rename from gdb/features/arc/aux-arcompact.xml
rename to gdb/features/arc/v1-aux.xml
index bf68112f5db..091808b1e29 100644
--- a/gdb/features/arc/aux-arcompact.xml
+++ b/gdb/features/arc/v1-aux.xml
@@ -6,7 +6,7 @@
      notice and this notice are preserved.  -->
 
 <!DOCTYPE target SYSTEM "gdb-target.dtd">
-<feature name="org.gnu.gdb.arc.aux-minimal">
+<feature name="org.gnu.gdb.arc.aux">
   <flags id="status32_type" size="4">
       <field name="H"   start="0" end="0"/>
       <field name="E"   start="1" end="2"/>
@@ -19,10 +19,13 @@
       <field name="N"   start="10" end="10"/>
       <field name="Z"   start="11" end="11"/>
       <field name="L"   start="12" end="12"/>
-      <field name="R"  start="13" end="13"/>
+      <field name="R"   start="13" end="13"/>
       <field name="SE"  start="14" end="14"/>
   </flags>
 
   <reg name="pc"       bitsize="32" type="code_ptr"/>
   <reg name="status32" bitsize="32" type="status32_type"/>
+  <reg name="lp_start" bitsize="32" type="code_ptr"/>
+  <reg name="lp_end"   bitsize="32" type="code_ptr"/>
+  <reg name="bta"      bitsize="32" type="code_ptr"/>
 </feature>
diff --git a/gdb/features/arc/core-arcompact.c b/gdb/features/arc/v1-core.c
similarity index 87%
rename from gdb/features/arc/core-arcompact.c
rename to gdb/features/arc/v1-core.c
index 7d9a4b23c21..df51d4788df 100644
--- a/gdb/features/arc/core-arcompact.c
+++ b/gdb/features/arc/v1-core.c
@@ -1,14 +1,14 @@
 /* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
-  Original: core-arcompact.xml */
+  Original: v1-core.xml */
 
 #include "gdbsupport/tdesc.h"
 
 static int
-create_feature_arc_core_arcompact (struct target_desc *result, long regnum)
+create_feature_arc_v1_core (struct target_desc *result, long regnum)
 {
   struct tdesc_feature *feature;
 
-  feature = tdesc_create_feature (result, "org.gnu.gdb.arc.core.arcompact");
+  feature = tdesc_create_feature (result, "org.gnu.gdb.arc.core");
   tdesc_create_reg (feature, "r0", regnum++, 1, NULL, 32, "int");
   tdesc_create_reg (feature, "r1", regnum++, 1, NULL, 32, "int");
   tdesc_create_reg (feature, "r2", regnum++, 1, NULL, 32, "int");
@@ -38,8 +38,6 @@ create_feature_arc_core_arcompact (struct target_desc *result, long regnum)
   tdesc_create_reg (feature, "gp", regnum++, 1, NULL, 32, "data_ptr");
   tdesc_create_reg (feature, "fp", regnum++, 1, NULL, 32, "data_ptr");
   tdesc_create_reg (feature, "sp", regnum++, 1, NULL, 32, "data_ptr");
-  tdesc_create_reg (feature, "ilink1", regnum++, 1, NULL, 32, "code_ptr");
-  tdesc_create_reg (feature, "ilink2", regnum++, 1, NULL, 32, "code_ptr");
   tdesc_create_reg (feature, "blink", regnum++, 1, NULL, 32, "code_ptr");
   tdesc_create_reg (feature, "lp_count", regnum++, 1, NULL, 32, "uint32");
   tdesc_create_reg (feature, "pcl", regnum++, 1, NULL, 32, "code_ptr");
diff --git a/gdb/features/arc/core-arcompact.xml b/gdb/features/arc/v1-core.xml
similarity index 92%
rename from gdb/features/arc/core-arcompact.xml
rename to gdb/features/arc/v1-core.xml
index 9209891b41a..68d04bdf9d0 100644
--- a/gdb/features/arc/core-arcompact.xml
+++ b/gdb/features/arc/v1-core.xml
@@ -6,7 +6,7 @@
      notice and this notice are preserved.  -->
 
 <!DOCTYPE target SYSTEM "gdb-target.dtd">
-<feature name="org.gnu.gdb.arc.core.arcompact">
+<feature name="org.gnu.gdb.arc.core">
   <reg name="r0"  bitsize="32"/>
   <reg name="r1"  bitsize="32"/>
   <reg name="r2"  bitsize="32"/>
@@ -40,8 +40,6 @@
   <reg name="sp"  bitsize="32" type="data_ptr"/>
 
   <!-- Code pointers.  -->
-  <reg name="ilink1" bitsize="32" type="code_ptr"/>
-  <reg name="ilink2" bitsize="32" type="code_ptr"/>
   <reg name="blink"  bitsize="32" type="code_ptr"/>
 
   <!-- Here goes extension core registers: r32 - r59 -->
diff --git a/gdb/features/arc/aux-v2.c b/gdb/features/arc/v2-aux.c
similarity index 76%
rename from gdb/features/arc/aux-v2.c
rename to gdb/features/arc/v2-aux.c
index 6290b9b1a7f..7b38e377fe1 100644
--- a/gdb/features/arc/aux-v2.c
+++ b/gdb/features/arc/v2-aux.c
@@ -1,14 +1,14 @@
 /* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
-  Original: aux-v2.xml */
+  Original: v2-aux.xml */
 
 #include "gdbsupport/tdesc.h"
 
 static int
-create_feature_arc_aux_v2 (struct target_desc *result, long regnum)
+create_feature_arc_v2_aux (struct target_desc *result, long regnum)
 {
   struct tdesc_feature *feature;
 
-  feature = tdesc_create_feature (result, "org.gnu.gdb.arc.aux-minimal");
+  feature = tdesc_create_feature (result, "org.gnu.gdb.arc.aux");
   tdesc_type_with_fields *type_with_fields;
   type_with_fields = tdesc_create_flags (feature, "status32_type", 4);
   tdesc_add_flag (type_with_fields, 0, "H");
@@ -31,5 +31,8 @@ create_feature_arc_aux_v2 (struct target_desc *result, long regnum)
 
   tdesc_create_reg (feature, "pc", regnum++, 1, NULL, 32, "code_ptr");
   tdesc_create_reg (feature, "status32", regnum++, 1, NULL, 32, "status32_type");
+  tdesc_create_reg (feature, "lp_start", regnum++, 1, NULL, 32, "code_ptr");
+  tdesc_create_reg (feature, "lp_end", regnum++, 1, NULL, 32, "code_ptr");
+  tdesc_create_reg (feature, "bta", regnum++, 1, NULL, 32, "code_ptr");
   return regnum;
 }
diff --git a/gdb/features/arc/aux-v2.xml b/gdb/features/arc/v2-aux.xml
similarity index 86%
rename from gdb/features/arc/aux-v2.xml
rename to gdb/features/arc/v2-aux.xml
index 2701fad72dc..5d81e248088 100644
--- a/gdb/features/arc/aux-v2.xml
+++ b/gdb/features/arc/v2-aux.xml
@@ -6,7 +6,7 @@
      notice and this notice are preserved.  -->
 
 <!DOCTYPE target SYSTEM "gdb-target.dtd">
-<feature name="org.gnu.gdb.arc.aux-minimal">
+<feature name="org.gnu.gdb.arc.aux">
   <flags id="status32_type" size="4">
       <field name="H"   start="0" end="0"/>
       <field name="E"   start="1" end="4"/>
@@ -29,4 +29,7 @@
 
   <reg name="pc"       bitsize="32" type="code_ptr"/>
   <reg name="status32" bitsize="32" type="status32_type"/>
+  <reg name="lp_start" bitsize="32" type="code_ptr"/>
+  <reg name="lp_end"   bitsize="32" type="code_ptr"/>
+  <reg name="bta"      bitsize="32" type="code_ptr"/>
 </feature>
diff --git a/gdb/features/arc/core-v2.c b/gdb/features/arc/v2-core.c
similarity index 91%
rename from gdb/features/arc/core-v2.c
rename to gdb/features/arc/v2-core.c
index d37da990457..1c3ef1a91df 100644
--- a/gdb/features/arc/core-v2.c
+++ b/gdb/features/arc/v2-core.c
@@ -1,14 +1,14 @@
 /* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
-  Original: core-v2.xml */
+  Original: v2-core.xml */
 
 #include "gdbsupport/tdesc.h"
 
 static int
-create_feature_arc_core_v2 (struct target_desc *result, long regnum)
+create_feature_arc_v2_core (struct target_desc *result, long regnum)
 {
   struct tdesc_feature *feature;
 
-  feature = tdesc_create_feature (result, "org.gnu.gdb.arc.core.v2");
+  feature = tdesc_create_feature (result, "org.gnu.gdb.arc.core");
   tdesc_create_reg (feature, "r0", regnum++, 1, NULL, 32, "int");
   tdesc_create_reg (feature, "r1", regnum++, 1, NULL, 32, "int");
   tdesc_create_reg (feature, "r2", regnum++, 1, NULL, 32, "int");
@@ -38,7 +38,6 @@ create_feature_arc_core_v2 (struct target_desc *result, long regnum)
   tdesc_create_reg (feature, "gp", regnum++, 1, NULL, 32, "data_ptr");
   tdesc_create_reg (feature, "fp", regnum++, 1, NULL, 32, "data_ptr");
   tdesc_create_reg (feature, "sp", regnum++, 1, NULL, 32, "data_ptr");
-  tdesc_create_reg (feature, "ilink", regnum++, 1, NULL, 32, "code_ptr");
   tdesc_create_reg (feature, "r30", regnum++, 1, NULL, 32, "int");
   tdesc_create_reg (feature, "blink", regnum++, 1, NULL, 32, "code_ptr");
   tdesc_create_reg (feature, "lp_count", regnum++, 1, NULL, 32, "uint32");
diff --git a/gdb/features/arc/core-v2.xml b/gdb/features/arc/v2-core.xml
similarity index 90%
rename from gdb/features/arc/core-v2.xml
rename to gdb/features/arc/v2-core.xml
index 1b17968fb2e..2a2561eab16 100644
--- a/gdb/features/arc/core-v2.xml
+++ b/gdb/features/arc/v2-core.xml
@@ -6,7 +6,7 @@
      notice and this notice are preserved.  -->
 
 <!DOCTYPE target SYSTEM "gdb-target.dtd">
-<feature name="org.gnu.gdb.arc.core.v2">
+<feature name="org.gnu.gdb.arc.core">
   <reg name="r0"  bitsize="32"/>
   <reg name="r1"  bitsize="32"/>
   <reg name="r2"  bitsize="32"/>
@@ -42,12 +42,11 @@
   <!-- Code pointers.  R30 is general purpose, but it used to be ILINK2 in
   ARCompact, thus its odd position in between of special purpose registers.
   GCC does't use this register, so it isn't a member of a general group. -->
-  <reg name="ilink" bitsize="32" type="code_ptr"/>
   <reg name="r30"   bitsize="32" group=""/>
   <reg name="blink" bitsize="32" type="code_ptr"/>
 
-  <!-- Here goes extension core registers: r32 - r57.  -->
-  <!-- Here goes ACCL/ACCH registers, r58, r59.  -->
+  <!-- Extension core registers: r32 - r57.  -->
+  <!-- ACCL/ACCH registers: r58, r59.  -->
 
   <!-- Loop counter.  -->
   <reg name="lp_count" bitsize="32" type="uint32"/>
--
2.27.0

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[PATCH v3 2/3] arc: Add hardware loop detection

Sourceware - gdb-patches mailing list
In reply to this post by Sourceware - gdb-patches mailing list
From: Shahab Vahedi <[hidden email]>

For ARC there are registers that are not part of a required set in XML
target descriptions by default, but are almost always present on ARC
targets and are universally exposed by the ptrace interface.  Hardware
loop registers being one of them.

LP_START and LP_END auxiliary registers are hardware loop start and end.
Formally, they are optional, but it is hard to find an ARC configuration
that doesn't have them.  They are always present in processors that can
run GNU/Linux.  GDB needs to know about those registers to implement
proper software single stepping, since they affect  what instruction
will be next.

This commit adds the code to check for the existance of "lp_start" and
"lp_end" in XML target descriptions. If they exist, then the function
reports that the target supports hardware loops.

gdb/ChangeLog:
2020-07-09  Shahab Vahedi  <[hidden email]>

        * arc-tdep.c (arc_check_for_hardware_loop): New.
        * arc-tdep.h (gdbarch_tdep): New field has_hw_loops.

gdb/doc/ChangeLog:
2020-07-09  Anton Kolesov  <[hidden email]>

        * gdb.texinfo (Synopsys ARC): Document LP_START, LP_END and BTA.
---
 gdb/arc-tdep.c      | 39 +++++++++++++++++++++++++++++++++++----
 gdb/arc-tdep.h      |  4 ++++
 gdb/doc/gdb.texinfo |  3 ++-
 3 files changed, 41 insertions(+), 5 deletions(-)

diff --git a/gdb/arc-tdep.c b/gdb/arc-tdep.c
index 6979c2ad7d0..ad54a3a72d1 100644
--- a/gdb/arc-tdep.c
+++ b/gdb/arc-tdep.c
@@ -2007,6 +2007,35 @@ arc_check_tdesc_feature (struct tdesc_arch_data *tdesc_data,
   return true;
 }
 
+/* Check for the existance of "lp_start" and "lp_end" in target description.
+   If both are present, assume there is hardware loop support in the target.
+   This can be improved by looking into "lpc_size" field of "isa_config"
+   auxiliary register.  */
+
+static bool
+arc_check_for_hw_loops (const struct target_desc *tdesc,
+ struct tdesc_arch_data *data)
+{
+  const auto feature_aux = tdesc_find_feature (tdesc, ARC_AUX_FEATURE_NAME);
+  const auto *aux_regset = determine_aux_reg_feature_set ();
+
+  if (feature_aux == nullptr || aux_regset == nullptr)
+    return false;
+
+  bool hw_loop_p = false;
+  const auto lp_start_name =
+    aux_regset->registers[ARC_LP_START_REGNUM - ARC_FIRST_AUX_REGNUM].names[0];
+  const auto lp_end_name =
+    aux_regset->registers[ARC_LP_END_REGNUM - ARC_FIRST_AUX_REGNUM].names[0];
+
+  hw_loop_p = tdesc_numbered_register (feature_aux, data,
+       ARC_LP_START_REGNUM, lp_start_name);
+  hw_loop_p &= tdesc_numbered_register (feature_aux, data,
+       ARC_LP_END_REGNUM, lp_end_name);
+
+  return hw_loop_p;
+}
+
 /* Initialize target description for the ARC.
 
    Returns true if input TDESC was valid and in this case it will assign TDESC
@@ -2126,13 +2155,15 @@ arc_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
     debug_printf ("arc: Architecture initialization.\n");
 
   if (!arc_tdesc_init (info, &tdesc, &tdesc_data))
-    return NULL;
+    return nullptr;
 
   /* Allocate the ARC-private target-dependent information structure, and the
      GDB target-independent information structure.  */
-  struct gdbarch_tdep *tdep = XCNEW (struct gdbarch_tdep);
+  gdb::unique_xmalloc_ptr<struct gdbarch_tdep> tdep
+    (XCNEW (struct gdbarch_tdep));
   tdep->jb_pc = -1; /* No longjmp support by default.  */
-  struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep);
+  tdep->has_hw_loops = arc_check_for_hw_loops (tdesc, tdesc_data);
+  struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep.release ());
 
   /* Data types.  */
   set_gdbarch_short_bit (gdbarch, 16);
@@ -2213,7 +2244,7 @@ arc_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
      It can override functions set earlier.  */
   gdbarch_init_osabi (info, gdbarch);
 
-  if (tdep->jb_pc >= 0)
+  if (gdbarch_tdep (gdbarch)->jb_pc >= 0)
     set_gdbarch_get_longjmp_target (gdbarch, arc_get_longjmp_target);
 
   /* Disassembler options.  Enforce CPU if it was specified in XML target
diff --git a/gdb/arc-tdep.h b/gdb/arc-tdep.h
index f4ce6a9a50a..3c99f4aacb8 100644
--- a/gdb/arc-tdep.h
+++ b/gdb/arc-tdep.h
@@ -23,6 +23,7 @@
 
 /* Need disassemble_info.  */
 #include "dis-asm.h"
+#include "gdbarch.h"
 #include "arch/arc.h"
 
 /* To simplify GDB code this enum assumes that internal regnums should be same
@@ -110,6 +111,9 @@ struct gdbarch_tdep
   /* Offset to PC value in jump buffer.  If this is negative, longjmp
      support will be disabled.  */
   int jb_pc;
+
+  /* Whether target has hardware (aka zero-delay) loops.  */
+  bool has_hw_loops;
 };
 
 /* Utility functions used by other ARC-specific modules.  */
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index d90c33d67ae..5c6c6b39fcf 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -45118,7 +45118,8 @@ difference with @samp{org.gnu.gdb.arc.core.v2} feature is in the names of
 ARC v2, but @samp{ilink2} is optional on ARCompact.
 
 The @samp{org.gnu.gdb.arc.aux-minimal} feature is required for all ARC
-targets.  It should contain registers @samp{pc} and @samp{status32}.
+targets.  It should contain registers @samp{pc} and @samp{status32}.  It may
+contain registers @samp{lp_start}, @samp{lp_end} and @samp{bta}.
 
 @node ARM Features
 @subsection ARM Features
--
2.27.0

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[PATCH v3 3/3] arc: Add GNU/Linux support for ARC

Sourceware - gdb-patches mailing list
In reply to this post by Sourceware - gdb-patches mailing list
From: Anton Kolesov <[hidden email]>

ARC Linux targets differences from baremetal:

- No support for hardware single instruction stepping.
- Different access rules to registers.
- Use of another instruction for breakpoints.

v2: Changes after Tom's remarks [1]
 arc-linux-tdep.c
  - Use true/false instead of TRUE/FALSE.
  - arc_linux_sw_breakpoint_from_kind (): Break long lines into two.
  - arc_linux_sw_breakpoint_from_kind (): Remove starting blank line.
  - Use explicit number evaluation, e.g: if (a & b) -> if ((a & b) != 0)
 arc-tdep.c
  - Use explicit number evaluation, e.g: if (a & b) -> if ((a & b) != 0)
 gdb/configure.tgt
  - arc*-*-linux*): Remove "build_gdbserver=yes".

v3: Changes after Simon's remarks [2]
  arc-linux-tdep.c
  - Use "return trap_size" instead of cryptic "return 2".
  - Removed unnecessary curly braces.
  - Removed "void" from "_initialize_arc_linux_tdep (void)".

[1] Tom's remarks
https://sourceware.org/pipermail/gdb-patches/2020-April/167887.html

[2] Simon's remarks
https://sourceware.org/pipermail/gdb-patches/2020-May/168513.html

2020-04-28  Anton Kolesov  <[hidden email]>

        * configure.tgt: ARC support for GNU/Linux.
        * Makefile.in (ALL_TARGET_OBJS): Likewise.
        * arc-linux-tdep.c: New file.
        * arc-tdep.h (ARC_STATUS32_L_MASK, ARC_STATUS32_DE_MASK): Declare.
        * arc-tdep.c (arc_write_pc): Use it.
---
 gdb/Makefile.in      |   1 +
 gdb/arc-linux-tdep.c | 283 +++++++++++++++++++++++++++++++++++++++++++
 gdb/arc-tdep.c       |   3 +-
 gdb/arc-tdep.h       |   5 +
 gdb/configure.tgt    |   5 +
 5 files changed, 295 insertions(+), 2 deletions(-)
 create mode 100644 gdb/arc-linux-tdep.c

diff --git a/gdb/Makefile.in b/gdb/Makefile.in
index 32d0eee7c63..9348652576f 100644
--- a/gdb/Makefile.in
+++ b/gdb/Makefile.in
@@ -695,6 +695,7 @@ ALL_64_TARGET_OBS = \
 # All other target-dependent objects files (used with --enable-targets=all).
 ALL_TARGET_OBS = \
  aarch32-tdep.o \
+ arc-linux-tdep.o \
  arc-tdep.o \
  arch/aarch32.o \
  arch/arc.o \
diff --git a/gdb/arc-linux-tdep.c b/gdb/arc-linux-tdep.c
new file mode 100644
index 00000000000..5d1c9a74833
--- /dev/null
+++ b/gdb/arc-linux-tdep.c
@@ -0,0 +1,283 @@
+/* Target dependent code for GNU/Linux ARC.
+
+   Copyright 2020 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+/* GDB header files.  */
+#include "defs.h"
+#include "linux-tdep.h"
+#include "objfiles.h"
+#include "opcode/arc.h"
+#include "osabi.h"
+#include "solib-svr4.h"
+
+/* ARC header files.  */
+#include "opcodes/arc-dis.h"
+#include "arc-tdep.h"
+
+/* Implement the "cannot_fetch_register" gdbarch method.  */
+
+static int
+arc_linux_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
+{
+  /* Assume that register is readable if it is unknown.  */
+  switch (regnum)
+    {
+    case ARC_ILINK_REGNUM:
+    case ARC_RESERVED_REGNUM:
+    case ARC_LIMM_REGNUM:
+      return true;
+    case ARC_R30_REGNUM:
+    case ARC_R58_REGNUM:
+    case ARC_R59_REGNUM:
+      return !arc_mach_is_arcv2 (gdbarch);
+    }
+  if (regnum > ARC_BLINK_REGNUM && regnum < ARC_LP_COUNT_REGNUM)
+    return true;
+  return false;
+}
+
+/* Implement the "cannot_store_register" gdbarch method.  */
+
+static int
+arc_linux_cannot_store_register (struct gdbarch *gdbarch, int regnum)
+{
+  /* Assume that register is writable if it is unknown.  */
+  switch (regnum)
+    {
+    case ARC_ILINK_REGNUM:
+    case ARC_RESERVED_REGNUM:
+    case ARC_LIMM_REGNUM:
+    case ARC_PCL_REGNUM:
+      return true;
+    case ARC_R30_REGNUM:
+    case ARC_R58_REGNUM:
+    case ARC_R59_REGNUM:
+      return !arc_mach_is_arcv2 (gdbarch);
+    }
+  if (regnum > ARC_BLINK_REGNUM && regnum < ARC_LP_COUNT_REGNUM)
+    return true;
+  return false;
+}
+
+/* For ARC Linux, breakpoint uses the 16-bit TRAP_S 1 instruction, which
+   is 0x3e78 (little endian) or 0x783e (big endian).  */
+
+static const gdb_byte arc_linux_trap_s_be[] = { 0x78, 0x3e };
+static const gdb_byte arc_linux_trap_s_le[] = { 0x3e, 0x78 };
+static const int trap_size = 2;   /* Number of bytes to insert "trap".  */
+
+/* Implement the "breakpoint_kind_from_pc" gdbarch method.  */
+
+static int
+arc_linux_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
+{
+  return trap_size;
+}
+
+/* Implement the "sw_breakpoint_from_kind" gdbarch method.  */
+
+static const gdb_byte *
+arc_linux_sw_breakpoint_from_kind (struct gdbarch *gdbarch,
+   int kind, int *size)
+{
+  *size = kind;
+  return ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+  ? arc_linux_trap_s_be
+  : arc_linux_trap_s_le);
+}
+
+/* Implement the "software_single_step" gdbarch method.  */
+
+static std::vector<CORE_ADDR>
+arc_linux_software_single_step (struct regcache *regcache)
+{
+  struct gdbarch *gdbarch = regcache->arch ();
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+  struct disassemble_info di = arc_disassemble_info (gdbarch);
+
+  /* Read current instruction.  */
+  struct arc_instruction curr_insn;
+  arc_insn_decode (regcache_read_pc (regcache), &di, arc_delayed_print_insn,
+   &curr_insn);
+  CORE_ADDR next_pc = arc_insn_get_linear_next_pc (curr_insn);
+
+  std::vector<CORE_ADDR> next_pcs;
+
+  /* For instructions with delay slots, the fall thru is not the
+     instruction immediately after the current instruction, but the one
+     after that.  */
+  if (curr_insn.has_delay_slot)
+    {
+      struct arc_instruction next_insn;
+      arc_insn_decode (next_pc, &di, arc_delayed_print_insn, &next_insn);
+      next_pcs.push_back (arc_insn_get_linear_next_pc (next_insn));
+    }
+  else
+    next_pcs.push_back (next_pc);
+
+  ULONGEST status32;
+  regcache_cooked_read_unsigned (regcache, gdbarch_ps_regnum (gdbarch),
+ &status32);
+
+  if (curr_insn.is_control_flow)
+    {
+      CORE_ADDR branch_pc = arc_insn_get_branch_target (curr_insn);
+      if (branch_pc != next_pc)
+ next_pcs.push_back (branch_pc);
+    }
+  /* Is current instruction the last in a loop body?  */
+  else if (tdep->has_hw_loops)
+    {
+      /* If STATUS32.L is 1, then ZD-loops are disabled.  */
+      if ((status32 & ARC_STATUS32_L_MASK) == 0)
+ {
+  ULONGEST lp_end, lp_start, lp_count;
+  regcache_cooked_read_unsigned (regcache, ARC_LP_START_REGNUM,
+ &lp_start);
+  regcache_cooked_read_unsigned (regcache, ARC_LP_END_REGNUM, &lp_end);
+  regcache_cooked_read_unsigned (regcache, ARC_LP_COUNT_REGNUM,
+ &lp_count);
+
+  if (arc_debug)
+    {
+      debug_printf ("arc-linux: lp_start = %s, lp_end = %s, "
+    "lp_count = %s, next_pc = %s\n",
+    paddress (gdbarch, lp_start),
+    paddress (gdbarch, lp_end),
+    pulongest (lp_count),
+    paddress (gdbarch, next_pc));
+    }
+
+  if (next_pc == lp_end && lp_count > 1)
+    {
+      /* The instruction is in effect a jump back to the start of
+ the loop.  */
+      next_pcs.push_back (lp_start);
+    }
+
+ }
+    }
+
+  /* Is this a delay slot?  Then next PC is in BTA register.  */
+  if ((status32 & ARC_STATUS32_DE_MASK) != 0)
+    {
+      ULONGEST bta;
+      regcache_cooked_read_unsigned (regcache, ARC_BTA_REGNUM, &bta);
+      next_pcs.push_back (bta);
+    }
+
+  return next_pcs;
+}
+
+/* Implement the "skip_solib_resolver" gdbarch method.
+
+   See glibc_skip_solib_resolver for details.  */
+
+static CORE_ADDR
+arc_linux_skip_solib_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
+{
+  /* For uClibc 0.9.26+.
+
+     An unresolved PLT entry points to "__dl_linux_resolve", which calls
+     "_dl_linux_resolver" to do the resolving and then eventually jumps to
+     the function.
+
+     So we look for the symbol `_dl_linux_resolver', and if we are there,
+     gdb sets a breakpoint at the return address, and continues.  */
+  struct bound_minimal_symbol resolver =
+    lookup_minimal_symbol ("_dl_linux_resolver", NULL, NULL);
+
+  if (arc_debug)
+    {
+      if (resolver.minsym)
+ {
+  CORE_ADDR res_addr = BMSYMBOL_VALUE_ADDRESS (resolver);
+  debug_printf ("arc-linux: skip_solib_resolver (): "
+ "pc = %s, resolver at %s\n",
+ print_core_address (gdbarch, pc),
+ print_core_address (gdbarch, res_addr));
+ }
+      else
+ {
+  debug_printf ("arc-linux: skip_solib_resolver (): "
+ "pc = %s, no resolver found\n",
+ print_core_address (gdbarch, pc));
+ }
+    }
+
+  if (resolver.minsym && BMSYMBOL_VALUE_ADDRESS (resolver) == pc)
+    {
+      /* Find the return address.  */
+      return frame_unwind_caller_pc (get_current_frame ());
+    }
+  else
+    {
+      /* No breakpoint required.  */
+      return 0;
+    }
+}
+
+/* Initialization specific to Linux environment.  */
+
+static void
+arc_linux_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
+{
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+  if (arc_debug)
+    debug_printf ("arc-linux: GNU/Linux OS/ABI initialization.\n");
+
+  /* If we are using Linux, we have in uClibc
+     (libc/sysdeps/linux/arc/bits/setjmp.h):
+
+     typedef int __jmp_buf[13+1+1+1];    //r13-r25, fp, sp, blink
+
+     Where "blink" is a stored PC of a caller function.
+   */
+  tdep->jb_pc = 15;
+
+  linux_init_abi (info, gdbarch);
+
+  /* Set up target dependent GDB architecture entries.  */
+  set_gdbarch_cannot_fetch_register (gdbarch, arc_linux_cannot_fetch_register);
+  set_gdbarch_cannot_store_register (gdbarch, arc_linux_cannot_store_register);
+  set_gdbarch_breakpoint_kind_from_pc (gdbarch,
+       arc_linux_breakpoint_kind_from_pc);
+  set_gdbarch_sw_breakpoint_from_kind (gdbarch,
+       arc_linux_sw_breakpoint_from_kind);
+  set_gdbarch_fetch_tls_load_module_address (gdbarch,
+     svr4_fetch_objfile_link_map);
+  set_gdbarch_software_single_step (gdbarch, arc_linux_software_single_step);
+  set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
+  set_gdbarch_skip_solib_resolver (gdbarch, arc_linux_skip_solib_resolver);
+
+  /* GNU/Linux uses SVR4-style shared libraries, with 32-bit ints, longs
+     and pointers (ILP32).  */
+  set_solib_svr4_fetch_link_map_offsets (gdbarch,
+ svr4_ilp32_fetch_link_map_offsets);
+}
+
+/* Suppress warning from -Wmissing-prototypes.  */
+extern initialize_file_ftype _initialize_arc_linux_tdep;
+
+void
+_initialize_arc_linux_tdep ()
+{
+  gdbarch_register_osabi (bfd_arch_arc, 0, GDB_OSABI_LINUX,
+  arc_linux_init_osabi);
+}
diff --git a/gdb/arc-tdep.c b/gdb/arc-tdep.c
index ad54a3a72d1..1712eff5a63 100644
--- a/gdb/arc-tdep.c
+++ b/gdb/arc-tdep.c
@@ -602,8 +602,7 @@ arc_write_pc (struct regcache *regcache, CORE_ADDR new_pc)
   regcache_cooked_read_unsigned (regcache, gdbarch_ps_regnum (gdbarch),
  &status32);
 
-  /* Mask for DE bit is 0x40.  */
-  if (status32 & 0x40)
+  if ((status32 & ARC_STATUS32_DE_MASK) != 0)
     {
       if (arc_debug)
  {
diff --git a/gdb/arc-tdep.h b/gdb/arc-tdep.h
index 3c99f4aacb8..319450fa334 100644
--- a/gdb/arc-tdep.h
+++ b/gdb/arc-tdep.h
@@ -100,6 +100,11 @@ enum arc_regnum
    Longer registers are represented as pairs of 32-bit registers.  */
 #define ARC_REGISTER_SIZE  4
 
+/* STATUS32 register: hardware loops disabled bit.  */
+#define ARC_STATUS32_L_MASK (1 << 12)
+/* STATUS32 register: current instruction is a delay slot.  */
+#define ARC_STATUS32_DE_MASK (1 << 6)
+
 #define arc_print(fmt, args...) fprintf_unfiltered (gdb_stdlog, fmt, ##args)
 
 extern int arc_debug;
diff --git a/gdb/configure.tgt b/gdb/configure.tgt
index b3f31af763c..1a5c3a351fd 100644
--- a/gdb/configure.tgt
+++ b/gdb/configure.tgt
@@ -157,6 +157,11 @@ arc*-*-elf32)
  gdb_target_obs="arc-newlib-tdep.o"
  ;;
 
+arc*-*-linux*)
+ # Target: ARC machine running Linux
+ gdb_target_obs="arc-linux-tdep.o linux-tdep.o solib-svr4.o"
+ ;;
+
 arm*-wince-pe | arm*-*-mingw32ce*)
  # Target: ARM based machine running Windows CE (win32)
  gdb_target_obs="arm-wince-tdep.o windows-tdep.o"
--
2.27.0

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Re: [PATCH v2 2/4] arc: Recognize registers available on Linux targets

Simon Marchi-4
In reply to this post by Sourceware - gdb-patches mailing list
On 2020-06-17 11:46 a.m., Shahab Vahedi via Gdb-patches wrote:
> *_register_names are static arrays. That should be why gdb_STATIC_assert
> is used as well. I believe this place in the code is OK for making that
> check.

I meant, could those gdb_static_assert "calls" be moved right next to where the
arrays are defined?

Simon
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Re: [PATCH v2 2/4] arc: Recognize registers available on Linux targets

Sourceware - gdb-patches mailing list
On 7/13/20 5:48 PM, Simon Marchi wrote:
> I meant, could those gdb_static_assert "calls" be moved right next to where the
> arrays are defined?

That was my bad, sorry. I _assumed_ it was not possible to use "gdb_static_assert ()"
next to a global variable, but it does work like a charm if the input is a
constant-expression.

Nevertheless, with the new changes in v3 [1], this gdb_static_assert () is irrelative.


[1] patch v3
https://sourceware.org/pipermail/gdb-patches/2020-July/170394.html

--
Shahab
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Re: [PATCH v3 1/3] arc: Add ARCv2 XML target along with refactoring

Simon Marchi-4
In reply to this post by Sourceware - gdb-patches mailing list
Hi Shahab,

Again, I'm a bit clueless for the ARC-specific stuff, I'll assume it's all right.

I just put a few minor comments, but it looks like the feature-based target description
thing is well done.

> @@ -91,63 +93,201 @@ int arc_debug;
>  
>  static struct cmd_list_element *maintenance_print_arc_list = NULL;
>  
> -/* XML target description features.  */
> -
> -static const char core_v2_feature_name[] = "org.gnu.gdb.arc.core.v2";
> -static const char
> -  core_reduced_v2_feature_name[] = "org.gnu.gdb.arc.core-reduced.v2";
> -static const char
> -  core_arcompact_feature_name[] = "org.gnu.gdb.arc.core.arcompact";
> -static const char aux_minimal_feature_name[] = "org.gnu.gdb.arc.aux-minimal";
> -
> -/* XML target description known registers.  */
> -
> -static const char *const core_v2_register_names[] = {
> -  "r0", "r1", "r2", "r3",
> -  "r4", "r5", "r6", "r7",
> -  "r8", "r9", "r10", "r11",
> -  "r12", "r13", "r14", "r15",
> -  "r16", "r17", "r18", "r19",
> -  "r20", "r21", "r22", "r23",
> -  "r24", "r25", "gp", "fp",
> -  "sp", "ilink", "r30", "blink",
> -  "r32", "r33", "r34", "r35",
> -  "r36", "r37", "r38", "r39",
> -  "r40", "r41", "r42", "r43",
> -  "r44", "r45", "r46", "r47",
> -  "r48", "r49", "r50", "r51",
> -  "r52", "r53", "r54", "r55",
> -  "r56", "r57", "accl", "acch",
> -  "lp_count", "reserved", "limm", "pcl",
> +/* A set of registers that we expect to find in a tdesc_feature.  These
> +   are used in ARC_TDESC_INIT when processing the target description.  */
> +
> +struct arc_register_feature
> +{
> +  /* Information for a single register.  */
> +  struct register_info
> +  {
> +    /* The GDB register number for this register.  */
> +    int regnum;
> +
> +    /* List of names for this register.  The first name in this list is the
> +       preferred name, the name GDB will use when describing this register.  */
> +    std::vector<const char *> names;
> +
> +    /* When true, this register must be present in this feature set.  */
> +    bool required_p;
> +  };
> +
> +  /* The name for this feature.  This is the name used to find this feature
> +     within the target description.  */
> +  const char *name;
> +
> +  /* List of all the registers that we expect to encounter in this register
> +     set.  */
> +  std::vector<struct register_info> registers;
>  };
>  
> -static const char *const aux_minimal_register_names[] = {
> -  "pc", "status32",
> +static const char *ARC_CORE_FEATURE_NAME="org.gnu.gdb.arc.core";
> +static const char *ARC_AUX_FEATURE_NAME="org.gnu.gdb.arc.aux";

Spaces around `=`.

> @@ -1717,192 +1857,227 @@ static const struct frame_base arc_normal_base = {
>    arc_frame_base_address
>  };
>  
> -/* Initialize target description for the ARC.
> -
> -   Returns TRUE if input tdesc was valid and in this case it will assign TDESC
> -   and TDESC_DATA output parameters.  */
> -
> -static bool
> -arc_tdesc_init (struct gdbarch_info info, const struct target_desc **tdesc,
> - struct tdesc_arch_data **tdesc_data)
> +static inline enum
> +arc_isa mach_type_to_arc_isa (const unsigned long mach)

`arc_isa` goes on previous line.  I'd drop the `inline`, the compiler will take
care of that if needed.

>  {
> -  if (arc_debug)
> -    debug_printf ("arc: Target description initialization.\n");
> -
> -  const struct target_desc *tdesc_loc = info.target_desc;
> -
> -  /* Depending on whether this is ARCompact or ARCv2 we will assign
> -     different default registers sets (which will differ in exactly two core
> -     registers).  GDB will also refuse to accept register feature from invalid
> -     ISA - v2 features can be used only with v2 ARChitecture.  We read
> -     bfd_arch_info, which looks like to be a safe bet here, as it looks like it
> -     is always initialized even when we don't pass any elf file to GDB at all
> -     (it uses default arch in this case).  Also GDB will call this function
> -     multiple times, and if XML target description file contains architecture
> -     specifications, then GDB will set this architecture to info.bfd_arch_info,
> -     overriding value from ELF file if they are different.  That means that,
> -     where matters, this value is always our best guess on what CPU we are
> -     debugging.  It has been noted that architecture specified in tdesc file
> -     has higher precedence over ELF and even "set architecture" - that is,
> -     using "set architecture" command will have no effect when tdesc has "arch"
> -     tag.  */
> -  /* Cannot use arc_mach_is_arcv2 (), because gdbarch is not created yet.  */
> -  const int is_arcv2 = (info.bfd_arch_info->mach == bfd_mach_arc_arcv2);
> -  bool is_reduced_rf;
> -  const char *const *core_regs;
> -  const char *core_feature_name;
> +  switch (mach)
> +    {
> +    case bfd_mach_arc_arc600:
> +    case bfd_mach_arc_arc601:
> +    case bfd_mach_arc_arc700:
> +      return ARC_ISA_ARCV1;
> +      break;
> +    case bfd_mach_arc_arcv2:
> +      return ARC_ISA_ARCV2;
> +      break;
> +    default:
> + internal_error (__FILE__, __LINE__,
> + _("unknown machine id %lu"), mach);
> +    }
> +  return ARC_ISA_NONE;
> +}
>  
> -  /* If target doesn't provide a description, use the default ones.  */
> -  if (!tdesc_has_registers (tdesc_loc))
> +/* Common construction code for ARC_GDBARCH_FEATURES struct.  If there
> +   is no ABFD, then a FEATURE with default values is returned.  */
> +void arc_gdbarch_features_init (arc_gdbarch_features &features,
> + const bfd *abfd, const unsigned long mach)

Since this function is only used in this file, can it be static?

Could this function return a arc_gdbarch_features by value instead?  Then,
you could add a constructor to arc_gdbarch_features.  You wouldn't need
the "A 0 indicates an uninitialised value" comment on reg_size, as the
object could never be in an uninitialised state.

> +{
> +  /* Try to guess the features parameters by looking at the binary to be
> +     executed.  If the user is providing a binary that does not match the
> +     target, then tough luck.  This is the last effort to makes sense of
> +     what's going on.  */
> +  if (abfd != NULL && bfd_get_flavour (abfd) == bfd_target_elf_flavour)
>      {
> -      if (is_arcv2)
> - tdesc_loc = arc_read_description (ARC_SYS_TYPE_ARCV2);
> +      unsigned char eclass = elf_elfheader (abfd)->e_ident[EI_CLASS];
> +
> +      if (eclass == ELFCLASS32)
> + features.reg_size = 4;
> +      else if (eclass == ELFCLASS64)
> + features.reg_size = 8;
>        else
> - tdesc_loc = arc_read_description (ARC_SYS_TYPE_ARCOMPACT);
> + internal_error (__FILE__, __LINE__,
> + _("unknown ELF header class %d"), eclass);
>      }
> -  else
> +
> +  /* MACH from a bfd_arch_info struct is used here.  It should be a safe
> +     bet, as it looks like the struct is always initialized even when we
> +     don't pass any elf file to GDB at all (it uses default arch in that
> +     case).  */
> +  features.isa = mach_type_to_arc_isa (mach);
> +
> +  /* Put the most frequent values for the undetermined parameters.  */
> +  if (features.reg_size == 0)
> +    features.reg_size = 4;

Can you add an empty line here to separate the two `if`s?

> +  if (features.isa == ARC_ISA_NONE)
> +    features.reg_size = ARC_ISA_ARCV2;

Did you mean to assign features.isa on the last line?

> diff --git a/gdb/arch/arc.c b/gdb/arch/arc.c
> index 9552b4aff97..84bc8df7788 100644
> --- a/gdb/arch/arc.c
> +++ b/gdb/arch/arc.c
> @@ -17,42 +17,104 @@
>  
>  
>  #include "gdbsupport/common-defs.h"
> -#include <stdlib.h>
> -
>  #include "arc.h"
> +#include <stdlib.h>
> +#include <unordered_map>
> +#include <sstream>
>  
>  /* Target description features.  */
> -#include "features/arc/core-v2.c"
> -#include "features/arc/aux-v2.c"
> -#include "features/arc/core-arcompact.c"
> -#include "features/arc/aux-arcompact.c"
> +#include "features/arc/v1-core.c"
> +#include "features/arc/v1-aux.c"
> +#include "features/arc/v2-core.c"
> +#include "features/arc/v2-aux.c"
>  
> -/* See arc.h.  */
> +#ifndef GDBSERVER
> +#define STATIC_IN_GDB static
> +#else
> +#define STATIC_IN_GDB
> +#endif
>  
> -target_desc *
> -arc_create_target_description (arc_sys_type sys_type)
> +STATIC_IN_GDB target_desc *
> +arc_create_target_description (const struct arc_gdbarch_features &features)
>  {
> +  /* Create a new target description.  */
>    target_desc *tdesc = allocate_target_description ();
>  
> -  long regnum = 0;
> -
>  #ifndef IN_PROCESS_AGENT
> -  if (sys_type == ARC_SYS_TYPE_ARCV2)
> -    set_tdesc_architecture (tdesc, "arc:ARCv2");
> -  else
> -    set_tdesc_architecture (tdesc, "arc:ARC700");
> -#endif
> +  std::string arch_name = "arc";
>  
> -  if (sys_type == ARC_SYS_TYPE_ARCV2)
> +  /* Architecture names here must match the ones in
> +     ARCH_INFO_STRUCT in bfd/cpu-arc.c.  */
> +  if (features.isa == ARC_ISA_ARCV1 && features.reg_size == 4)
> +      arch_name.append (":ARC700");
> +  else if (features.isa == ARC_ISA_ARCV2 && features.reg_size == 4)
> +      arch_name.append (":ARCv2");

It's really a nit, but it would be more efficient to just use two constant
strings:

const char *arch_name;

if (a)
  arch_name = "arc:ARC700";
else if (b)
  arch_name = "arc:ARCv2";
else
  assert

> +  else
>      {
> -      regnum = create_feature_arc_core_v2 (tdesc, regnum);
> -      regnum = create_feature_arc_aux_v2 (tdesc, regnum);
> +      std::ostringstream msg;
> +      msg << "Cannot determine architecture: ISA=" << features.isa
> +  << "; bitness=" << 8*features.reg_size;

I'd suggest using string_printf instead, throughout the patch where you use
ostringstream.

> +      gdb_assert_not_reached (msg.str ().c_str ());
>      }
> -  else
> +
> +  set_tdesc_architecture (tdesc, arch_name.c_str ());
> +#endif
> +
> +  long regnum = 0;
> +
> +  switch (features.isa)
>      {
> -      regnum = create_feature_arc_core_arcompact (tdesc, regnum);
> -      regnum = create_feature_arc_aux_arcompact (tdesc, regnum);
> +    case ARC_ISA_ARCV1:
> +  regnum = create_feature_arc_v1_core (tdesc, regnum);
> +  regnum = create_feature_arc_v1_aux (tdesc, regnum);
> +  break;
> +    case ARC_ISA_ARCV2:
> +  regnum = create_feature_arc_v2_core (tdesc, regnum);
> +  regnum = create_feature_arc_v2_aux (tdesc, regnum);
> +  break;
> +    default:
> +  std::ostringstream msg;
> +  msg << "Cannot choose target description XML: " << features.isa;
> +  gdb_assert_not_reached (msg.str ().c_str ());
>      }
>  
>    return tdesc;
>  }
> +
> +#ifndef GDBSERVER
> +
> +/* Wrapper used by std::unordered_map to generate hash for features set.  */
> +struct arc_gdbarch_features_hasher
> +{
> +  std::size_t
> +  operator() (const arc_gdbarch_features &features) const noexcept
> +  {
> +    return features.hash ();
> +  }
> +};
> +
> +/* Cache of previously created target descriptions, indexed by the hash
> +   of the features set used to create them.  */
> +static std::unordered_map<arc_gdbarch_features,
> +  const target_desc *,
> +  arc_gdbarch_features_hasher> arc_tdesc_cache;

Should this map hold unique_ptr of target_desc?  I understand that they
are never really deallocated anyway, but just to do it right and avoid
adding more leaks to the final AddressSanitizer report shown when you exit
GDB (and you have it build with AddressSanitizer)?

> +
> +/* See arch/arc.h.  */
> +
> +const target_desc *
> +arc_lookup_target_description (const struct arc_gdbarch_features &features)
> +{
> +  /* Lookup in the cache first.  */
> +  const auto it = arc_tdesc_cache.find (features);
> +  if (it != arc_tdesc_cache.end ())
> +    return it->second;
> +
> +  target_desc *tdesc = arc_create_target_description (features);
> +
> +  /* Add the newly created target description to the repertoire.  */
> +  arc_tdesc_cache.emplace (features, tdesc);
> +
> +  return tdesc;
> +}
> +
> +#endif /* !GDBSERVER */
> diff --git a/gdb/arch/arc.h b/gdb/arch/arc.h
> index fd806ae7d34..4f400c93a7d 100644
> --- a/gdb/arch/arc.h
> +++ b/gdb/arch/arc.h
> @@ -20,29 +20,65 @@
>  
>  #include "gdbsupport/tdesc.h"
>  
> -/* Supported ARC system hardware types.  */
> -enum arc_sys_type
> +/* Supported ARC ISAs.  */
> +enum arc_isa
>  {
> -  ARC_SYS_TYPE_ARCOMPACT = 0,  /* ARC600 or ARC700 */
> -  ARC_SYS_TYPE_ARCV2,  /* ARC EM or ARC HS */
> -  ARC_SYS_TYPE_NUM
> +  ARC_ISA_NONE = 0,
> +  ARC_ISA_ARCV1,    /* a.k.a. ARCompact (ARC600, ARC700)  */
> +  ARC_ISA_ARCV2    /* such as ARC EM and ARC HS  */
>  };
>  
> -static inline const char *
> -arc_sys_type_to_str (const arc_sys_type type)
> +struct arc_gdbarch_features
>  {
> -  switch (type)
> -    {
> -    case ARC_SYS_TYPE_ARCOMPACT:
> -      return "ARC_SYS_TYPE_ARCOMPACT";
> -    case ARC_SYS_TYPE_ARCV2:
> -      return "ARC_SYS_TYPE_ARCV2";
> -    default:
> -      return "Invalid";
> -    }
> -}
> -
> -/* Create target description for the specified system type.  */
> -target_desc *arc_create_target_description (arc_sys_type sys_type);
> +  /* Register size in bytes.  Possible values are 4, and 8.  A 0 indicates
> +     an uninitialised value.  */
> +  int reg_size = 0;
> +
> +  /* See ARC_ISA enum.  */
> +  int isa = ARC_ISA_NONE;
> +
> +  /* Equality operator.  */
> +  bool operator== (const struct arc_gdbarch_features &rhs) const
> +  {
> +    return (reg_size == rhs.reg_size && isa == rhs.isa);
> +  }
> +
> +  /* Inequality operator.  */
> +  bool operator!= (const struct arc_gdbarch_features &rhs) const
> +  {
> +    return !(*this == rhs);
> +  }
> +
> +  /* Used by std::unordered_map to hash the feature sets.  The hash is
> +     calculated in the manner below:
> +     REG_SIZE |  ISA
> +      5-bits  | 4-bits  */
> +
> +  std::size_t hash () const noexcept
> +  {
> +    std::size_t val = ((reg_size & 0x1f) << 8 | (isa & 0xf) << 0);
> +    return val;

I don't know much about hashing, but I don't think makes for a very good hash
function.  It outputs similar hashes for similar inputs, and does not use the
range of possible hash values uniformly.

It would be more appropriate and typical to use std::hash on each member and
then combine the hashes.  Doing a quick search I found that Boost offers
something exactly for that called hash_combine:

https://www.boost.org/doc/libs/1_55_0/doc/html/hash/combine.html

Unfortunately, there is nothing similar in the standard library.  But

A bit off-topic: intuitively, I would have thought that it would have been
sufficient to just add the hash values together.  Anyone knows why this
wouldn't be a good idea?

Simon
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Re: [PATCH v3 2/3] arc: Add hardware loop detection

Simon Marchi-4
In reply to this post by Sourceware - gdb-patches mailing list
On 2020-07-13 11:45 a.m., Shahab Vahedi wrote:

> From: Shahab Vahedi <[hidden email]>
>
> For ARC there are registers that are not part of a required set in XML
> target descriptions by default, but are almost always present on ARC
> targets and are universally exposed by the ptrace interface.  Hardware
> loop registers being one of them.
>
> LP_START and LP_END auxiliary registers are hardware loop start and end.
> Formally, they are optional, but it is hard to find an ARC configuration
> that doesn't have them.  They are always present in processors that can
> run GNU/Linux.  GDB needs to know about those registers to implement
> proper software single stepping, since they affect  what instruction
> will be next.
>
> This commit adds the code to check for the existance of "lp_start" and
> "lp_end" in XML target descriptions. If they exist, then the function
> reports that the target supports hardware loops.

This looks good to me.

Simon

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Re: [PATCH v3 3/3] arc: Add GNU/Linux support for ARC

Simon Marchi-4
In reply to this post by Sourceware - gdb-patches mailing list
LGTM, with two nits below.

> +/* Implement the "skip_solib_resolver" gdbarch method.
> +
> +   See glibc_skip_solib_resolver for details.  */
> +
> +static CORE_ADDR
> +arc_linux_skip_solib_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
> +{
> +  /* For uClibc 0.9.26+.
> +
> +     An unresolved PLT entry points to "__dl_linux_resolve", which calls
> +     "_dl_linux_resolver" to do the resolving and then eventually jumps to
> +     the function.
> +
> +     So we look for the symbol `_dl_linux_resolver', and if we are there,
> +     gdb sets a breakpoint at the return address, and continues.  */
> +  struct bound_minimal_symbol resolver =
> +    lookup_minimal_symbol ("_dl_linux_resolver", NULL, NULL);
> +
> +  if (arc_debug)
> +    {
> +      if (resolver.minsym)

!= nullptr

> + {
> +  CORE_ADDR res_addr = BMSYMBOL_VALUE_ADDRESS (resolver);
> +  debug_printf ("arc-linux: skip_solib_resolver (): "
> + "pc = %s, resolver at %s\n",
> + print_core_address (gdbarch, pc),
> + print_core_address (gdbarch, res_addr));
> + }
> +      else
> + {
> +  debug_printf ("arc-linux: skip_solib_resolver (): "
> + "pc = %s, no resolver found\n",
> + print_core_address (gdbarch, pc));
> + }
> +    }
> +
> +  if (resolver.minsym && BMSYMBOL_VALUE_ADDRESS (resolver) == pc)

!= nullptr

Simon
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Re: [PATCH v3 1/3] arc: Add ARCv2 XML target along with refactoring

Sourceware - gdb-patches mailing list
In reply to this post by Simon Marchi-4
Hi Simon,

Thank you a lot for going through all the changes. I've taken most
of your remarks in. There are a few of them that need answering.
Below, you will find them.

If you think the current state of code is satisfactory, I will go
ahead and merge them. With one note: there might come another
patch on top of this if the output of "AddressSanitizer" shows some
leak. Please see my question for the "AddressSanitizer" below.

On Tue, Jul 14, 2020 at 10:52:12PM -0400, Simon Marchi wrote:
> Hi Shahab,
>
> > +/* Common construction code for ARC_GDBARCH_FEATURES struct.  If there
> > +   is no ABFD, then a FEATURE with default values is returned.  */
> > +void arc_gdbarch_features_init (arc_gdbarch_features &features,
> > + const bfd *abfd, const unsigned long mach)
>
> Since this function is only used in this file, can it be static?

The other patch [1] in this series makes use of this function.

[1] [PATCH v3 3/3] arc: Add GNU/Linux support for ARC
https://sourceware.org/pipermail/gdb-patches/2020-July/170429.html
> Could this function return a arc_gdbarch_features by value instead?  Then,
> you could add a constructor to arc_gdbarch_features.  You wouldn't need
> the "A 0 indicates an uninitialised value" comment on reg_size, as the
> object could never be in an uninitialised state.

Those were my thoughts as well. I tried something like that, but I failed
in the end:

Since the "arc_gdbarch_features" is introduced in "gdb/arch/arc.h", I
tried implementing the constructor in "gdb/arch/arc.c". Because the
constructor had to make use of "struct bfd", "bfd_get_flavour ()",
"elf_header ()", "EFCLASS*", etc. the following headers had to be used in
"gdb/arch/arc.c":

  #include "defs.h"
  #include "arch-utils.h"
  #include "elf-bfd.h"

This would build OK for gdb targets, but when compiling "arc.o" for
gdbserver target, I ended up with something like:

  (paraphrasing)
  Error: defs.h should not be included while building gdbserver.
  (I am not sure if the error was indeed about "defs.h")

And removing/if-def-guarding that header file was opening other cans of
worms. Eventually, I gave up and went for the current approach.

> > +/* Wrapper used by std::unordered_map to generate hash for features set.  */
> > +struct arc_gdbarch_features_hasher
> > +{
> > +  std::size_t
> > +  operator() (const arc_gdbarch_features &features) const noexcept
> > +  {
> > +    return features.hash ();
> > +  }
> > +};
> > +
> > +/* Cache of previously created target descriptions, indexed by the hash
> > +   of the features set used to create them.  */
> > +static std::unordered_map<arc_gdbarch_features,
> > +  const target_desc *,
> > +  arc_gdbarch_features_hasher> arc_tdesc_cache;
>
> Should this map hold unique_ptr of target_desc?  I understand that they
> are never really deallocated anyway, but just to do it right and avoid
> adding more leaks to the final AddressSanitizer report shown when you exit
> GDB (and you have it build with AddressSanitizer)?

No, I haven't built it with AddressSanitizer. Could you point me in the right
direction how I can use it?

> > +  /* Used by std::unordered_map to hash the feature sets.  The hash is
> > +     calculated in the manner below:
> > +     REG_SIZE |  ISA
> > +      5-bits  | 4-bits  */
> > +
> > +  std::size_t hash () const noexcept
> > +  {
> > +    std::size_t val = ((reg_size & 0x1f) << 8 | (isa & 0xf) << 0);
> > +    return val;
>
> I don't know much about hashing, but I don't think makes for a very good hash
> function.  It outputs similar hashes for similar inputs, and does not use the
> range of possible hash values uniformly.

Indeed it does not output hashes uniformly but I believe it is unique. The
meaningful (and future proof) values for "reg_size" are {4, 8, 16} _bytes_.
Hence, the "0x1f" mask should suffice. Having 15 versions for ISA should be
enough as well. Having these conditions in mind, I don't think there is any
collusion while hashing such inputs.
> It would be more appropriate and typical to use std::hash on each member and
> then combine the hashes.  Doing a quick search I found that Boost offers
> something exactly for that called hash_combine:
>
> https://www.boost.org/doc/libs/1_55_0/doc/html/hash/combine.html

Thanks for this. I didn't know about such functionality. As you said
though, we can't use it. Personally, I think it would be an overkill
here. We can get away with a simple "shift" and "or". Please read my
response above for my reasoning.
>
> Unfortunately, there is nothing similar in the standard library.  But
>
> A bit off-topic: intuitively, I would have thought that it would have been
> sufficient to just add the hash values together.  Anyone knows why this
> wouldn't be a good idea?

So far, possible values are:

  reg_size : {4, 8, 16}
  ISA: {1, 2, ... 15}

A simple addition would produce the same result for these legally valid
inputs:

reg_size=8, ISA=2   --->  hash = 10
reg_size=4, ISA=6   --->  hash = 10


Shahab
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Re: [PATCH v3 1/3] arc: Add ARCv2 XML target along with refactoring

Sourceware - gdb-patches mailing list
On Wed, Jul 15, 2020 at 3:35 PM Shahab Vahedi via Gdb-patches
<[hidden email]> wrote:
> No, I haven't built it with AddressSanitizer. Could you point me in the right
> direction how I can use it?

I'm not Simon, but--

To enable asan, just add it to CXXFLAGS, like:
../configure --enable-targets=all CXXFLAGS="-g -fsanitize=address"
CLAGS="-g -fsanitize=address"

Some documentation at https://github.com/google/sanitizers/wiki/AddressSanitizer

I thought someone had added a configure option for it, but for now it
looks like there's only --enable-ubsan

Christian
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Re: [PATCH v3 1/3] arc: Add ARCv2 XML target along with refactoring

Simon Marchi-4
On 2020-07-15 5:23 p.m., Christian Biesinger wrote:

> On Wed, Jul 15, 2020 at 3:35 PM Shahab Vahedi via Gdb-patches
> <[hidden email]> wrote:
>> No, I haven't built it with AddressSanitizer. Could you point me in the right
>> direction how I can use it?
>
> I'm not Simon, but--
>
> To enable asan, just add it to CXXFLAGS, like:
> ../configure --enable-targets=all CXXFLAGS="-g -fsanitize=address"
> CLAGS="-g -fsanitize=address"
>
> Some documentation at https://github.com/google/sanitizers/wiki/AddressSanitizer
>
> I thought someone had added a configure option for it, but for now it
> looks like there's only --enable-ubsan

I had this thought the other day, maybe we should add --enable-asan?  Ideally, that
option would enable ASan in all binutils-gdb subprojects.

Simon
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Re: [PATCH v3 1/3] arc: Add ARCv2 XML target along with refactoring

Simon Marchi-4
In reply to this post by Sourceware - gdb-patches mailing list
On 2020-07-15 4:35 p.m., Shahab Vahedi wrote:

>>> +/* Common construction code for ARC_GDBARCH_FEATURES struct.  If there
>>> +   is no ABFD, then a FEATURE with default values is returned.  */
>>> +void arc_gdbarch_features_init (arc_gdbarch_features &features,
>>> + const bfd *abfd, const unsigned long mach)
>>
>> Since this function is only used in this file, can it be static?
>
> The other patch [1] in this series makes use of this function.
>
> [1] [PATCH v3 3/3] arc: Add GNU/Linux support for ARC
> https://sourceware.org/pipermail/gdb-patches/2020-July/170429.html

When I search for `arc_gdbarch_features_init` in that patch I don't find anything...

>> Could this function return a arc_gdbarch_features by value instead?  Then,
>> you could add a constructor to arc_gdbarch_features.  You wouldn't need
>> the "A 0 indicates an uninitialised value" comment on reg_size, as the
>> object could never be in an uninitialised state.
>
> Those were my thoughts as well. I tried something like that, but I failed
> in the end:
>
> Since the "arc_gdbarch_features" is introduced in "gdb/arch/arc.h", I
> tried implementing the constructor in "gdb/arch/arc.c". Because the
> constructor had to make use of "struct bfd", "bfd_get_flavour ()",
> "elf_header ()", "EFCLASS*", etc. the following headers had to be used in
> "gdb/arch/arc.c":
>
>   #include "defs.h"
>   #include "arch-utils.h"
>   #include "elf-bfd.h"
>
> This would build OK for gdb targets, but when compiling "arc.o" for
> gdbserver target, I ended up with something like:
>
>   (paraphrasing)
>   Error: defs.h should not be included while building gdbserver.
>   (I am not sure if the error was indeed about "defs.h")
>
> And removing/if-def-guarding that header file was opening other cans of
> worms. Eventually, I gave up and went for the current approach.

The constructor of arc_gdbarch_features shouldn't use a `bfd *`, since the code
in arch/ is used by gdbserver too, which doesn't use BFD.  I meant the constructor
should be just:

  arc_gdbarch_features (int reg_size, enum arc_isa isa)
    : reg_size (reg_size), isa (isa)
  {}

The code in GDB constructing an arc_gdbarch_features will use the BFD to determine
these two values, whereas the code in GDBserver will use something else (usually
looking at the current process' properties).

In fact, the constructor is optional, you could just build a arc_gdbarch_features
using aggregate initialization and return it from that function:

  arc_gdbarch_features features {reg_size, isa};

It doesn't really matter.  I just happen to prefer the constructor method, because
that makes it so you can't "forget" a field and it ensures it can never be in an
uninitialized state.

> No, I haven't built it with AddressSanitizer. Could you point me in the right
> direction how I can use it?

You already got the right information from Christian.

>>> +  /* Used by std::unordered_map to hash the feature sets.  The hash is
>>> +     calculated in the manner below:
>>> +     REG_SIZE |  ISA
>>> +      5-bits  | 4-bits  */
>>> +
>>> +  std::size_t hash () const noexcept
>>> +  {
>>> +    std::size_t val = ((reg_size & 0x1f) << 8 | (isa & 0xf) << 0);
>>> +    return val;
>>
>> I don't know much about hashing, but I don't think makes for a very good hash
>> function.  It outputs similar hashes for similar inputs, and does not use the
>> range of possible hash values uniformly.
>
> Indeed it does not output hashes uniformly but I believe it is unique. The
> meaningful (and future proof) values for "reg_size" are {4, 8, 16} _bytes_.
> Hence, the "0x1f" mask should suffice. Having 15 versions for ISA should be
> enough as well. Having these conditions in mind, I don't think there is any
> collusion while hashing such inputs.

Well, I guess that depends on how the hash map implementation uses the hash value
to map into buckets.  Let's say that there are 16 buckets, and the hash table
implements decides which bucket a value goes in by looking at the last four bits.
And let's imagine that you insert 32 values, all with the same ISA value but with
32 different reg_sizes values (assuming that would make sense).  Then even though
the hash values are all different, they all end up in the same bucket.

Having a hash function that uniformly distributes the hash values makes that kind
of pathological case much more unlikely.

Anyway, I won't press more on that issue, since it's really not that important.
We're talking about just a few items, so it will never make a difference.  And as
Luis said on IRC, it could also use a vector it a linear search.

>> It would be more appropriate and typical to use std::hash on each member and
>> then combine the hashes.  Doing a quick search I found that Boost offers
>> something exactly for that called hash_combine:
>>
>> https://www.boost.org/doc/libs/1_55_0/doc/html/hash/combine.html
>
> Thanks for this. I didn't know about such functionality. As you said
> though, we can't use it. Personally, I think it would be an overkill
> here. We can get away with a simple "shift" and "or". Please read my
> response above for my reasoning.
>>
>> Unfortunately, there is nothing similar in the standard library.  But
>>
>> A bit off-topic: intuitively, I would have thought that it would have been
>> sufficient to just add the hash values together.  Anyone knows why this
>> wouldn't be a good idea?
>
> So far, possible values are:
>
>   reg_size : {4, 8, 16}
>   ISA: {1, 2, ... 15}
>
> A simple addition would produce the same result for these legally valid
> inputs:
>
> reg_size=8, ISA=2   --->  hash = 10
> reg_size=4, ISA=6   --->  hash = 10

Sorry, I meant `std::hash (reg_size) + std::hash (isa)`, not `reg_size + isa`.

If `std::hash (reg_size)` produces a uniformly-distributed hash value, and
`std::hash (isa)` as well, then the output is surely uniformly-distributed,
no?

Simon

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